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Data Fields</h2></td></tr>
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<tr class="memitem:a4273cda56a5b365d593c7d00f7ee5182"><td class="memItemLeft" >&#160;&#160;&#160;uint8_t&#160;&#160;&#160;<a class="el" href="unionDSU__CTRL__Type.html#a73a94d5d5c3dc5b218c6bc1e4bc6165d">SWRST</a>:1</td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
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<p class="definition">Definition at line <a class="el" href="component_2dsu_8h_source.html#l00044">44</a> of file <a class="el" href="component_2dsu_8h_source.html">dsu.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#a97980a8d19e1c87006e54c0a0d30972e">&#9670;&nbsp;</a></span>__pad0__</h2>
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<p>bit: 1 Reserved <br />
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<p class="definition">Definition at line <a class="el" href="component_2dsu_8h_source.html#l00047">47</a> of file <a class="el" href="component_2dsu_8h_source.html">dsu.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#aa9101a767b137142f96f342663dd7bab">&#9670;&nbsp;</a></span>__pad1__</h2>
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<p>bit: 5 Reserved <br />
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<p class="definition">Definition at line <a class="el" href="component_2dsu_8h_source.html#l00051">51</a> of file <a class="el" href="component_2dsu_8h_source.html">dsu.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#a65fe38370088ef03ea4be1a7e98d91b6">&#9670;&nbsp;</a></span>ARR</h2>
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<p>bit: 6 Auxiliary Row Read <br />
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<p class="definition">Definition at line <a class="el" href="component_2dsu_8h_source.html#l00052">52</a> of file <a class="el" href="component_2dsu_8h_source.html">dsu.h</a>.</p>
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<p>Structure used for bit access <br />
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<p>bit: 4 Chip-Erase <br />
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<p class="definition">Definition at line <a class="el" href="component_2dsu_8h_source.html#l00050">50</a> of file <a class="el" href="component_2dsu_8h_source.html">dsu.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#a9a351c7d3ed4db72fe199f29441b24e4">&#9670;&nbsp;</a></span>CRC</h2>
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<p>bit: 2 32-bit Cyclic Redundancy Code <br />
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<p class="definition">Definition at line <a class="el" href="component_2dsu_8h_source.html#l00048">48</a> of file <a class="el" href="component_2dsu_8h_source.html">dsu.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#a0b11d4226d2417422ef909e10ed17bc9">&#9670;&nbsp;</a></span>MBIST</h2>
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<p>bit: 3 Memory built-in self-test <br />
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<p class="definition">Definition at line <a class="el" href="component_2dsu_8h_source.html#l00049">49</a> of file <a class="el" href="component_2dsu_8h_source.html">dsu.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#aead0ceef9a72bc2e2e07d865be80b89c">&#9670;&nbsp;</a></span>reg</h2>
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<p>Type used for register access <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2dsu_8h_source.html#l00055">55</a> of file <a class="el" href="component_2dsu_8h_source.html">dsu.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#a88845326ae957d9f9ce3c15a0cac4963">&#9670;&nbsp;</a></span>SMSA</h2>
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<p>bit: 7 Start Memory Stream Access <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2dsu_8h_source.html#l00053">53</a> of file <a class="el" href="component_2dsu_8h_source.html">dsu.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#a73a94d5d5c3dc5b218c6bc1e4bc6165d">&#9670;&nbsp;</a></span>SWRST</h2>
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<p>bit: 0 Software Reset <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2dsu_8h_source.html#l00046">46</a> of file <a class="el" href="component_2dsu_8h_source.html">dsu.h</a>.</p>
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<hr/>The documentation for this union was generated from the following file:<ul>
<li>/storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/component/<a class="el" href="component_2dsu_8h_source.html">dsu.h</a></li>
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