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Data Fields</h2></td></tr>
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<tr class="memitem:a8b939de51035977d4df171de6297bd54"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionDMAC__CHCTRLA__Type.html#a8b939de51035977d4df171de6297bd54">reg</a></td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock">
<p class="definition">Definition at line <a class="el" href="component_2dmac_8h_source.html#l00892">892</a> of file <a class="el" href="component_2dmac_8h_source.html">dmac.h</a>.</p>
</div><h2 class="groupheader">Field Documentation</h2>
<a id="a76fc4d37a01c8ae55f2a8580be33ca62"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a76fc4d37a01c8ae55f2a8580be33ca62">&#9670;&nbsp;</a></span>__pad0__</h2>
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<td class="memname">uint32_t DMAC_CHCTRLA_Type::__pad0__</td>
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<p>bit: 2.. 5 Reserved <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2dmac_8h_source.html#l00896">896</a> of file <a class="el" href="component_2dmac_8h_source.html">dmac.h</a>.</p>
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<p>bit: 7 Reserved <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2dmac_8h_source.html#l00898">898</a> of file <a class="el" href="component_2dmac_8h_source.html">dmac.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#aecbd99cff4fe173b273118ab0eac3cb7">&#9670;&nbsp;</a></span>__pad2__</h2>
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<td class="memname">uint32_t DMAC_CHCTRLA_Type::__pad2__</td>
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<p>bit: 15..19 Reserved <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2dmac_8h_source.html#l00900">900</a> of file <a class="el" href="component_2dmac_8h_source.html">dmac.h</a>.</p>
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<a id="a8faa983bdb77fbfcf7dba3a0477bc541"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a8faa983bdb77fbfcf7dba3a0477bc541">&#9670;&nbsp;</a></span>__pad3__</h2>
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<td class="memname">uint32_t DMAC_CHCTRLA_Type::__pad3__</td>
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<p>bit: 22..23 Reserved <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2dmac_8h_source.html#l00902">902</a> of file <a class="el" href="component_2dmac_8h_source.html">dmac.h</a>.</p>
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<a id="ad4ac14885a355bde7ae8057c594ca8de"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ad4ac14885a355bde7ae8057c594ca8de">&#9670;&nbsp;</a></span>__pad4__</h2>
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<td class="memname">uint32_t DMAC_CHCTRLA_Type::__pad4__</td>
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<p>bit: 30..31 Reserved <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2dmac_8h_source.html#l00905">905</a> of file <a class="el" href="component_2dmac_8h_source.html">dmac.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#a0d16d3aa3c135e21547155504b13391a">&#9670;&nbsp;</a></span>bit</h2>
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<p>Structure used for bit access <br />
</p>
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<a id="ab9189f746af938f88012377adf6f4a02"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ab9189f746af938f88012377adf6f4a02">&#9670;&nbsp;</a></span>BURSTLEN</h2>
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<td class="memname">uint32_t DMAC_CHCTRLA_Type::BURSTLEN</td>
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<p>bit: 24..27 Burst Length <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2dmac_8h_source.html#l00903">903</a> of file <a class="el" href="component_2dmac_8h_source.html">dmac.h</a>.</p>
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<a id="a638abd3d8651042d79ba75e9bafb41a6"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a638abd3d8651042d79ba75e9bafb41a6">&#9670;&nbsp;</a></span>ENABLE</h2>
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<td class="memname">uint32_t DMAC_CHCTRLA_Type::ENABLE</td>
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<p>bit: 1 Channel Enable <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2dmac_8h_source.html#l00895">895</a> of file <a class="el" href="component_2dmac_8h_source.html">dmac.h</a>.</p>
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<a id="a8b939de51035977d4df171de6297bd54"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a8b939de51035977d4df171de6297bd54">&#9670;&nbsp;</a></span>reg</h2>
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<p>Type used for register access <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2dmac_8h_source.html#l00907">907</a> of file <a class="el" href="component_2dmac_8h_source.html">dmac.h</a>.</p>
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<a id="a46182f17b3147b189a1ac17a4002b2c0"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a46182f17b3147b189a1ac17a4002b2c0">&#9670;&nbsp;</a></span>RUNSTDBY</h2>
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<td class="memname">uint32_t DMAC_CHCTRLA_Type::RUNSTDBY</td>
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<p>bit: 6 Channel Run in Standby <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2dmac_8h_source.html#l00897">897</a> of file <a class="el" href="component_2dmac_8h_source.html">dmac.h</a>.</p>
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<a id="aad4e706174fa40420c344f127df43a0a"></a>
<h2 class="memtitle"><span class="permalink"><a href="#aad4e706174fa40420c344f127df43a0a">&#9670;&nbsp;</a></span>SWRST</h2>
<div class="memitem">
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<td class="memname">uint32_t DMAC_CHCTRLA_Type::SWRST</td>
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<p>bit: 0 Channel Software Reset <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2dmac_8h_source.html#l00894">894</a> of file <a class="el" href="component_2dmac_8h_source.html">dmac.h</a>.</p>
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<a id="a43ea4e277ff27ff046aed2b6a7843a08"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a43ea4e277ff27ff046aed2b6a7843a08">&#9670;&nbsp;</a></span>THRESHOLD</h2>
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<td class="memname">uint32_t DMAC_CHCTRLA_Type::THRESHOLD</td>
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<p>bit: 28..29 FIFO Threshold <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2dmac_8h_source.html#l00904">904</a> of file <a class="el" href="component_2dmac_8h_source.html">dmac.h</a>.</p>
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<a id="a1314d95f9150e2c9f0febac831a16433"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a1314d95f9150e2c9f0febac831a16433">&#9670;&nbsp;</a></span>TRIGACT</h2>
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<td class="memname">uint32_t DMAC_CHCTRLA_Type::TRIGACT</td>
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<p>bit: 20..21 Trigger Action <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2dmac_8h_source.html#l00901">901</a> of file <a class="el" href="component_2dmac_8h_source.html">dmac.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#a9f38e9ad8b5a30d3becc7815f811d294">&#9670;&nbsp;</a></span>TRIGSRC</h2>
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<td class="memname">uint32_t DMAC_CHCTRLA_Type::TRIGSRC</td>
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<p>bit: 8..14 Trigger Source <br />
</p>
<p class="definition">Definition at line <a class="el" href="component_2dmac_8h_source.html#l00899">899</a> of file <a class="el" href="component_2dmac_8h_source.html">dmac.h</a>.</p>
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<hr/>The documentation for this union was generated from the following file:<ul>
<li>/storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/component/<a class="el" href="component_2dmac_8h_source.html">dmac.h</a></li>
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