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<title>SAME54P20A Test Project: /storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/instance/tcc4.h File Reference</title>
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<div id="projectname">SAME54P20A Test Project
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<li class="navelem"><a class="el" href="dir_ea9599923402ca8ab47fc3e495999dea.html">arch</a></li><li class="navelem"><a class="el" href="dir_9e929c73feaf15d3695ce4c76b483065.html">arm</a></li><li class="navelem"><a class="el" href="dir_58955c0f35a9c3d48181d2be53994c7b.html">SAME54</a></li><li class="navelem"><a class="el" href="dir_09e97e512ca7d4e6cd359f1c5497eeba.html">SAME54A</a></li><li class="navelem"><a class="el" href="dir_4b38d63e5c584a4d6c9001c789e1829f.html">mcu</a></li><li class="navelem"><a class="el" href="dir_d4fc57b996dc082ef023092a5b7d90fc.html">inc</a></li><li class="navelem"><a class="el" href="dir_92b117bae75cf16a05ca7611db29e9c7.html">instance</a></li> </ul>
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<a href="#define-members">Macros</a> </div>
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<div class="title">tcc4.h File Reference</div> </div>
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</div><!--header-->
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<div class="contents">
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<p>Instance description for TCC4.
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<a href="#details">More...</a></p>
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<p><a href="tcc4_8h_source.html">Go to the source code of this file.</a></p>
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<table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
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Macros</h2></td></tr>
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<tr class="memitem:a154be97a6091e677620e726d9fcd16f6"><td class="memItemLeft" align="right" valign="top"><a id="a154be97a6091e677620e726d9fcd16f6"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc4_8h.html#a154be97a6091e677620e726d9fcd16f6">REG_TCC4_CTRLA</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43001000UL)</td></tr>
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<tr class="memdesc:a154be97a6091e677620e726d9fcd16f6"><td class="mdescLeft"> </td><td class="mdescRight">(TCC4) Control A <br /></td></tr>
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<tr class="separator:a154be97a6091e677620e726d9fcd16f6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a92aea089fd44830ed9dbff4286b6e0e5"><td class="memItemLeft" align="right" valign="top"><a id="a92aea089fd44830ed9dbff4286b6e0e5"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc4_8h.html#a92aea089fd44830ed9dbff4286b6e0e5">REG_TCC4_CTRLBCLR</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x43001004UL)</td></tr>
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<tr class="memdesc:a92aea089fd44830ed9dbff4286b6e0e5"><td class="mdescLeft"> </td><td class="mdescRight">(TCC4) Control B Clear <br /></td></tr>
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<tr class="separator:a92aea089fd44830ed9dbff4286b6e0e5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac080190c0fd7f244869e3f899284441a"><td class="memItemLeft" align="right" valign="top"><a id="ac080190c0fd7f244869e3f899284441a"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc4_8h.html#ac080190c0fd7f244869e3f899284441a">REG_TCC4_CTRLBSET</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x43001005UL)</td></tr>
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<tr class="memdesc:ac080190c0fd7f244869e3f899284441a"><td class="mdescLeft"> </td><td class="mdescRight">(TCC4) Control B Set <br /></td></tr>
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<tr class="separator:ac080190c0fd7f244869e3f899284441a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5b8d1ec862eac5359180ccf49d1a263d"><td class="memItemLeft" align="right" valign="top"><a id="a5b8d1ec862eac5359180ccf49d1a263d"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc4_8h.html#a5b8d1ec862eac5359180ccf49d1a263d">REG_TCC4_SYNCBUSY</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x43001008UL)</td></tr>
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<tr class="memdesc:a5b8d1ec862eac5359180ccf49d1a263d"><td class="mdescLeft"> </td><td class="mdescRight">(TCC4) Synchronization Busy <br /></td></tr>
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<tr class="separator:a5b8d1ec862eac5359180ccf49d1a263d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a13d013b320b2d4801841ec8640662442"><td class="memItemLeft" align="right" valign="top"><a id="a13d013b320b2d4801841ec8640662442"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc4_8h.html#a13d013b320b2d4801841ec8640662442">REG_TCC4_FCTRLA</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x4300100CUL)</td></tr>
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<tr class="memdesc:a13d013b320b2d4801841ec8640662442"><td class="mdescLeft"> </td><td class="mdescRight">(TCC4) Recoverable Fault A Configuration <br /></td></tr>
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<tr class="separator:a13d013b320b2d4801841ec8640662442"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8ec6137be19636d53cd3e094afd6e3f8"><td class="memItemLeft" align="right" valign="top"><a id="a8ec6137be19636d53cd3e094afd6e3f8"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc4_8h.html#a8ec6137be19636d53cd3e094afd6e3f8">REG_TCC4_FCTRLB</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43001010UL)</td></tr>
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<tr class="memdesc:a8ec6137be19636d53cd3e094afd6e3f8"><td class="mdescLeft"> </td><td class="mdescRight">(TCC4) Recoverable Fault B Configuration <br /></td></tr>
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<tr class="separator:a8ec6137be19636d53cd3e094afd6e3f8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a17d56dc3a51610e516aee1a25ac6dc12"><td class="memItemLeft" align="right" valign="top"><a id="a17d56dc3a51610e516aee1a25ac6dc12"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc4_8h.html#a17d56dc3a51610e516aee1a25ac6dc12">REG_TCC4_DRVCTRL</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43001018UL)</td></tr>
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<tr class="memdesc:a17d56dc3a51610e516aee1a25ac6dc12"><td class="mdescLeft"> </td><td class="mdescRight">(TCC4) Driver Control <br /></td></tr>
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<tr class="separator:a17d56dc3a51610e516aee1a25ac6dc12"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7e0a53e11d9ae8716d0f731da541f5ea"><td class="memItemLeft" align="right" valign="top"><a id="a7e0a53e11d9ae8716d0f731da541f5ea"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc4_8h.html#a7e0a53e11d9ae8716d0f731da541f5ea">REG_TCC4_DBGCTRL</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x4300101EUL)</td></tr>
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<tr class="memdesc:a7e0a53e11d9ae8716d0f731da541f5ea"><td class="mdescLeft"> </td><td class="mdescRight">(TCC4) Debug Control <br /></td></tr>
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<tr class="separator:a7e0a53e11d9ae8716d0f731da541f5ea"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a47e4dce19f58b636c6f53c18942d5a49"><td class="memItemLeft" align="right" valign="top"><a id="a47e4dce19f58b636c6f53c18942d5a49"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc4_8h.html#a47e4dce19f58b636c6f53c18942d5a49">REG_TCC4_EVCTRL</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43001020UL)</td></tr>
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<tr class="memdesc:a47e4dce19f58b636c6f53c18942d5a49"><td class="mdescLeft"> </td><td class="mdescRight">(TCC4) Event Control <br /></td></tr>
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<tr class="separator:a47e4dce19f58b636c6f53c18942d5a49"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aefaa183e83258cb99aaeac795c5ae111"><td class="memItemLeft" align="right" valign="top"><a id="aefaa183e83258cb99aaeac795c5ae111"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc4_8h.html#aefaa183e83258cb99aaeac795c5ae111">REG_TCC4_INTENCLR</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43001024UL)</td></tr>
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<tr class="memdesc:aefaa183e83258cb99aaeac795c5ae111"><td class="mdescLeft"> </td><td class="mdescRight">(TCC4) Interrupt Enable Clear <br /></td></tr>
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<tr class="separator:aefaa183e83258cb99aaeac795c5ae111"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a924d257805bcb9e8d543ee89563b55ae"><td class="memItemLeft" align="right" valign="top"><a id="a924d257805bcb9e8d543ee89563b55ae"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc4_8h.html#a924d257805bcb9e8d543ee89563b55ae">REG_TCC4_INTENSET</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43001028UL)</td></tr>
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<tr class="memdesc:a924d257805bcb9e8d543ee89563b55ae"><td class="mdescLeft"> </td><td class="mdescRight">(TCC4) Interrupt Enable Set <br /></td></tr>
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<tr class="separator:a924d257805bcb9e8d543ee89563b55ae"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1a91173ccb0b0e7f9fb5ee635c7a26f5"><td class="memItemLeft" align="right" valign="top"><a id="a1a91173ccb0b0e7f9fb5ee635c7a26f5"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc4_8h.html#a1a91173ccb0b0e7f9fb5ee635c7a26f5">REG_TCC4_INTFLAG</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x4300102CUL)</td></tr>
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<tr class="memdesc:a1a91173ccb0b0e7f9fb5ee635c7a26f5"><td class="mdescLeft"> </td><td class="mdescRight">(TCC4) Interrupt Flag Status and Clear <br /></td></tr>
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<tr class="separator:a1a91173ccb0b0e7f9fb5ee635c7a26f5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a006d0e70fd21d35336516ea3eed0d912"><td class="memItemLeft" align="right" valign="top"><a id="a006d0e70fd21d35336516ea3eed0d912"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc4_8h.html#a006d0e70fd21d35336516ea3eed0d912">REG_TCC4_STATUS</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43001030UL)</td></tr>
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<tr class="memdesc:a006d0e70fd21d35336516ea3eed0d912"><td class="mdescLeft"> </td><td class="mdescRight">(TCC4) Status <br /></td></tr>
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<tr class="separator:a006d0e70fd21d35336516ea3eed0d912"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8a28b152d830800e8bea78ca4fd57cd6"><td class="memItemLeft" align="right" valign="top"><a id="a8a28b152d830800e8bea78ca4fd57cd6"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc4_8h.html#a8a28b152d830800e8bea78ca4fd57cd6">REG_TCC4_COUNT</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43001034UL)</td></tr>
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<tr class="memdesc:a8a28b152d830800e8bea78ca4fd57cd6"><td class="mdescLeft"> </td><td class="mdescRight">(TCC4) Count <br /></td></tr>
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<tr class="separator:a8a28b152d830800e8bea78ca4fd57cd6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab4fb52c94fa88e6db340a480b5275986"><td class="memItemLeft" align="right" valign="top"><a id="ab4fb52c94fa88e6db340a480b5275986"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc4_8h.html#ab4fb52c94fa88e6db340a480b5275986">REG_TCC4_WAVE</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x4300103CUL)</td></tr>
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<tr class="memdesc:ab4fb52c94fa88e6db340a480b5275986"><td class="mdescLeft"> </td><td class="mdescRight">(TCC4) Waveform Control <br /></td></tr>
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<tr class="separator:ab4fb52c94fa88e6db340a480b5275986"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a931bfcf6b9ec1d20a11375110057ffce"><td class="memItemLeft" align="right" valign="top"><a id="a931bfcf6b9ec1d20a11375110057ffce"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc4_8h.html#a931bfcf6b9ec1d20a11375110057ffce">REG_TCC4_PER</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43001040UL)</td></tr>
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<tr class="memdesc:a931bfcf6b9ec1d20a11375110057ffce"><td class="mdescLeft"> </td><td class="mdescRight">(TCC4) Period <br /></td></tr>
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<tr class="separator:a931bfcf6b9ec1d20a11375110057ffce"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af6b669ea857c006f33c247b4174b9db8"><td class="memItemLeft" align="right" valign="top"><a id="af6b669ea857c006f33c247b4174b9db8"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc4_8h.html#af6b669ea857c006f33c247b4174b9db8">REG_TCC4_CC0</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43001044UL)</td></tr>
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<tr class="memdesc:af6b669ea857c006f33c247b4174b9db8"><td class="mdescLeft"> </td><td class="mdescRight">(TCC4) Compare and Capture 0 <br /></td></tr>
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<tr class="separator:af6b669ea857c006f33c247b4174b9db8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a14c9682586724fff343c90a2f4fe9207"><td class="memItemLeft" align="right" valign="top"><a id="a14c9682586724fff343c90a2f4fe9207"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc4_8h.html#a14c9682586724fff343c90a2f4fe9207">REG_TCC4_CC1</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43001048UL)</td></tr>
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<tr class="memdesc:a14c9682586724fff343c90a2f4fe9207"><td class="mdescLeft"> </td><td class="mdescRight">(TCC4) Compare and Capture 1 <br /></td></tr>
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<tr class="separator:a14c9682586724fff343c90a2f4fe9207"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4d1045d699c7e27b636dc66408b75f1e"><td class="memItemLeft" align="right" valign="top"><a id="a4d1045d699c7e27b636dc66408b75f1e"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc4_8h.html#a4d1045d699c7e27b636dc66408b75f1e">REG_TCC4_PERBUF</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x4300106CUL)</td></tr>
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<tr class="memdesc:a4d1045d699c7e27b636dc66408b75f1e"><td class="mdescLeft"> </td><td class="mdescRight">(TCC4) Period Buffer <br /></td></tr>
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<tr class="separator:a4d1045d699c7e27b636dc66408b75f1e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a84e88504780687e77e3c1b2eaba6a72d"><td class="memItemLeft" align="right" valign="top"><a id="a84e88504780687e77e3c1b2eaba6a72d"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc4_8h.html#a84e88504780687e77e3c1b2eaba6a72d">REG_TCC4_CCBUF0</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43001070UL)</td></tr>
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<tr class="memdesc:a84e88504780687e77e3c1b2eaba6a72d"><td class="mdescLeft"> </td><td class="mdescRight">(TCC4) Compare and Capture Buffer 0 <br /></td></tr>
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<tr class="separator:a84e88504780687e77e3c1b2eaba6a72d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae43199e68ffea8eea7cf40e890f70594"><td class="memItemLeft" align="right" valign="top"><a id="ae43199e68ffea8eea7cf40e890f70594"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="tcc4_8h.html#ae43199e68ffea8eea7cf40e890f70594">REG_TCC4_CCBUF1</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43001074UL)</td></tr>
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<tr class="memdesc:ae43199e68ffea8eea7cf40e890f70594"><td class="mdescLeft"> </td><td class="mdescRight">(TCC4) Compare and Capture Buffer 1 <br /></td></tr>
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<tr class="separator:ae43199e68ffea8eea7cf40e890f70594"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:acdd39eccdc16e7ce556880ebefd7c320"><td class="memItemLeft" align="right" valign="top"><a id="acdd39eccdc16e7ce556880ebefd7c320"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>TCC4_CC_NUM</b>   2</td></tr>
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<tr class="separator:acdd39eccdc16e7ce556880ebefd7c320"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afe9434eccb9a012bf6ce9b9f0f822645"><td class="memItemLeft" align="right" valign="top"><a id="afe9434eccb9a012bf6ce9b9f0f822645"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>TCC4_DITHERING</b>   0</td></tr>
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<tr class="separator:afe9434eccb9a012bf6ce9b9f0f822645"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a80956ab19d30aa182b1b706c848d9e5a"><td class="memItemLeft" align="right" valign="top"><a id="a80956ab19d30aa182b1b706c848d9e5a"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>TCC4_DMAC_ID_MC_0</b>   42</td></tr>
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<tr class="separator:a80956ab19d30aa182b1b706c848d9e5a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4769c14ca37131d199da43400ddafbb6"><td class="memItemLeft" align="right" valign="top"><a id="a4769c14ca37131d199da43400ddafbb6"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>TCC4_DMAC_ID_MC_1</b>   43</td></tr>
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<tr class="separator:a4769c14ca37131d199da43400ddafbb6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab1809de302a08bfb7ea1ac6f9681ccd2"><td class="memItemLeft" align="right" valign="top"><a id="ab1809de302a08bfb7ea1ac6f9681ccd2"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>TCC4_DMAC_ID_MC_LSB</b>   42</td></tr>
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<tr class="separator:ab1809de302a08bfb7ea1ac6f9681ccd2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a190037e20820bfc2c4bbc299479e7ffb"><td class="memItemLeft" align="right" valign="top"><a id="a190037e20820bfc2c4bbc299479e7ffb"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>TCC4_DMAC_ID_MC_MSB</b>   43</td></tr>
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<tr class="separator:a190037e20820bfc2c4bbc299479e7ffb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a66f29083f192d6b28ecafe4b10f21178"><td class="memItemLeft" align="right" valign="top"><a id="a66f29083f192d6b28ecafe4b10f21178"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>TCC4_DMAC_ID_MC_SIZE</b>   2</td></tr>
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<tr class="separator:a66f29083f192d6b28ecafe4b10f21178"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a70d0220b3d13bf9cb32744688d1b78a6"><td class="memItemLeft" align="right" valign="top"><a id="a70d0220b3d13bf9cb32744688d1b78a6"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>TCC4_DMAC_ID_OVF</b>   41</td></tr>
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<tr class="separator:a70d0220b3d13bf9cb32744688d1b78a6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2afbe1602f190f1ca9ee59da7a03afed"><td class="memItemLeft" align="right" valign="top"><a id="a2afbe1602f190f1ca9ee59da7a03afed"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>TCC4_DTI</b>   0</td></tr>
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<tr class="separator:a2afbe1602f190f1ca9ee59da7a03afed"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a85b7f4bfa23de295c821b11f09751d41"><td class="memItemLeft" align="right" valign="top"><a id="a85b7f4bfa23de295c821b11f09751d41"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>TCC4_EXT</b>   0</td></tr>
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<tr class="separator:a85b7f4bfa23de295c821b11f09751d41"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a688d0dcbdd12b53cf3671a009e223345"><td class="memItemLeft" align="right" valign="top"><a id="a688d0dcbdd12b53cf3671a009e223345"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>TCC4_GCLK_ID</b>   38</td></tr>
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<tr class="separator:a688d0dcbdd12b53cf3671a009e223345"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a28dd4add01b1b73fe2ae8c06e4ff9405"><td class="memItemLeft" align="right" valign="top"><a id="a28dd4add01b1b73fe2ae8c06e4ff9405"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>TCC4_MASTER_SLAVE_MODE</b>   0</td></tr>
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<tr class="separator:a28dd4add01b1b73fe2ae8c06e4ff9405"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a365e3d35458e660e8c22f6901a5eec98"><td class="memItemLeft" align="right" valign="top"><a id="a365e3d35458e660e8c22f6901a5eec98"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>TCC4_OTMX</b>   0</td></tr>
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<tr class="separator:a365e3d35458e660e8c22f6901a5eec98"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abf1e6fc7be7f7bf0c6c85775ac9fb1f6"><td class="memItemLeft" align="right" valign="top"><a id="abf1e6fc7be7f7bf0c6c85775ac9fb1f6"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>TCC4_OW_NUM</b>   2</td></tr>
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<tr class="separator:abf1e6fc7be7f7bf0c6c85775ac9fb1f6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a35633e230516375b0b03c2c7f4ec4527"><td class="memItemLeft" align="right" valign="top"><a id="a35633e230516375b0b03c2c7f4ec4527"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>TCC4_PG</b>   0</td></tr>
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<tr class="separator:a35633e230516375b0b03c2c7f4ec4527"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5da6d6c56c752fb17fecd34548a882b7"><td class="memItemLeft" align="right" valign="top"><a id="a5da6d6c56c752fb17fecd34548a882b7"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>TCC4_SIZE</b>   16</td></tr>
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<tr class="separator:a5da6d6c56c752fb17fecd34548a882b7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a44513b39490c11cbf3933e198966f69f"><td class="memItemLeft" align="right" valign="top"><a id="a44513b39490c11cbf3933e198966f69f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>TCC4_SWAP</b>   0</td></tr>
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<tr class="separator:a44513b39490c11cbf3933e198966f69f"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
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<div class="textblock"><p>Instance description for TCC4. </p>
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<p>Copyright (c) 2019 Microchip Technology Inc.</p>
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<p>\asf_license_start </p>
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<p class="definition">Definition in file <a class="el" href="tcc4_8h_source.html">tcc4.h</a>.</p>
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