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<div id="projectname">SAME54P20A Test Project
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<li class="navelem"><a class="el" href="dir_ea9599923402ca8ab47fc3e495999dea.html">arch</a></li><li class="navelem"><a class="el" href="dir_9e929c73feaf15d3695ce4c76b483065.html">arm</a></li><li class="navelem"><a class="el" href="dir_58955c0f35a9c3d48181d2be53994c7b.html">SAME54</a></li><li class="navelem"><a class="el" href="dir_09e97e512ca7d4e6cd359f1c5497eeba.html">SAME54A</a></li><li class="navelem"><a class="el" href="dir_4b38d63e5c584a4d6c9001c789e1829f.html">mcu</a></li><li class="navelem"><a class="el" href="dir_d4fc57b996dc082ef023092a5b7d90fc.html">inc</a></li><li class="navelem"><a class="el" href="dir_92b117bae75cf16a05ca7611db29e9c7.html">instance</a></li> </ul>
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<div class="title">tcc2.h</div> </div>
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<div class="contents">
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<a href="tcc2_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>  </div>
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<div class="line"><a name="l00030"></a><span class="lineno"> 30</span> <span class="preprocessor">#ifndef _SAME54_TCC2_INSTANCE_</span></div>
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<div class="line"><a name="l00031"></a><span class="lineno"> 31</span> <span class="preprocessor">#define _SAME54_TCC2_INSTANCE_</span></div>
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<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>  </div>
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<div class="line"><a name="l00033"></a><span class="lineno"> 33</span> <span class="comment">/* ========== Register definition for TCC2 peripheral ========== */</span></div>
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<div class="line"><a name="l00034"></a><span class="lineno"> 34</span> <span class="preprocessor">#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
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<div class="line"><a name="l00035"></a><span class="lineno"> 35</span> <span class="preprocessor">#define REG_TCC2_CTRLA (0x42000C00) </span></div>
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<div class="line"><a name="l00036"></a><span class="lineno"> 36</span> <span class="preprocessor">#define REG_TCC2_CTRLBCLR (0x42000C04) </span></div>
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<div class="line"><a name="l00037"></a><span class="lineno"> 37</span> <span class="preprocessor">#define REG_TCC2_CTRLBSET (0x42000C05) </span></div>
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<div class="line"><a name="l00038"></a><span class="lineno"> 38</span> <span class="preprocessor">#define REG_TCC2_SYNCBUSY (0x42000C08) </span></div>
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<div class="line"><a name="l00039"></a><span class="lineno"> 39</span> <span class="preprocessor">#define REG_TCC2_FCTRLA (0x42000C0C) </span></div>
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<div class="line"><a name="l00040"></a><span class="lineno"> 40</span> <span class="preprocessor">#define REG_TCC2_FCTRLB (0x42000C10) </span></div>
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<div class="line"><a name="l00041"></a><span class="lineno"> 41</span> <span class="preprocessor">#define REG_TCC2_WEXCTRL (0x42000C14) </span></div>
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<div class="line"><a name="l00042"></a><span class="lineno"> 42</span> <span class="preprocessor">#define REG_TCC2_DRVCTRL (0x42000C18) </span></div>
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<div class="line"><a name="l00043"></a><span class="lineno"> 43</span> <span class="preprocessor">#define REG_TCC2_DBGCTRL (0x42000C1E) </span></div>
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<div class="line"><a name="l00044"></a><span class="lineno"> 44</span> <span class="preprocessor">#define REG_TCC2_EVCTRL (0x42000C20) </span></div>
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<div class="line"><a name="l00045"></a><span class="lineno"> 45</span> <span class="preprocessor">#define REG_TCC2_INTENCLR (0x42000C24) </span></div>
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<div class="line"><a name="l00046"></a><span class="lineno"> 46</span> <span class="preprocessor">#define REG_TCC2_INTENSET (0x42000C28) </span></div>
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<div class="line"><a name="l00047"></a><span class="lineno"> 47</span> <span class="preprocessor">#define REG_TCC2_INTFLAG (0x42000C2C) </span></div>
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<div class="line"><a name="l00048"></a><span class="lineno"> 48</span> <span class="preprocessor">#define REG_TCC2_STATUS (0x42000C30) </span></div>
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<div class="line"><a name="l00049"></a><span class="lineno"> 49</span> <span class="preprocessor">#define REG_TCC2_COUNT (0x42000C34) </span></div>
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<div class="line"><a name="l00050"></a><span class="lineno"> 50</span> <span class="preprocessor">#define REG_TCC2_WAVE (0x42000C3C) </span></div>
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<div class="line"><a name="l00051"></a><span class="lineno"> 51</span> <span class="preprocessor">#define REG_TCC2_PER (0x42000C40) </span></div>
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<div class="line"><a name="l00052"></a><span class="lineno"> 52</span> <span class="preprocessor">#define REG_TCC2_CC0 (0x42000C44) </span></div>
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<div class="line"><a name="l00053"></a><span class="lineno"> 53</span> <span class="preprocessor">#define REG_TCC2_CC1 (0x42000C48) </span></div>
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<div class="line"><a name="l00054"></a><span class="lineno"> 54</span> <span class="preprocessor">#define REG_TCC2_CC2 (0x42000C4C) </span></div>
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<div class="line"><a name="l00055"></a><span class="lineno"> 55</span> <span class="preprocessor">#define REG_TCC2_PERBUF (0x42000C6C) </span></div>
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<div class="line"><a name="l00056"></a><span class="lineno"> 56</span> <span class="preprocessor">#define REG_TCC2_CCBUF0 (0x42000C70) </span></div>
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<div class="line"><a name="l00057"></a><span class="lineno"> 57</span> <span class="preprocessor">#define REG_TCC2_CCBUF1 (0x42000C74) </span></div>
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<div class="line"><a name="l00058"></a><span class="lineno"> 58</span> <span class="preprocessor">#define REG_TCC2_CCBUF2 (0x42000C78) </span></div>
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<div class="line"><a name="l00059"></a><span class="lineno"> 59</span> <span class="preprocessor">#else</span></div>
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<div class="line"><a name="l00060"></a><span class="lineno"><a class="line" href="tcc2_8h.html#ae9e265f8eab902b132b7207477c11186"> 60</a></span> <span class="preprocessor">#define REG_TCC2_CTRLA (*(RwReg *)0x42000C00UL) </span></div>
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<div class="line"><a name="l00061"></a><span class="lineno"><a class="line" href="tcc2_8h.html#a075cb438518cad995f7a3dd37c448380"> 61</a></span> <span class="preprocessor">#define REG_TCC2_CTRLBCLR (*(RwReg8 *)0x42000C04UL) </span></div>
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<div class="line"><a name="l00062"></a><span class="lineno"><a class="line" href="tcc2_8h.html#aa15939ad1687ab0adc3d83bc0421f506"> 62</a></span> <span class="preprocessor">#define REG_TCC2_CTRLBSET (*(RwReg8 *)0x42000C05UL) </span></div>
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<div class="line"><a name="l00063"></a><span class="lineno"><a class="line" href="tcc2_8h.html#a4294afbc8227d1e091ef5e5a6443efbc"> 63</a></span> <span class="preprocessor">#define REG_TCC2_SYNCBUSY (*(RoReg *)0x42000C08UL) </span></div>
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<div class="line"><a name="l00064"></a><span class="lineno"><a class="line" href="tcc2_8h.html#a6f52c4617f6f91738c05b8d2d2beee31"> 64</a></span> <span class="preprocessor">#define REG_TCC2_FCTRLA (*(RwReg *)0x42000C0CUL) </span></div>
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<div class="line"><a name="l00065"></a><span class="lineno"><a class="line" href="tcc2_8h.html#a9c29c4da47c83ae031454c7c537e1ce3"> 65</a></span> <span class="preprocessor">#define REG_TCC2_FCTRLB (*(RwReg *)0x42000C10UL) </span></div>
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<div class="line"><a name="l00066"></a><span class="lineno"><a class="line" href="tcc2_8h.html#aee89f60d78a3bf8f64dc6f0a0f15fdc3"> 66</a></span> <span class="preprocessor">#define REG_TCC2_WEXCTRL (*(RwReg *)0x42000C14UL) </span></div>
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<div class="line"><a name="l00067"></a><span class="lineno"><a class="line" href="tcc2_8h.html#ad9337b877daf46a084d33f5f21b3221b"> 67</a></span> <span class="preprocessor">#define REG_TCC2_DRVCTRL (*(RwReg *)0x42000C18UL) </span></div>
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<div class="line"><a name="l00068"></a><span class="lineno"><a class="line" href="tcc2_8h.html#aa7d0cdfab16794c96ca3cce2df2c0092"> 68</a></span> <span class="preprocessor">#define REG_TCC2_DBGCTRL (*(RwReg8 *)0x42000C1EUL) </span></div>
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<div class="line"><a name="l00069"></a><span class="lineno"><a class="line" href="tcc2_8h.html#aa38e633ea3d0c8c576256fa9e39e953b"> 69</a></span> <span class="preprocessor">#define REG_TCC2_EVCTRL (*(RwReg *)0x42000C20UL) </span></div>
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<div class="line"><a name="l00070"></a><span class="lineno"><a class="line" href="tcc2_8h.html#abb953dfa443311185ac2e9d13433504c"> 70</a></span> <span class="preprocessor">#define REG_TCC2_INTENCLR (*(RwReg *)0x42000C24UL) </span></div>
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<div class="line"><a name="l00071"></a><span class="lineno"><a class="line" href="tcc2_8h.html#a0e9765b809332e5e12cf6f627fade991"> 71</a></span> <span class="preprocessor">#define REG_TCC2_INTENSET (*(RwReg *)0x42000C28UL) </span></div>
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<div class="line"><a name="l00072"></a><span class="lineno"><a class="line" href="tcc2_8h.html#aadc2b213b137de696fc3e4634d6b0b9c"> 72</a></span> <span class="preprocessor">#define REG_TCC2_INTFLAG (*(RwReg *)0x42000C2CUL) </span></div>
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<div class="line"><a name="l00073"></a><span class="lineno"><a class="line" href="tcc2_8h.html#aa695c68491b44f7c48c410d58753a592"> 73</a></span> <span class="preprocessor">#define REG_TCC2_STATUS (*(RwReg *)0x42000C30UL) </span></div>
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<div class="line"><a name="l00074"></a><span class="lineno"><a class="line" href="tcc2_8h.html#ae37cb55b57014f401eb313802928f290"> 74</a></span> <span class="preprocessor">#define REG_TCC2_COUNT (*(RwReg *)0x42000C34UL) </span></div>
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<div class="line"><a name="l00075"></a><span class="lineno"><a class="line" href="tcc2_8h.html#a55f6ac089fdec116b0d252605505177c"> 75</a></span> <span class="preprocessor">#define REG_TCC2_WAVE (*(RwReg *)0x42000C3CUL) </span></div>
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<div class="line"><a name="l00076"></a><span class="lineno"><a class="line" href="tcc2_8h.html#a9a2062df26765f326ebf4986b5fbf1d4"> 76</a></span> <span class="preprocessor">#define REG_TCC2_PER (*(RwReg *)0x42000C40UL) </span></div>
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<div class="line"><a name="l00077"></a><span class="lineno"><a class="line" href="tcc2_8h.html#a56cb68200f9ab70d563be4034c082a0c"> 77</a></span> <span class="preprocessor">#define REG_TCC2_CC0 (*(RwReg *)0x42000C44UL) </span></div>
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<div class="line"><a name="l00078"></a><span class="lineno"><a class="line" href="tcc2_8h.html#a1cdbad1339a6d67872c1d7f3a438aa9d"> 78</a></span> <span class="preprocessor">#define REG_TCC2_CC1 (*(RwReg *)0x42000C48UL) </span></div>
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<div class="line"><a name="l00079"></a><span class="lineno"><a class="line" href="tcc2_8h.html#a69e0cc1294cfbfba88d1a6c25f4bad6f"> 79</a></span> <span class="preprocessor">#define REG_TCC2_CC2 (*(RwReg *)0x42000C4CUL) </span></div>
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<div class="line"><a name="l00080"></a><span class="lineno"><a class="line" href="tcc2_8h.html#a81ff00582dbc8c4c837208faf3c6b417"> 80</a></span> <span class="preprocessor">#define REG_TCC2_PERBUF (*(RwReg *)0x42000C6CUL) </span></div>
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<div class="line"><a name="l00081"></a><span class="lineno"><a class="line" href="tcc2_8h.html#afdc508d0cefb89e5c277406f74aa39ac"> 81</a></span> <span class="preprocessor">#define REG_TCC2_CCBUF0 (*(RwReg *)0x42000C70UL) </span></div>
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<div class="line"><a name="l00082"></a><span class="lineno"><a class="line" href="tcc2_8h.html#ab9eb11f61475566635701139d7c068bb"> 82</a></span> <span class="preprocessor">#define REG_TCC2_CCBUF1 (*(RwReg *)0x42000C74UL) </span></div>
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<div class="line"><a name="l00083"></a><span class="lineno"><a class="line" href="tcc2_8h.html#a780b15b5671ce5903ca103eaa61d8497"> 83</a></span> <span class="preprocessor">#define REG_TCC2_CCBUF2 (*(RwReg *)0x42000C78UL) </span></div>
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<div class="line"><a name="l00084"></a><span class="lineno"> 84</span> <span class="preprocessor">#endif </span><span class="comment">/* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
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<div class="line"><a name="l00085"></a><span class="lineno"> 85</span>  </div>
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<div class="line"><a name="l00086"></a><span class="lineno"> 86</span> <span class="comment">/* ========== Instance parameters for TCC2 peripheral ========== */</span></div>
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<div class="line"><a name="l00087"></a><span class="lineno"> 87</span> <span class="preprocessor">#define TCC2_CC_NUM 3 // Number of Compare/Capture units</span></div>
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<div class="line"><a name="l00088"></a><span class="lineno"> 88</span> <span class="preprocessor">#define TCC2_DITHERING 0 // Dithering feature implemented</span></div>
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<div class="line"><a name="l00089"></a><span class="lineno"> 89</span> <span class="preprocessor">#define TCC2_DMAC_ID_MC_0 35</span></div>
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<div class="line"><a name="l00090"></a><span class="lineno"> 90</span> <span class="preprocessor">#define TCC2_DMAC_ID_MC_1 36</span></div>
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<div class="line"><a name="l00091"></a><span class="lineno"> 91</span> <span class="preprocessor">#define TCC2_DMAC_ID_MC_2 37</span></div>
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<div class="line"><a name="l00092"></a><span class="lineno"> 92</span> <span class="preprocessor">#define TCC2_DMAC_ID_MC_LSB 35</span></div>
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<div class="line"><a name="l00093"></a><span class="lineno"> 93</span> <span class="preprocessor">#define TCC2_DMAC_ID_MC_MSB 37</span></div>
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<div class="line"><a name="l00094"></a><span class="lineno"> 94</span> <span class="preprocessor">#define TCC2_DMAC_ID_MC_SIZE 3</span></div>
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<div class="line"><a name="l00095"></a><span class="lineno"> 95</span> <span class="preprocessor">#define TCC2_DMAC_ID_OVF 34 // DMA overflow/underflow/retrigger trigger</span></div>
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<div class="line"><a name="l00096"></a><span class="lineno"> 96</span> <span class="preprocessor">#define TCC2_DTI 0 // Dead-Time-Insertion feature implemented</span></div>
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<div class="line"><a name="l00097"></a><span class="lineno"> 97</span> <span class="preprocessor">#define TCC2_EXT 1 // Coding of implemented extended features</span></div>
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<div class="line"><a name="l00098"></a><span class="lineno"> 98</span> <span class="preprocessor">#define TCC2_GCLK_ID 29 // Index of Generic Clock</span></div>
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<div class="line"><a name="l00099"></a><span class="lineno"> 99</span> <span class="preprocessor">#define TCC2_MASTER_SLAVE_MODE 0 // TCC type 0 : NA, 1 : Master, 2 : Slave</span></div>
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<div class="line"><a name="l00100"></a><span class="lineno"> 100</span> <span class="preprocessor">#define TCC2_OTMX 1 // Output Matrix feature implemented</span></div>
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<div class="line"><a name="l00101"></a><span class="lineno"> 101</span> <span class="preprocessor">#define TCC2_OW_NUM 3 // Number of Output Waveforms</span></div>
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<div class="line"><a name="l00102"></a><span class="lineno"> 102</span> <span class="preprocessor">#define TCC2_PG 0 // Pattern Generation feature implemented</span></div>
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<div class="line"><a name="l00103"></a><span class="lineno"> 103</span> <span class="preprocessor">#define TCC2_SIZE 16 </span></div>
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<div class="line"><a name="l00104"></a><span class="lineno"> 104</span> <span class="preprocessor">#define TCC2_SWAP 0 // DTI outputs swap feature implemented</span></div>
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<div class="line"><a name="l00105"></a><span class="lineno"> 105</span>  </div>
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<div class="line"><a name="l00106"></a><span class="lineno"> 106</span> <span class="preprocessor">#endif </span><span class="comment">/* _SAME54_TCC2_INSTANCE_ */</span><span class="preprocessor"></span></div>
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