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<div id="projectname">SAME54P20A Test Project
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<a href="#pub-attribs">Data Fields</a> </div>
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<div class="title">RtcMode2 Struct Reference</div> </div>
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<div class="contents">
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<p>RTC_MODE2 hardware registers.
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<a href="structRtcMode2.html#details">More...</a></p>
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<p><code>#include <<a class="el" href="component_2rtc_8h_source.html">rtc.h</a>></code></p>
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<table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a>
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Data Fields</h2></td></tr>
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<tr class="memitem:a203d6680db5f26de7625e5111efa2d7c"><td class="memItemLeft" align="right" valign="top"><a id="a203d6680db5f26de7625e5111efa2d7c"></a>
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__IO <a class="el" href="unionRTC__MODE2__CTRLA__Type.html">RTC_MODE2_CTRLA_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structRtcMode2.html#a203d6680db5f26de7625e5111efa2d7c">CTRLA</a></td></tr>
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<tr class="memdesc:a203d6680db5f26de7625e5111efa2d7c"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x00 (R/W 16) MODE2 Control A. <br /></td></tr>
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__IO <a class="el" href="unionRTC__MODE2__CTRLB__Type.html">RTC_MODE2_CTRLB_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structRtcMode2.html#ac3cd3001373d1e27a11e6caeeb86f118">CTRLB</a></td></tr>
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<tr class="memdesc:ac3cd3001373d1e27a11e6caeeb86f118"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x02 (R/W 16) MODE2 Control B. <br /></td></tr>
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<tr class="memitem:ac744528883acc1673690301d852ca945"><td class="memItemLeft" align="right" valign="top"><a id="ac744528883acc1673690301d852ca945"></a>
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__IO <a class="el" href="unionRTC__MODE2__EVCTRL__Type.html">RTC_MODE2_EVCTRL_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structRtcMode2.html#ac744528883acc1673690301d852ca945">EVCTRL</a></td></tr>
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<tr class="memdesc:ac744528883acc1673690301d852ca945"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x04 (R/W 32) MODE2 Event Control. <br /></td></tr>
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<tr class="separator:ac744528883acc1673690301d852ca945"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abacd8562d898378de7149a11383da56c"><td class="memItemLeft" align="right" valign="top"><a id="abacd8562d898378de7149a11383da56c"></a>
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__IO <a class="el" href="unionRTC__MODE2__INTENCLR__Type.html">RTC_MODE2_INTENCLR_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structRtcMode2.html#abacd8562d898378de7149a11383da56c">INTENCLR</a></td></tr>
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<tr class="memdesc:abacd8562d898378de7149a11383da56c"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x08 (R/W 16) MODE2 Interrupt Enable Clear. <br /></td></tr>
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__IO <a class="el" href="unionRTC__MODE2__INTENSET__Type.html">RTC_MODE2_INTENSET_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structRtcMode2.html#a6d75eb6b1d65cfa2798098df490d1943">INTENSET</a></td></tr>
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<tr class="memdesc:a6d75eb6b1d65cfa2798098df490d1943"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x0A (R/W 16) MODE2 Interrupt Enable Set. <br /></td></tr>
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__IO <a class="el" href="unionRTC__MODE2__INTFLAG__Type.html">RTC_MODE2_INTFLAG_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structRtcMode2.html#a754872904b63e0a40f73498fa501d02a">INTFLAG</a></td></tr>
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<tr class="memdesc:a754872904b63e0a40f73498fa501d02a"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x0C (R/W 16) MODE2 Interrupt Flag Status and Clear. <br /></td></tr>
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__IO <a class="el" href="unionRTC__DBGCTRL__Type.html">RTC_DBGCTRL_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structRtcMode2.html#a4cfe6a983a5b27b48c819a8f395f7552">DBGCTRL</a></td></tr>
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<tr class="memdesc:a4cfe6a983a5b27b48c819a8f395f7552"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x0E (R/W 8) Debug Control. <br /></td></tr>
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<a class="el" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> </td><td class="memItemRight" valign="bottom"><b>Reserved1</b> [0x1]</td></tr>
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<tr class="memitem:a870122e945b0f5b0d262fbdd1f6673bd"><td class="memItemLeft" align="right" valign="top"><a id="a870122e945b0f5b0d262fbdd1f6673bd"></a>
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__I <a class="el" href="unionRTC__MODE2__SYNCBUSY__Type.html">RTC_MODE2_SYNCBUSY_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structRtcMode2.html#a870122e945b0f5b0d262fbdd1f6673bd">SYNCBUSY</a></td></tr>
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<tr class="memdesc:a870122e945b0f5b0d262fbdd1f6673bd"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x10 (R/ 32) MODE2 Synchronization Busy Status. <br /></td></tr>
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<tr class="separator:a870122e945b0f5b0d262fbdd1f6673bd"><td class="memSeparator" colspan="2"> </td></tr>
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__IO <a class="el" href="unionRTC__FREQCORR__Type.html">RTC_FREQCORR_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structRtcMode2.html#a8fa2fd1600ed1ee29e2d929a6f354089">FREQCORR</a></td></tr>
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<tr class="memdesc:a8fa2fd1600ed1ee29e2d929a6f354089"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x14 (R/W 8) Frequency Correction. <br /></td></tr>
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<tr class="separator:a8fa2fd1600ed1ee29e2d929a6f354089"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af0c44d8716903b257d0ade2145b586d6"><td class="memItemLeft" align="right" valign="top"><a id="af0c44d8716903b257d0ade2145b586d6"></a>
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<a class="el" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> </td><td class="memItemRight" valign="bottom"><b>Reserved2</b> [0x3]</td></tr>
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<tr class="separator:af0c44d8716903b257d0ade2145b586d6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aab5921b3d775160d284bc6e2881d6083"><td class="memItemLeft" align="right" valign="top"><a id="aab5921b3d775160d284bc6e2881d6083"></a>
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__IO <a class="el" href="unionRTC__MODE2__CLOCK__Type.html">RTC_MODE2_CLOCK_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structRtcMode2.html#aab5921b3d775160d284bc6e2881d6083">CLOCK</a></td></tr>
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<tr class="memdesc:aab5921b3d775160d284bc6e2881d6083"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x18 (R/W 32) MODE2 Clock Value. <br /></td></tr>
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<tr class="separator:aab5921b3d775160d284bc6e2881d6083"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af1457e724568fe2871953255b059921d"><td class="memItemLeft" align="right" valign="top"><a id="af1457e724568fe2871953255b059921d"></a>
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<a class="el" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> </td><td class="memItemRight" valign="bottom"><b>Reserved3</b> [0x4]</td></tr>
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<tr class="memitem:abeff3c405dbd6ed786526afc55029820"><td class="memItemLeft" align="right" valign="top"><a id="abeff3c405dbd6ed786526afc55029820"></a>
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<a class="el" href="structRtcMode2Alarm.html">RtcMode2Alarm</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structRtcMode2.html#abeff3c405dbd6ed786526afc55029820">Mode2Alarm</a> [2]</td></tr>
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<tr class="memdesc:abeff3c405dbd6ed786526afc55029820"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x20 <a class="el" href="structRtcMode2Alarm.html" title="RtcMode2Alarm hardware registers.">RtcMode2Alarm</a> groups [NUM_OF_ALARMS]. <br /></td></tr>
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<tr class="memitem:af181e3093993c9a2ec3c1191e8dc9829"><td class="memItemLeft" align="right" valign="top"><a id="af181e3093993c9a2ec3c1191e8dc9829"></a>
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<a class="el" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> </td><td class="memItemRight" valign="bottom"><b>Reserved4</b> [0x10]</td></tr>
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<tr class="separator:af181e3093993c9a2ec3c1191e8dc9829"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af7c57f65123422d735ed8d8447140680"><td class="memItemLeft" align="right" valign="top"><a id="af7c57f65123422d735ed8d8447140680"></a>
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__IO <a class="el" href="unionRTC__GP__Type.html">RTC_GP_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structRtcMode2.html#af7c57f65123422d735ed8d8447140680">GP</a> [4]</td></tr>
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<tr class="memdesc:af7c57f65123422d735ed8d8447140680"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x40 (R/W 32) General Purpose. <br /></td></tr>
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<tr class="memitem:a631c85bf31ab10b6bc74d54a482f0931"><td class="memItemLeft" align="right" valign="top"><a id="a631c85bf31ab10b6bc74d54a482f0931"></a>
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<a class="el" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> </td><td class="memItemRight" valign="bottom"><b>Reserved5</b> [0x10]</td></tr>
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<tr class="separator:a631c85bf31ab10b6bc74d54a482f0931"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad7b32441de2dd0ba0fcf966bc4a11843"><td class="memItemLeft" align="right" valign="top"><a id="ad7b32441de2dd0ba0fcf966bc4a11843"></a>
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__IO <a class="el" href="unionRTC__TAMPCTRL__Type.html">RTC_TAMPCTRL_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structRtcMode2.html#ad7b32441de2dd0ba0fcf966bc4a11843">TAMPCTRL</a></td></tr>
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<tr class="memdesc:ad7b32441de2dd0ba0fcf966bc4a11843"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x60 (R/W 32) Tamper Control. <br /></td></tr>
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<tr class="separator:ad7b32441de2dd0ba0fcf966bc4a11843"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa45abdfc6f4f73b1276037a4de093d29"><td class="memItemLeft" align="right" valign="top"><a id="aa45abdfc6f4f73b1276037a4de093d29"></a>
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__I <a class="el" href="unionRTC__MODE2__TIMESTAMP__Type.html">RTC_MODE2_TIMESTAMP_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structRtcMode2.html#aa45abdfc6f4f73b1276037a4de093d29">TIMESTAMP</a></td></tr>
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<tr class="memdesc:aa45abdfc6f4f73b1276037a4de093d29"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x64 (R/ 32) MODE2 Timestamp. <br /></td></tr>
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<tr class="separator:aa45abdfc6f4f73b1276037a4de093d29"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:adebc39d95e7dec244e5636597ff307c6"><td class="memItemLeft" align="right" valign="top"><a id="adebc39d95e7dec244e5636597ff307c6"></a>
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__IO <a class="el" href="unionRTC__TAMPID__Type.html">RTC_TAMPID_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structRtcMode2.html#adebc39d95e7dec244e5636597ff307c6">TAMPID</a></td></tr>
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<tr class="memdesc:adebc39d95e7dec244e5636597ff307c6"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x68 (R/W 32) Tamper ID. <br /></td></tr>
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<tr class="separator:adebc39d95e7dec244e5636597ff307c6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1b38a6ed5843f064731f830c2be562cd"><td class="memItemLeft" align="right" valign="top"><a id="a1b38a6ed5843f064731f830c2be562cd"></a>
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<a class="el" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> </td><td class="memItemRight" valign="bottom"><b>Reserved6</b> [0x14]</td></tr>
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<tr class="separator:a1b38a6ed5843f064731f830c2be562cd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a563d4b654a6da750a8aa5b2fcfc24a48"><td class="memItemLeft" align="right" valign="top"><a id="a563d4b654a6da750a8aa5b2fcfc24a48"></a>
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__IO <a class="el" href="unionRTC__BKUP__Type.html">RTC_BKUP_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structRtcMode2.html#a563d4b654a6da750a8aa5b2fcfc24a48">BKUP</a> [8]</td></tr>
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<tr class="memdesc:a563d4b654a6da750a8aa5b2fcfc24a48"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x80 (R/W 32) Backup. <br /></td></tr>
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<tr class="separator:a563d4b654a6da750a8aa5b2fcfc24a48"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
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<div class="textblock"><p>RTC_MODE2 hardware registers. </p>
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<p class="definition">Definition at line <a class="el" href="component_2rtc_8h_source.html#l02062">2062</a> of file <a class="el" href="component_2rtc_8h_source.html">rtc.h</a>.</p>
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</div><hr/>The documentation for this struct was generated from the following file:<ul>
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<li>/storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/component/<a class="el" href="component_2rtc_8h_source.html">rtc.h</a></li>
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</ul>
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