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<div class="title">Dac Struct Reference</div> </div>
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<p>DAC hardware registers.
<a href="structDac.html#details">More...</a></p>
<p><code>#include &lt;<a class="el" href="component_2dac_8h_source.html">dac.h</a>&gt;</code></p>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a>
Data Fields</h2></td></tr>
<tr class="memitem:ae64d3013c578889b3bc5bc9f0cfda66e"><td class="memItemLeft" align="right" valign="top"><a id="ae64d3013c578889b3bc5bc9f0cfda66e"></a>
__IO <a class="el" href="unionDAC__CTRLA__Type.html">DAC_CTRLA_Type</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structDac.html#ae64d3013c578889b3bc5bc9f0cfda66e">CTRLA</a></td></tr>
<tr class="memdesc:ae64d3013c578889b3bc5bc9f0cfda66e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset: 0x00 (R/W 8) Control A. <br /></td></tr>
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__IO <a class="el" href="unionDAC__CTRLB__Type.html">DAC_CTRLB_Type</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structDac.html#a36fa8a7f785454c1af6d1bd41caa8e7a">CTRLB</a></td></tr>
<tr class="memdesc:a36fa8a7f785454c1af6d1bd41caa8e7a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset: 0x01 (R/W 8) Control B. <br /></td></tr>
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<a class="el" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a>&#160;</td><td class="memItemRight" valign="bottom"><b>Reserved1</b> [0x1]</td></tr>
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__IO <a class="el" href="unionDAC__INTENCLR__Type.html">DAC_INTENCLR_Type</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structDac.html#a02bfbb17949d48af6df846837a977723">INTENCLR</a></td></tr>
<tr class="memdesc:a02bfbb17949d48af6df846837a977723"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset: 0x04 (R/W 8) Interrupt Enable Clear. <br /></td></tr>
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__IO <a class="el" href="unionDAC__INTFLAG__Type.html">DAC_INTFLAG_Type</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structDac.html#aeafbfa143f0c3c637251a76946396ea9">INTFLAG</a></td></tr>
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<tr class="memdesc:a35c02595c7c67921e41a0d6d78cfe39e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset: 0x10 ( /W 16) DAC n Data. <br /></td></tr>
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<tr class="memdesc:a89b7cbc57ffaf876555e80d25a4b1d72"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset: 0x14 ( /W 16) DAC n Data Buffer. <br /></td></tr>
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<tr class="memdesc:a41d3f7de223368a4dd5d60ed5370947a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset: 0x18 (R/W 8) Debug Control. <br /></td></tr>
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<tr class="memdesc:ad8fa64e973fb5bcd3907233e39aac97f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset: 0x1C (R/ 16) Filter Result. <br /></td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>DAC hardware registers. </p>
<p class="definition">Definition at line <a class="el" href="component_2dac_8h_source.html#l00523">523</a> of file <a class="el" href="component_2dac_8h_source.html">dac.h</a>.</p>
</div><hr/>The documentation for this struct was generated from the following file:<ul>
<li>/storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/component/<a class="el" href="component_2dac_8h_source.html">dac.h</a></li>
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