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<li class="navelem"><a class="el" href="dir_ea9599923402ca8ab47fc3e495999dea.html">arch</a></li><li class="navelem"><a class="el" href="dir_9e929c73feaf15d3695ce4c76b483065.html">arm</a></li><li class="navelem"><a class="el" href="dir_58955c0f35a9c3d48181d2be53994c7b.html">SAME54</a></li><li class="navelem"><a class="el" href="dir_09e97e512ca7d4e6cd359f1c5497eeba.html">SAME54A</a></li><li class="navelem"><a class="el" href="dir_4b38d63e5c584a4d6c9001c789e1829f.html">mcu</a></li><li class="navelem"><a class="el" href="dir_d4fc57b996dc082ef023092a5b7d90fc.html">inc</a></li><li class="navelem"><a class="el" href="dir_92b117bae75cf16a05ca7611db29e9c7.html">instance</a></li> </ul>
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<div class="title">sercom5.h</div> </div>
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<div class="contents">
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<a href="sercom5_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>  </div>
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<div class="line"><a name="l00030"></a><span class="lineno"> 30</span> <span class="preprocessor">#ifndef _SAME54_SERCOM5_INSTANCE_</span></div>
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<div class="line"><a name="l00031"></a><span class="lineno"> 31</span> <span class="preprocessor">#define _SAME54_SERCOM5_INSTANCE_</span></div>
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<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>  </div>
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<div class="line"><a name="l00033"></a><span class="lineno"> 33</span> <span class="comment">/* ========== Register definition for SERCOM5 peripheral ========== */</span></div>
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<div class="line"><a name="l00034"></a><span class="lineno"> 34</span> <span class="preprocessor">#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
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<div class="line"><a name="l00035"></a><span class="lineno"> 35</span> <span class="preprocessor">#define REG_SERCOM5_I2CM_CTRLA (0x43000400) </span></div>
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<div class="line"><a name="l00036"></a><span class="lineno"> 36</span> <span class="preprocessor">#define REG_SERCOM5_I2CM_CTRLB (0x43000404) </span></div>
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<div class="line"><a name="l00037"></a><span class="lineno"> 37</span> <span class="preprocessor">#define REG_SERCOM5_I2CM_CTRLC (0x43000408) </span></div>
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<div class="line"><a name="l00038"></a><span class="lineno"> 38</span> <span class="preprocessor">#define REG_SERCOM5_I2CM_BAUD (0x4300040C) </span></div>
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<div class="line"><a name="l00039"></a><span class="lineno"> 39</span> <span class="preprocessor">#define REG_SERCOM5_I2CM_INTENCLR (0x43000414) </span></div>
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<div class="line"><a name="l00040"></a><span class="lineno"> 40</span> <span class="preprocessor">#define REG_SERCOM5_I2CM_INTENSET (0x43000416) </span></div>
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<div class="line"><a name="l00041"></a><span class="lineno"> 41</span> <span class="preprocessor">#define REG_SERCOM5_I2CM_INTFLAG (0x43000418) </span></div>
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<div class="line"><a name="l00042"></a><span class="lineno"> 42</span> <span class="preprocessor">#define REG_SERCOM5_I2CM_STATUS (0x4300041A) </span></div>
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<div class="line"><a name="l00043"></a><span class="lineno"> 43</span> <span class="preprocessor">#define REG_SERCOM5_I2CM_SYNCBUSY (0x4300041C) </span></div>
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<div class="line"><a name="l00044"></a><span class="lineno"> 44</span> <span class="preprocessor">#define REG_SERCOM5_I2CM_ADDR (0x43000424) </span></div>
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<div class="line"><a name="l00045"></a><span class="lineno"> 45</span> <span class="preprocessor">#define REG_SERCOM5_I2CM_DATA (0x43000428) </span></div>
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<div class="line"><a name="l00046"></a><span class="lineno"> 46</span> <span class="preprocessor">#define REG_SERCOM5_I2CM_DBGCTRL (0x43000430) </span></div>
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<div class="line"><a name="l00047"></a><span class="lineno"> 47</span> <span class="preprocessor">#define REG_SERCOM5_I2CS_CTRLA (0x43000400) </span></div>
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<div class="line"><a name="l00048"></a><span class="lineno"> 48</span> <span class="preprocessor">#define REG_SERCOM5_I2CS_CTRLB (0x43000404) </span></div>
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<div class="line"><a name="l00049"></a><span class="lineno"> 49</span> <span class="preprocessor">#define REG_SERCOM5_I2CS_CTRLC (0x43000408) </span></div>
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<div class="line"><a name="l00050"></a><span class="lineno"> 50</span> <span class="preprocessor">#define REG_SERCOM5_I2CS_INTENCLR (0x43000414) </span></div>
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<div class="line"><a name="l00051"></a><span class="lineno"> 51</span> <span class="preprocessor">#define REG_SERCOM5_I2CS_INTENSET (0x43000416) </span></div>
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<div class="line"><a name="l00052"></a><span class="lineno"> 52</span> <span class="preprocessor">#define REG_SERCOM5_I2CS_INTFLAG (0x43000418) </span></div>
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<div class="line"><a name="l00053"></a><span class="lineno"> 53</span> <span class="preprocessor">#define REG_SERCOM5_I2CS_STATUS (0x4300041A) </span></div>
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<div class="line"><a name="l00054"></a><span class="lineno"> 54</span> <span class="preprocessor">#define REG_SERCOM5_I2CS_SYNCBUSY (0x4300041C) </span></div>
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<div class="line"><a name="l00055"></a><span class="lineno"> 55</span> <span class="preprocessor">#define REG_SERCOM5_I2CS_LENGTH (0x43000422) </span></div>
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<div class="line"><a name="l00056"></a><span class="lineno"> 56</span> <span class="preprocessor">#define REG_SERCOM5_I2CS_ADDR (0x43000424) </span></div>
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<div class="line"><a name="l00057"></a><span class="lineno"> 57</span> <span class="preprocessor">#define REG_SERCOM5_I2CS_DATA (0x43000428) </span></div>
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<div class="line"><a name="l00058"></a><span class="lineno"> 58</span> <span class="preprocessor">#define REG_SERCOM5_SPI_CTRLA (0x43000400) </span></div>
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<div class="line"><a name="l00059"></a><span class="lineno"> 59</span> <span class="preprocessor">#define REG_SERCOM5_SPI_CTRLB (0x43000404) </span></div>
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<div class="line"><a name="l00060"></a><span class="lineno"> 60</span> <span class="preprocessor">#define REG_SERCOM5_SPI_CTRLC (0x43000408) </span></div>
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<div class="line"><a name="l00061"></a><span class="lineno"> 61</span> <span class="preprocessor">#define REG_SERCOM5_SPI_BAUD (0x4300040C) </span></div>
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<div class="line"><a name="l00062"></a><span class="lineno"> 62</span> <span class="preprocessor">#define REG_SERCOM5_SPI_INTENCLR (0x43000414) </span></div>
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<div class="line"><a name="l00063"></a><span class="lineno"> 63</span> <span class="preprocessor">#define REG_SERCOM5_SPI_INTENSET (0x43000416) </span></div>
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<div class="line"><a name="l00064"></a><span class="lineno"> 64</span> <span class="preprocessor">#define REG_SERCOM5_SPI_INTFLAG (0x43000418) </span></div>
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<div class="line"><a name="l00065"></a><span class="lineno"> 65</span> <span class="preprocessor">#define REG_SERCOM5_SPI_STATUS (0x4300041A) </span></div>
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<div class="line"><a name="l00066"></a><span class="lineno"> 66</span> <span class="preprocessor">#define REG_SERCOM5_SPI_SYNCBUSY (0x4300041C) </span></div>
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<div class="line"><a name="l00067"></a><span class="lineno"> 67</span> <span class="preprocessor">#define REG_SERCOM5_SPI_LENGTH (0x43000422) </span></div>
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<div class="line"><a name="l00068"></a><span class="lineno"> 68</span> <span class="preprocessor">#define REG_SERCOM5_SPI_ADDR (0x43000424) </span></div>
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<div class="line"><a name="l00069"></a><span class="lineno"> 69</span> <span class="preprocessor">#define REG_SERCOM5_SPI_DATA (0x43000428) </span></div>
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<div class="line"><a name="l00070"></a><span class="lineno"> 70</span> <span class="preprocessor">#define REG_SERCOM5_SPI_DBGCTRL (0x43000430) </span></div>
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<div class="line"><a name="l00071"></a><span class="lineno"> 71</span> <span class="preprocessor">#define REG_SERCOM5_USART_CTRLA (0x43000400) </span></div>
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<div class="line"><a name="l00072"></a><span class="lineno"> 72</span> <span class="preprocessor">#define REG_SERCOM5_USART_CTRLB (0x43000404) </span></div>
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<div class="line"><a name="l00073"></a><span class="lineno"> 73</span> <span class="preprocessor">#define REG_SERCOM5_USART_CTRLC (0x43000408) </span></div>
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<div class="line"><a name="l00074"></a><span class="lineno"> 74</span> <span class="preprocessor">#define REG_SERCOM5_USART_BAUD (0x4300040C) </span></div>
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<div class="line"><a name="l00075"></a><span class="lineno"> 75</span> <span class="preprocessor">#define REG_SERCOM5_USART_RXPL (0x4300040E) </span></div>
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<div class="line"><a name="l00076"></a><span class="lineno"> 76</span> <span class="preprocessor">#define REG_SERCOM5_USART_INTENCLR (0x43000414) </span></div>
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<div class="line"><a name="l00077"></a><span class="lineno"> 77</span> <span class="preprocessor">#define REG_SERCOM5_USART_INTENSET (0x43000416) </span></div>
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<div class="line"><a name="l00078"></a><span class="lineno"> 78</span> <span class="preprocessor">#define REG_SERCOM5_USART_INTFLAG (0x43000418) </span></div>
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<div class="line"><a name="l00079"></a><span class="lineno"> 79</span> <span class="preprocessor">#define REG_SERCOM5_USART_STATUS (0x4300041A) </span></div>
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<div class="line"><a name="l00080"></a><span class="lineno"> 80</span> <span class="preprocessor">#define REG_SERCOM5_USART_SYNCBUSY (0x4300041C) </span></div>
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<div class="line"><a name="l00081"></a><span class="lineno"> 81</span> <span class="preprocessor">#define REG_SERCOM5_USART_RXERRCNT (0x43000420) </span></div>
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<div class="line"><a name="l00082"></a><span class="lineno"> 82</span> <span class="preprocessor">#define REG_SERCOM5_USART_LENGTH (0x43000422) </span></div>
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<div class="line"><a name="l00083"></a><span class="lineno"> 83</span> <span class="preprocessor">#define REG_SERCOM5_USART_DATA (0x43000428) </span></div>
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<div class="line"><a name="l00084"></a><span class="lineno"> 84</span> <span class="preprocessor">#define REG_SERCOM5_USART_DBGCTRL (0x43000430) </span></div>
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<div class="line"><a name="l00085"></a><span class="lineno"> 85</span> <span class="preprocessor">#else</span></div>
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<div class="line"><a name="l00086"></a><span class="lineno"><a class="line" href="sercom5_8h.html#a0de8b79a3ebdd73a72c849c97f8e620c"> 86</a></span> <span class="preprocessor">#define REG_SERCOM5_I2CM_CTRLA (*(RwReg *)0x43000400UL) </span></div>
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<div class="line"><a name="l00087"></a><span class="lineno"><a class="line" href="sercom5_8h.html#a5ec3c9b1c81a1bdc4accc5d37083ad61"> 87</a></span> <span class="preprocessor">#define REG_SERCOM5_I2CM_CTRLB (*(RwReg *)0x43000404UL) </span></div>
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<div class="line"><a name="l00088"></a><span class="lineno"><a class="line" href="sercom5_8h.html#afd6788e3dd3bed804063f85fdbc17d95"> 88</a></span> <span class="preprocessor">#define REG_SERCOM5_I2CM_CTRLC (*(RwReg *)0x43000408UL) </span></div>
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<div class="line"><a name="l00089"></a><span class="lineno"><a class="line" href="sercom5_8h.html#ab6ba79cb18d9dbe8dd81b03e5c012bcb"> 89</a></span> <span class="preprocessor">#define REG_SERCOM5_I2CM_BAUD (*(RwReg *)0x4300040CUL) </span></div>
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<div class="line"><a name="l00090"></a><span class="lineno"><a class="line" href="sercom5_8h.html#a43ecedec11c46e630fd2c69c7f371d70"> 90</a></span> <span class="preprocessor">#define REG_SERCOM5_I2CM_INTENCLR (*(RwReg8 *)0x43000414UL) </span></div>
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<div class="line"><a name="l00091"></a><span class="lineno"><a class="line" href="sercom5_8h.html#a89c95de38163ff7109565927f60af5a3"> 91</a></span> <span class="preprocessor">#define REG_SERCOM5_I2CM_INTENSET (*(RwReg8 *)0x43000416UL) </span></div>
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<div class="line"><a name="l00092"></a><span class="lineno"><a class="line" href="sercom5_8h.html#a9e4b3f5a5f4440fc899f03272a22cd0f"> 92</a></span> <span class="preprocessor">#define REG_SERCOM5_I2CM_INTFLAG (*(RwReg8 *)0x43000418UL) </span></div>
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<div class="line"><a name="l00093"></a><span class="lineno"><a class="line" href="sercom5_8h.html#a1745325a96793079cca5ab96c084b42d"> 93</a></span> <span class="preprocessor">#define REG_SERCOM5_I2CM_STATUS (*(RwReg16*)0x4300041AUL) </span></div>
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<div class="line"><a name="l00094"></a><span class="lineno"><a class="line" href="sercom5_8h.html#a7543f246d311b0298d1e906a700b95dd"> 94</a></span> <span class="preprocessor">#define REG_SERCOM5_I2CM_SYNCBUSY (*(RoReg *)0x4300041CUL) </span></div>
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<div class="line"><a name="l00095"></a><span class="lineno"><a class="line" href="sercom5_8h.html#a8048f0a77f768395dd9a82058732edb3"> 95</a></span> <span class="preprocessor">#define REG_SERCOM5_I2CM_ADDR (*(RwReg *)0x43000424UL) </span></div>
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<div class="line"><a name="l00096"></a><span class="lineno"><a class="line" href="sercom5_8h.html#a3ee5bd41549748b815770187b3e9cf66"> 96</a></span> <span class="preprocessor">#define REG_SERCOM5_I2CM_DATA (*(RwReg *)0x43000428UL) </span></div>
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<div class="line"><a name="l00097"></a><span class="lineno"><a class="line" href="sercom5_8h.html#af9e1f772ce74a1a8411cf6f864f5bc01"> 97</a></span> <span class="preprocessor">#define REG_SERCOM5_I2CM_DBGCTRL (*(RwReg8 *)0x43000430UL) </span></div>
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<div class="line"><a name="l00098"></a><span class="lineno"><a class="line" href="sercom5_8h.html#aba9449b7c4a3547389add2d8382ebb11"> 98</a></span> <span class="preprocessor">#define REG_SERCOM5_I2CS_CTRLA (*(RwReg *)0x43000400UL) </span></div>
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<div class="line"><a name="l00099"></a><span class="lineno"><a class="line" href="sercom5_8h.html#a9a524c4a0aaef3857fe66f480470a191"> 99</a></span> <span class="preprocessor">#define REG_SERCOM5_I2CS_CTRLB (*(RwReg *)0x43000404UL) </span></div>
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<div class="line"><a name="l00100"></a><span class="lineno"><a class="line" href="sercom5_8h.html#a54f6b87654fd8162f2b5666a4c8cbade"> 100</a></span> <span class="preprocessor">#define REG_SERCOM5_I2CS_CTRLC (*(RwReg *)0x43000408UL) </span></div>
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<div class="line"><a name="l00101"></a><span class="lineno"><a class="line" href="sercom5_8h.html#a14313f32808ee08f5db015ada5878810"> 101</a></span> <span class="preprocessor">#define REG_SERCOM5_I2CS_INTENCLR (*(RwReg8 *)0x43000414UL) </span></div>
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<div class="line"><a name="l00102"></a><span class="lineno"><a class="line" href="sercom5_8h.html#a3da4380f924035cc3c87aabf689d6ec3"> 102</a></span> <span class="preprocessor">#define REG_SERCOM5_I2CS_INTENSET (*(RwReg8 *)0x43000416UL) </span></div>
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<div class="line"><a name="l00103"></a><span class="lineno"><a class="line" href="sercom5_8h.html#a2793f0ca16677bdd2f1d26090dbc0045"> 103</a></span> <span class="preprocessor">#define REG_SERCOM5_I2CS_INTFLAG (*(RwReg8 *)0x43000418UL) </span></div>
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<div class="line"><a name="l00104"></a><span class="lineno"><a class="line" href="sercom5_8h.html#ad5d5d3ec13b0679f1741ac939e248d6c"> 104</a></span> <span class="preprocessor">#define REG_SERCOM5_I2CS_STATUS (*(RwReg16*)0x4300041AUL) </span></div>
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<div class="line"><a name="l00105"></a><span class="lineno"><a class="line" href="sercom5_8h.html#a641630bf82e85a8ef0a5054e5a466a97"> 105</a></span> <span class="preprocessor">#define REG_SERCOM5_I2CS_SYNCBUSY (*(RoReg *)0x4300041CUL) </span></div>
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<div class="line"><a name="l00106"></a><span class="lineno"><a class="line" href="sercom5_8h.html#ac563a33a6b486d6c93a8ab292a358cfb"> 106</a></span> <span class="preprocessor">#define REG_SERCOM5_I2CS_LENGTH (*(RwReg16*)0x43000422UL) </span></div>
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<div class="line"><a name="l00107"></a><span class="lineno"><a class="line" href="sercom5_8h.html#ad5daeb767eef5f4e23bce462d9e0bd35"> 107</a></span> <span class="preprocessor">#define REG_SERCOM5_I2CS_ADDR (*(RwReg *)0x43000424UL) </span></div>
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<div class="line"><a name="l00108"></a><span class="lineno"><a class="line" href="sercom5_8h.html#af14d97e9f92359cc2573bdab52769fb0"> 108</a></span> <span class="preprocessor">#define REG_SERCOM5_I2CS_DATA (*(RwReg *)0x43000428UL) </span></div>
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<div class="line"><a name="l00109"></a><span class="lineno"><a class="line" href="sercom5_8h.html#ad4a9bba22626064a5fbe13207eafc3a3"> 109</a></span> <span class="preprocessor">#define REG_SERCOM5_SPI_CTRLA (*(RwReg *)0x43000400UL) </span></div>
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<div class="line"><a name="l00110"></a><span class="lineno"><a class="line" href="sercom5_8h.html#a3ddf065a6dab6b05bd543c5c140a3cf8"> 110</a></span> <span class="preprocessor">#define REG_SERCOM5_SPI_CTRLB (*(RwReg *)0x43000404UL) </span></div>
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<div class="line"><a name="l00111"></a><span class="lineno"><a class="line" href="sercom5_8h.html#adf8c430aea13e5f794dc360c8e7c037c"> 111</a></span> <span class="preprocessor">#define REG_SERCOM5_SPI_CTRLC (*(RwReg *)0x43000408UL) </span></div>
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<div class="line"><a name="l00112"></a><span class="lineno"><a class="line" href="sercom5_8h.html#abf2566576c05a359bd1b64b5cc0dcbac"> 112</a></span> <span class="preprocessor">#define REG_SERCOM5_SPI_BAUD (*(RwReg8 *)0x4300040CUL) </span></div>
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<div class="line"><a name="l00113"></a><span class="lineno"><a class="line" href="sercom5_8h.html#a181b326b5d1a04581ffcfd9c2aacefc2"> 113</a></span> <span class="preprocessor">#define REG_SERCOM5_SPI_INTENCLR (*(RwReg8 *)0x43000414UL) </span></div>
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<div class="line"><a name="l00114"></a><span class="lineno"><a class="line" href="sercom5_8h.html#a376c1095857537bfa4388567cb844907"> 114</a></span> <span class="preprocessor">#define REG_SERCOM5_SPI_INTENSET (*(RwReg8 *)0x43000416UL) </span></div>
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<div class="line"><a name="l00115"></a><span class="lineno"><a class="line" href="sercom5_8h.html#a292d991c16b35c156ecfe2d84f1dd8c3"> 115</a></span> <span class="preprocessor">#define REG_SERCOM5_SPI_INTFLAG (*(RwReg8 *)0x43000418UL) </span></div>
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<div class="line"><a name="l00116"></a><span class="lineno"><a class="line" href="sercom5_8h.html#a09d44746c58fd86d36dbd51f23d2fc78"> 116</a></span> <span class="preprocessor">#define REG_SERCOM5_SPI_STATUS (*(RwReg16*)0x4300041AUL) </span></div>
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<div class="line"><a name="l00117"></a><span class="lineno"><a class="line" href="sercom5_8h.html#a6c956d8dcd153027f74efaa097c4c820"> 117</a></span> <span class="preprocessor">#define REG_SERCOM5_SPI_SYNCBUSY (*(RoReg *)0x4300041CUL) </span></div>
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<div class="line"><a name="l00118"></a><span class="lineno"><a class="line" href="sercom5_8h.html#a36e4800682bbecd6ee6c87fd78e45e18"> 118</a></span> <span class="preprocessor">#define REG_SERCOM5_SPI_LENGTH (*(RwReg16*)0x43000422UL) </span></div>
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<div class="line"><a name="l00119"></a><span class="lineno"><a class="line" href="sercom5_8h.html#ae7c70e9fbcb3289a32b1b526e01c29e2"> 119</a></span> <span class="preprocessor">#define REG_SERCOM5_SPI_ADDR (*(RwReg *)0x43000424UL) </span></div>
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<div class="line"><a name="l00120"></a><span class="lineno"><a class="line" href="sercom5_8h.html#a0389e07e9b75d8e035984f1dadff0e23"> 120</a></span> <span class="preprocessor">#define REG_SERCOM5_SPI_DATA (*(RwReg *)0x43000428UL) </span></div>
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<div class="line"><a name="l00121"></a><span class="lineno"><a class="line" href="sercom5_8h.html#ae446fc6c50800598a456cdde2598313b"> 121</a></span> <span class="preprocessor">#define REG_SERCOM5_SPI_DBGCTRL (*(RwReg8 *)0x43000430UL) </span></div>
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<div class="line"><a name="l00122"></a><span class="lineno"><a class="line" href="sercom5_8h.html#a4eaa0d321f1a3c39545541d3d1e04708"> 122</a></span> <span class="preprocessor">#define REG_SERCOM5_USART_CTRLA (*(RwReg *)0x43000400UL) </span></div>
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<div class="line"><a name="l00123"></a><span class="lineno"><a class="line" href="sercom5_8h.html#a0ebc02aeed689ce2d7071a5db1480532"> 123</a></span> <span class="preprocessor">#define REG_SERCOM5_USART_CTRLB (*(RwReg *)0x43000404UL) </span></div>
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<div class="line"><a name="l00124"></a><span class="lineno"><a class="line" href="sercom5_8h.html#ac107d68f762060780258ad2cde241d36"> 124</a></span> <span class="preprocessor">#define REG_SERCOM5_USART_CTRLC (*(RwReg *)0x43000408UL) </span></div>
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<div class="line"><a name="l00125"></a><span class="lineno"><a class="line" href="sercom5_8h.html#a293c40d5b5695b6d361f119b55521436"> 125</a></span> <span class="preprocessor">#define REG_SERCOM5_USART_BAUD (*(RwReg16*)0x4300040CUL) </span></div>
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<div class="line"><a name="l00126"></a><span class="lineno"><a class="line" href="sercom5_8h.html#a2a51f3cbe63be4191cf612eedd7c7851"> 126</a></span> <span class="preprocessor">#define REG_SERCOM5_USART_RXPL (*(RwReg8 *)0x4300040EUL) </span></div>
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<div class="line"><a name="l00127"></a><span class="lineno"><a class="line" href="sercom5_8h.html#a2aad4967f4484c667f3a0e12193072a6"> 127</a></span> <span class="preprocessor">#define REG_SERCOM5_USART_INTENCLR (*(RwReg8 *)0x43000414UL) </span></div>
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<div class="line"><a name="l00128"></a><span class="lineno"><a class="line" href="sercom5_8h.html#a7866dc9477aeb7b5bfb044d0f47c9c92"> 128</a></span> <span class="preprocessor">#define REG_SERCOM5_USART_INTENSET (*(RwReg8 *)0x43000416UL) </span></div>
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<div class="line"><a name="l00129"></a><span class="lineno"><a class="line" href="sercom5_8h.html#acc589f71ca926b95d4fa53ad76e4d8f1"> 129</a></span> <span class="preprocessor">#define REG_SERCOM5_USART_INTFLAG (*(RwReg8 *)0x43000418UL) </span></div>
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<div class="line"><a name="l00130"></a><span class="lineno"><a class="line" href="sercom5_8h.html#a5db75f5f2699111dd2b18caee6e50de6"> 130</a></span> <span class="preprocessor">#define REG_SERCOM5_USART_STATUS (*(RwReg16*)0x4300041AUL) </span></div>
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<div class="line"><a name="l00131"></a><span class="lineno"><a class="line" href="sercom5_8h.html#ab24ecaedcb5abcc9282e8b3ed7d2263a"> 131</a></span> <span class="preprocessor">#define REG_SERCOM5_USART_SYNCBUSY (*(RoReg *)0x4300041CUL) </span></div>
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<div class="line"><a name="l00132"></a><span class="lineno"><a class="line" href="sercom5_8h.html#a27d4eb24d6616810cb6947275c371ab7"> 132</a></span> <span class="preprocessor">#define REG_SERCOM5_USART_RXERRCNT (*(RoReg8 *)0x43000420UL) </span></div>
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<div class="line"><a name="l00133"></a><span class="lineno"><a class="line" href="sercom5_8h.html#a4eab1dcd27be1f24f5566be2e757ac75"> 133</a></span> <span class="preprocessor">#define REG_SERCOM5_USART_LENGTH (*(RwReg16*)0x43000422UL) </span></div>
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<div class="line"><a name="l00134"></a><span class="lineno"><a class="line" href="sercom5_8h.html#ada4fe87a38180eb6d85018442701b2ea"> 134</a></span> <span class="preprocessor">#define REG_SERCOM5_USART_DATA (*(RwReg *)0x43000428UL) </span></div>
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<div class="line"><a name="l00135"></a><span class="lineno"><a class="line" href="sercom5_8h.html#a5210226c095561549a0937d60df2e150"> 135</a></span> <span class="preprocessor">#define REG_SERCOM5_USART_DBGCTRL (*(RwReg8 *)0x43000430UL) </span></div>
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<div class="line"><a name="l00136"></a><span class="lineno"> 136</span> <span class="preprocessor">#endif </span><span class="comment">/* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
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<div class="line"><a name="l00137"></a><span class="lineno"> 137</span>  </div>
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<div class="line"><a name="l00138"></a><span class="lineno"> 138</span> <span class="comment">/* ========== Instance parameters for SERCOM5 peripheral ========== */</span></div>
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<div class="line"><a name="l00139"></a><span class="lineno"> 139</span> <span class="preprocessor">#define SERCOM5_CLK_REDUCTION 1 // Reduce clock options to pin 1 for SPI and USART</span></div>
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<div class="line"><a name="l00140"></a><span class="lineno"> 140</span> <span class="preprocessor">#define SERCOM5_DLY_COMPENSATION 1 // Compensates for a fast DLY50 element. Assuming 20ns</span></div>
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<div class="line"><a name="l00141"></a><span class="lineno"> 141</span> <span class="preprocessor">#define SERCOM5_DMA 1 // DMA support implemented?</span></div>
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<div class="line"><a name="l00142"></a><span class="lineno"> 142</span> <span class="preprocessor">#define SERCOM5_DMAC_ID_RX 14 // Index of DMA RX trigger</span></div>
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<div class="line"><a name="l00143"></a><span class="lineno"> 143</span> <span class="preprocessor">#define SERCOM5_DMAC_ID_TX 15 // Index of DMA TX trigger</span></div>
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<div class="line"><a name="l00144"></a><span class="lineno"> 144</span> <span class="preprocessor">#define SERCOM5_FIFO_DEPTH_POWER 1 // 2^FIFO_DEPTH_POWER gives rx FIFO depth.</span></div>
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<div class="line"><a name="l00145"></a><span class="lineno"> 145</span> <span class="preprocessor">#define SERCOM5_GCLK_ID_CORE 35 </span></div>
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<div class="line"><a name="l00146"></a><span class="lineno"> 146</span> <span class="preprocessor">#define SERCOM5_GCLK_ID_SLOW 3 </span></div>
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<div class="line"><a name="l00147"></a><span class="lineno"> 147</span> <span class="preprocessor">#define SERCOM5_INT_MSB 6 </span></div>
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<div class="line"><a name="l00148"></a><span class="lineno"> 148</span> <span class="preprocessor">#define SERCOM5_I2CM 1 // I2C Master mode implemented?</span></div>
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<div class="line"><a name="l00149"></a><span class="lineno"> 149</span> <span class="preprocessor">#define SERCOM5_I2CS 1 // I2C Slave mode implemented?</span></div>
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<div class="line"><a name="l00150"></a><span class="lineno"> 150</span> <span class="preprocessor">#define SERCOM5_I2CS_AUTO_ACK 1 // I2C slave automatic acknowledge implemented?</span></div>
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<div class="line"><a name="l00151"></a><span class="lineno"> 151</span> <span class="preprocessor">#define SERCOM5_I2CS_GROUP_CMD 1 // I2C slave group command implemented?</span></div>
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<div class="line"><a name="l00152"></a><span class="lineno"> 152</span> <span class="preprocessor">#define SERCOM5_I2CS_SDASETUP_CNT_SIZE 8 // I2CS sda setup count size</span></div>
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<div class="line"><a name="l00153"></a><span class="lineno"> 153</span> <span class="preprocessor">#define SERCOM5_I2CS_SDASETUP_SIZE 4 // I2CS sda setup size</span></div>
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<div class="line"><a name="l00154"></a><span class="lineno"> 154</span> <span class="preprocessor">#define SERCOM5_I2CS_SUDAT 1 // I2C slave SDA setup implemented?</span></div>
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<div class="line"><a name="l00155"></a><span class="lineno"> 155</span> <span class="preprocessor">#define SERCOM5_I2C_FASTMP 1 // I2C fast mode plus implemented?</span></div>
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<div class="line"><a name="l00156"></a><span class="lineno"> 156</span> <span class="preprocessor">#define SERCOM5_I2C_HSMODE 1 // USART mode implemented?</span></div>
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<div class="line"><a name="l00157"></a><span class="lineno"> 157</span> <span class="preprocessor">#define SERCOM5_I2C_SCLSM_MODE 1 // I2C SCL clock stretch mode implemented?</span></div>
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<div class="line"><a name="l00158"></a><span class="lineno"> 158</span> <span class="preprocessor">#define SERCOM5_I2C_SMB_TIMEOUTS 1 // I2C SMBus timeouts implemented?</span></div>
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<div class="line"><a name="l00159"></a><span class="lineno"> 159</span> <span class="preprocessor">#define SERCOM5_I2C_TENBIT_ADR 1 // I2C ten bit enabled?</span></div>
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<div class="line"><a name="l00160"></a><span class="lineno"> 160</span> <span class="preprocessor">#define SERCOM5_PMSB 3 </span></div>
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<div class="line"><a name="l00161"></a><span class="lineno"> 161</span> <span class="preprocessor">#define SERCOM5_RETENTION_SUPPORT 0 // Retention supported?</span></div>
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<div class="line"><a name="l00162"></a><span class="lineno"> 162</span> <span class="preprocessor">#define SERCOM5_SE_CNT 1 // SE counter included?</span></div>
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<div class="line"><a name="l00163"></a><span class="lineno"> 163</span> <span class="preprocessor">#define SERCOM5_SPI 1 // SPI mode implemented?</span></div>
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<div class="line"><a name="l00164"></a><span class="lineno"> 164</span> <span class="preprocessor">#define SERCOM5_SPI_HW_SS_CTRL 1 // Master _SS hardware control implemented?</span></div>
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<div class="line"><a name="l00165"></a><span class="lineno"> 165</span> <span class="preprocessor">#define SERCOM5_SPI_ICSPACE_EXT 1 // SPI inter character space implemented?</span></div>
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<div class="line"><a name="l00166"></a><span class="lineno"> 166</span> <span class="preprocessor">#define SERCOM5_SPI_OZMO 0 // OZMO features implemented?</span></div>
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<div class="line"><a name="l00167"></a><span class="lineno"> 167</span> <span class="preprocessor">#define SERCOM5_SPI_WAKE_ON_SSL 1 // _SS low detect implemented?</span></div>
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<div class="line"><a name="l00168"></a><span class="lineno"> 168</span> <span class="preprocessor">#define SERCOM5_TTBIT_EXTENSION 1 // 32-bit extension implemented?</span></div>
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<div class="line"><a name="l00169"></a><span class="lineno"> 169</span> <span class="preprocessor">#define SERCOM5_USART 1 // USART mode implemented?</span></div>
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<div class="line"><a name="l00170"></a><span class="lineno"> 170</span> <span class="preprocessor">#define SERCOM5_USART_AUTOBAUD 1 // USART autobaud implemented?</span></div>
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<div class="line"><a name="l00171"></a><span class="lineno"> 171</span> <span class="preprocessor">#define SERCOM5_USART_COLDET 1 // USART collision detection implemented?</span></div>
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<div class="line"><a name="l00172"></a><span class="lineno"> 172</span> <span class="preprocessor">#define SERCOM5_USART_FLOW_CTRL 1 // USART flow control implemented?</span></div>
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<div class="line"><a name="l00173"></a><span class="lineno"> 173</span> <span class="preprocessor">#define SERCOM5_USART_FRAC_BAUD 1 // USART fractional BAUD implemented?</span></div>
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<div class="line"><a name="l00174"></a><span class="lineno"> 174</span> <span class="preprocessor">#define SERCOM5_USART_IRDA 1 // USART IrDA implemented?</span></div>
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<div class="line"><a name="l00175"></a><span class="lineno"> 175</span> <span class="preprocessor">#define SERCOM5_USART_ISO7816 1 // USART ISO7816 mode implemented?</span></div>
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<div class="line"><a name="l00176"></a><span class="lineno"> 176</span> <span class="preprocessor">#define SERCOM5_USART_LIN_MASTER 1 // USART LIN Master mode implemented?</span></div>
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<div class="line"><a name="l00177"></a><span class="lineno"> 177</span> <span class="preprocessor">#define SERCOM5_USART_RS485 1 // USART RS485 mode implemented?</span></div>
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<div class="line"><a name="l00178"></a><span class="lineno"> 178</span> <span class="preprocessor">#define SERCOM5_USART_SAMPA_EXT 1 // USART sample adjust implemented?</span></div>
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<div class="line"><a name="l00179"></a><span class="lineno"> 179</span> <span class="preprocessor">#define SERCOM5_USART_SAMPR_EXT 1 // USART oversampling adjustment implemented?</span></div>
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<div class="line"><a name="l00180"></a><span class="lineno"> 180</span>  </div>
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<div class="line"><a name="l00181"></a><span class="lineno"> 181</span> <span class="preprocessor">#endif </span><span class="comment">/* _SAME54_SERCOM5_INSTANCE_ */</span><span class="preprocessor"></span></div>
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