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419 lines
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<title>SAME54P20A Test Project: /storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/instance/sercom2.h File Reference</title>
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<li class="navelem"><a class="el" href="dir_ea9599923402ca8ab47fc3e495999dea.html">arch</a></li><li class="navelem"><a class="el" href="dir_9e929c73feaf15d3695ce4c76b483065.html">arm</a></li><li class="navelem"><a class="el" href="dir_58955c0f35a9c3d48181d2be53994c7b.html">SAME54</a></li><li class="navelem"><a class="el" href="dir_09e97e512ca7d4e6cd359f1c5497eeba.html">SAME54A</a></li><li class="navelem"><a class="el" href="dir_4b38d63e5c584a4d6c9001c789e1829f.html">mcu</a></li><li class="navelem"><a class="el" href="dir_d4fc57b996dc082ef023092a5b7d90fc.html">inc</a></li><li class="navelem"><a class="el" href="dir_92b117bae75cf16a05ca7611db29e9c7.html">instance</a></li> </ul>
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<a href="#define-members">Macros</a> </div>
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<div class="title">sercom2.h File Reference</div> </div>
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</div><!--header-->
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<div class="contents">
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<p>Instance description for SERCOM2.
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<a href="#details">More...</a></p>
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<p><a href="sercom2_8h_source.html">Go to the source code of this file.</a></p>
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<table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
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Macros</h2></td></tr>
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<tr class="memitem:a1bdbfff5e0becd3a72b10c84ac074767"><td class="memItemLeft" align="right" valign="top"><a id="a1bdbfff5e0becd3a72b10c84ac074767"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#a1bdbfff5e0becd3a72b10c84ac074767">REG_SERCOM2_I2CM_CTRLA</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41012000UL)</td></tr>
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<tr class="memdesc:a1bdbfff5e0becd3a72b10c84ac074767"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) I2CM Control A <br /></td></tr>
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<tr class="separator:a1bdbfff5e0becd3a72b10c84ac074767"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1fb8870a044a6bc2fac420a0995795bd"><td class="memItemLeft" align="right" valign="top"><a id="a1fb8870a044a6bc2fac420a0995795bd"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#a1fb8870a044a6bc2fac420a0995795bd">REG_SERCOM2_I2CM_CTRLB</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41012004UL)</td></tr>
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<tr class="memdesc:a1fb8870a044a6bc2fac420a0995795bd"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) I2CM Control B <br /></td></tr>
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<tr class="separator:a1fb8870a044a6bc2fac420a0995795bd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a019978b93fe935f65d8ead85d6793865"><td class="memItemLeft" align="right" valign="top"><a id="a019978b93fe935f65d8ead85d6793865"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#a019978b93fe935f65d8ead85d6793865">REG_SERCOM2_I2CM_CTRLC</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41012008UL)</td></tr>
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<tr class="memdesc:a019978b93fe935f65d8ead85d6793865"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) I2CM Control C <br /></td></tr>
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<tr class="separator:a019978b93fe935f65d8ead85d6793865"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad80683a1bb10d49af39e619d3b231981"><td class="memItemLeft" align="right" valign="top"><a id="ad80683a1bb10d49af39e619d3b231981"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#ad80683a1bb10d49af39e619d3b231981">REG_SERCOM2_I2CM_BAUD</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x4101200CUL)</td></tr>
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<tr class="memdesc:ad80683a1bb10d49af39e619d3b231981"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) I2CM Baud Rate <br /></td></tr>
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<tr class="separator:ad80683a1bb10d49af39e619d3b231981"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aca960f2e5fde2013c5c0a8218b9c4db9"><td class="memItemLeft" align="right" valign="top"><a id="aca960f2e5fde2013c5c0a8218b9c4db9"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#aca960f2e5fde2013c5c0a8218b9c4db9">REG_SERCOM2_I2CM_INTENCLR</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x41012014UL)</td></tr>
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<tr class="memdesc:aca960f2e5fde2013c5c0a8218b9c4db9"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) I2CM Interrupt Enable Clear <br /></td></tr>
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<tr class="separator:aca960f2e5fde2013c5c0a8218b9c4db9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afe6542d2e7cec137fcde4a74b41c3431"><td class="memItemLeft" align="right" valign="top"><a id="afe6542d2e7cec137fcde4a74b41c3431"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#afe6542d2e7cec137fcde4a74b41c3431">REG_SERCOM2_I2CM_INTENSET</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x41012016UL)</td></tr>
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<tr class="memdesc:afe6542d2e7cec137fcde4a74b41c3431"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) I2CM Interrupt Enable Set <br /></td></tr>
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<tr class="separator:afe6542d2e7cec137fcde4a74b41c3431"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afd3cbc9a2eac10699638ab8dda071442"><td class="memItemLeft" align="right" valign="top"><a id="afd3cbc9a2eac10699638ab8dda071442"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#afd3cbc9a2eac10699638ab8dda071442">REG_SERCOM2_I2CM_INTFLAG</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x41012018UL)</td></tr>
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<tr class="memdesc:afd3cbc9a2eac10699638ab8dda071442"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) I2CM Interrupt Flag Status and Clear <br /></td></tr>
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<tr class="separator:afd3cbc9a2eac10699638ab8dda071442"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aeb1c18d17cc71e64731571cd8863a2e8"><td class="memItemLeft" align="right" valign="top"><a id="aeb1c18d17cc71e64731571cd8863a2e8"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#aeb1c18d17cc71e64731571cd8863a2e8">REG_SERCOM2_I2CM_STATUS</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x4101201AUL)</td></tr>
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<tr class="memdesc:aeb1c18d17cc71e64731571cd8863a2e8"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) I2CM Status <br /></td></tr>
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<tr class="separator:aeb1c18d17cc71e64731571cd8863a2e8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:acf9bef42ed884cefe081e6a979ff9e8e"><td class="memItemLeft" align="right" valign="top"><a id="acf9bef42ed884cefe081e6a979ff9e8e"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#acf9bef42ed884cefe081e6a979ff9e8e">REG_SERCOM2_I2CM_SYNCBUSY</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x4101201CUL)</td></tr>
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<tr class="memdesc:acf9bef42ed884cefe081e6a979ff9e8e"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) I2CM Synchronization Busy <br /></td></tr>
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<tr class="separator:acf9bef42ed884cefe081e6a979ff9e8e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7c2c36c17a267d11848859c76ec59f82"><td class="memItemLeft" align="right" valign="top"><a id="a7c2c36c17a267d11848859c76ec59f82"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#a7c2c36c17a267d11848859c76ec59f82">REG_SERCOM2_I2CM_ADDR</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41012024UL)</td></tr>
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<tr class="memdesc:a7c2c36c17a267d11848859c76ec59f82"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) I2CM Address <br /></td></tr>
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<tr class="separator:a7c2c36c17a267d11848859c76ec59f82"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a133ab118251ddec4411bdc4f1ae6515e"><td class="memItemLeft" align="right" valign="top"><a id="a133ab118251ddec4411bdc4f1ae6515e"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#a133ab118251ddec4411bdc4f1ae6515e">REG_SERCOM2_I2CM_DATA</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41012028UL)</td></tr>
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<tr class="memdesc:a133ab118251ddec4411bdc4f1ae6515e"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) I2CM Data <br /></td></tr>
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<tr class="separator:a133ab118251ddec4411bdc4f1ae6515e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a002c10f256905a6d82755b2ca374c2b5"><td class="memItemLeft" align="right" valign="top"><a id="a002c10f256905a6d82755b2ca374c2b5"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#a002c10f256905a6d82755b2ca374c2b5">REG_SERCOM2_I2CM_DBGCTRL</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x41012030UL)</td></tr>
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<tr class="memdesc:a002c10f256905a6d82755b2ca374c2b5"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) I2CM Debug Control <br /></td></tr>
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<tr class="separator:a002c10f256905a6d82755b2ca374c2b5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a58dd8f13a98c1de24c6fb6682f581d13"><td class="memItemLeft" align="right" valign="top"><a id="a58dd8f13a98c1de24c6fb6682f581d13"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#a58dd8f13a98c1de24c6fb6682f581d13">REG_SERCOM2_I2CS_CTRLA</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41012000UL)</td></tr>
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<tr class="memdesc:a58dd8f13a98c1de24c6fb6682f581d13"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) I2CS Control A <br /></td></tr>
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<tr class="separator:a58dd8f13a98c1de24c6fb6682f581d13"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a330c20ae7a6e6c03b23f59ecd6540af6"><td class="memItemLeft" align="right" valign="top"><a id="a330c20ae7a6e6c03b23f59ecd6540af6"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#a330c20ae7a6e6c03b23f59ecd6540af6">REG_SERCOM2_I2CS_CTRLB</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41012004UL)</td></tr>
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<tr class="memdesc:a330c20ae7a6e6c03b23f59ecd6540af6"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) I2CS Control B <br /></td></tr>
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<tr class="separator:a330c20ae7a6e6c03b23f59ecd6540af6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3379114376f32cadb5d7cd789735860c"><td class="memItemLeft" align="right" valign="top"><a id="a3379114376f32cadb5d7cd789735860c"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#a3379114376f32cadb5d7cd789735860c">REG_SERCOM2_I2CS_CTRLC</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41012008UL)</td></tr>
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<tr class="memdesc:a3379114376f32cadb5d7cd789735860c"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) I2CS Control C <br /></td></tr>
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<tr class="separator:a3379114376f32cadb5d7cd789735860c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afaeb244a4a48439ec7b618699581e7b2"><td class="memItemLeft" align="right" valign="top"><a id="afaeb244a4a48439ec7b618699581e7b2"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#afaeb244a4a48439ec7b618699581e7b2">REG_SERCOM2_I2CS_INTENCLR</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x41012014UL)</td></tr>
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<tr class="memdesc:afaeb244a4a48439ec7b618699581e7b2"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) I2CS Interrupt Enable Clear <br /></td></tr>
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<tr class="separator:afaeb244a4a48439ec7b618699581e7b2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aff78471dab1f1e15aa4bcb62d19c4f7a"><td class="memItemLeft" align="right" valign="top"><a id="aff78471dab1f1e15aa4bcb62d19c4f7a"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#aff78471dab1f1e15aa4bcb62d19c4f7a">REG_SERCOM2_I2CS_INTENSET</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x41012016UL)</td></tr>
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<tr class="memdesc:aff78471dab1f1e15aa4bcb62d19c4f7a"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) I2CS Interrupt Enable Set <br /></td></tr>
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<tr class="separator:aff78471dab1f1e15aa4bcb62d19c4f7a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae388ee3cdc7923edb21608a408ddf15f"><td class="memItemLeft" align="right" valign="top"><a id="ae388ee3cdc7923edb21608a408ddf15f"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#ae388ee3cdc7923edb21608a408ddf15f">REG_SERCOM2_I2CS_INTFLAG</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x41012018UL)</td></tr>
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<tr class="memdesc:ae388ee3cdc7923edb21608a408ddf15f"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) I2CS Interrupt Flag Status and Clear <br /></td></tr>
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<tr class="separator:ae388ee3cdc7923edb21608a408ddf15f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad5575ef78b98ae948a590af8430594b5"><td class="memItemLeft" align="right" valign="top"><a id="ad5575ef78b98ae948a590af8430594b5"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#ad5575ef78b98ae948a590af8430594b5">REG_SERCOM2_I2CS_STATUS</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x4101201AUL)</td></tr>
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<tr class="memdesc:ad5575ef78b98ae948a590af8430594b5"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) I2CS Status <br /></td></tr>
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<tr class="separator:ad5575ef78b98ae948a590af8430594b5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a984d24c309d19f905b92581a3baaa2a4"><td class="memItemLeft" align="right" valign="top"><a id="a984d24c309d19f905b92581a3baaa2a4"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#a984d24c309d19f905b92581a3baaa2a4">REG_SERCOM2_I2CS_SYNCBUSY</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x4101201CUL)</td></tr>
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<tr class="memdesc:a984d24c309d19f905b92581a3baaa2a4"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) I2CS Synchronization Busy <br /></td></tr>
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<tr class="separator:a984d24c309d19f905b92581a3baaa2a4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8c40548f90cb9c735e37805c338746ef"><td class="memItemLeft" align="right" valign="top"><a id="a8c40548f90cb9c735e37805c338746ef"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#a8c40548f90cb9c735e37805c338746ef">REG_SERCOM2_I2CS_LENGTH</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x41012022UL)</td></tr>
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<tr class="memdesc:a8c40548f90cb9c735e37805c338746ef"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) I2CS Length <br /></td></tr>
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<tr class="separator:a8c40548f90cb9c735e37805c338746ef"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a09582437711f7e26dea1fa8fd03b395b"><td class="memItemLeft" align="right" valign="top"><a id="a09582437711f7e26dea1fa8fd03b395b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#a09582437711f7e26dea1fa8fd03b395b">REG_SERCOM2_I2CS_ADDR</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41012024UL)</td></tr>
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<tr class="memdesc:a09582437711f7e26dea1fa8fd03b395b"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) I2CS Address <br /></td></tr>
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<tr class="separator:a09582437711f7e26dea1fa8fd03b395b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac15eaa036a0a717873579ccf91d59878"><td class="memItemLeft" align="right" valign="top"><a id="ac15eaa036a0a717873579ccf91d59878"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#ac15eaa036a0a717873579ccf91d59878">REG_SERCOM2_I2CS_DATA</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41012028UL)</td></tr>
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<tr class="memdesc:ac15eaa036a0a717873579ccf91d59878"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) I2CS Data <br /></td></tr>
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<tr class="separator:ac15eaa036a0a717873579ccf91d59878"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1e942e7cf8e389a04c50a4960a8df287"><td class="memItemLeft" align="right" valign="top"><a id="a1e942e7cf8e389a04c50a4960a8df287"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#a1e942e7cf8e389a04c50a4960a8df287">REG_SERCOM2_SPI_CTRLA</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41012000UL)</td></tr>
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<tr class="memdesc:a1e942e7cf8e389a04c50a4960a8df287"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) SPI Control A <br /></td></tr>
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<tr class="separator:a1e942e7cf8e389a04c50a4960a8df287"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1b143b9beb08b9e1b754cf842d1dd5ce"><td class="memItemLeft" align="right" valign="top"><a id="a1b143b9beb08b9e1b754cf842d1dd5ce"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#a1b143b9beb08b9e1b754cf842d1dd5ce">REG_SERCOM2_SPI_CTRLB</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41012004UL)</td></tr>
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<tr class="memdesc:a1b143b9beb08b9e1b754cf842d1dd5ce"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) SPI Control B <br /></td></tr>
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<tr class="separator:a1b143b9beb08b9e1b754cf842d1dd5ce"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a363402f17d5f52bbc4c821fb43f1095f"><td class="memItemLeft" align="right" valign="top"><a id="a363402f17d5f52bbc4c821fb43f1095f"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#a363402f17d5f52bbc4c821fb43f1095f">REG_SERCOM2_SPI_CTRLC</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41012008UL)</td></tr>
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<tr class="memdesc:a363402f17d5f52bbc4c821fb43f1095f"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) SPI Control C <br /></td></tr>
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<tr class="separator:a363402f17d5f52bbc4c821fb43f1095f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3426c780c763d9422efb2f74a7b00bc0"><td class="memItemLeft" align="right" valign="top"><a id="a3426c780c763d9422efb2f74a7b00bc0"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#a3426c780c763d9422efb2f74a7b00bc0">REG_SERCOM2_SPI_BAUD</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x4101200CUL)</td></tr>
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<tr class="memdesc:a3426c780c763d9422efb2f74a7b00bc0"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) SPI Baud Rate <br /></td></tr>
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<tr class="separator:a3426c780c763d9422efb2f74a7b00bc0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae89022e1704c1504870c5642ff1e89ed"><td class="memItemLeft" align="right" valign="top"><a id="ae89022e1704c1504870c5642ff1e89ed"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#ae89022e1704c1504870c5642ff1e89ed">REG_SERCOM2_SPI_INTENCLR</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x41012014UL)</td></tr>
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<tr class="memdesc:ae89022e1704c1504870c5642ff1e89ed"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) SPI Interrupt Enable Clear <br /></td></tr>
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<tr class="separator:ae89022e1704c1504870c5642ff1e89ed"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a29069a731bed4bd8c69c3560a2669bff"><td class="memItemLeft" align="right" valign="top"><a id="a29069a731bed4bd8c69c3560a2669bff"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#a29069a731bed4bd8c69c3560a2669bff">REG_SERCOM2_SPI_INTENSET</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x41012016UL)</td></tr>
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<tr class="memdesc:a29069a731bed4bd8c69c3560a2669bff"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) SPI Interrupt Enable Set <br /></td></tr>
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<tr class="separator:a29069a731bed4bd8c69c3560a2669bff"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af6742b430df71a87862d7663fa7a000c"><td class="memItemLeft" align="right" valign="top"><a id="af6742b430df71a87862d7663fa7a000c"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#af6742b430df71a87862d7663fa7a000c">REG_SERCOM2_SPI_INTFLAG</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x41012018UL)</td></tr>
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<tr class="memdesc:af6742b430df71a87862d7663fa7a000c"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) SPI Interrupt Flag Status and Clear <br /></td></tr>
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<tr class="separator:af6742b430df71a87862d7663fa7a000c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a653c2a9299a932b5e09ed56f756948fb"><td class="memItemLeft" align="right" valign="top"><a id="a653c2a9299a932b5e09ed56f756948fb"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#a653c2a9299a932b5e09ed56f756948fb">REG_SERCOM2_SPI_STATUS</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x4101201AUL)</td></tr>
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<tr class="memdesc:a653c2a9299a932b5e09ed56f756948fb"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) SPI Status <br /></td></tr>
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<tr class="separator:a653c2a9299a932b5e09ed56f756948fb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6332acea31b32ce2122591c47a53f594"><td class="memItemLeft" align="right" valign="top"><a id="a6332acea31b32ce2122591c47a53f594"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#a6332acea31b32ce2122591c47a53f594">REG_SERCOM2_SPI_SYNCBUSY</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x4101201CUL)</td></tr>
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<tr class="memdesc:a6332acea31b32ce2122591c47a53f594"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) SPI Synchronization Busy <br /></td></tr>
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<tr class="separator:a6332acea31b32ce2122591c47a53f594"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af9bb6ae6663b1855b037c1b72bf31c88"><td class="memItemLeft" align="right" valign="top"><a id="af9bb6ae6663b1855b037c1b72bf31c88"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#af9bb6ae6663b1855b037c1b72bf31c88">REG_SERCOM2_SPI_LENGTH</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x41012022UL)</td></tr>
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<tr class="memdesc:af9bb6ae6663b1855b037c1b72bf31c88"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) SPI Length <br /></td></tr>
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<tr class="separator:af9bb6ae6663b1855b037c1b72bf31c88"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9449825d316508a23b8738b300370836"><td class="memItemLeft" align="right" valign="top"><a id="a9449825d316508a23b8738b300370836"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#a9449825d316508a23b8738b300370836">REG_SERCOM2_SPI_ADDR</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41012024UL)</td></tr>
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<tr class="memdesc:a9449825d316508a23b8738b300370836"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) SPI Address <br /></td></tr>
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<tr class="separator:a9449825d316508a23b8738b300370836"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa384eb924312f2ce13405a54449ac00d"><td class="memItemLeft" align="right" valign="top"><a id="aa384eb924312f2ce13405a54449ac00d"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#aa384eb924312f2ce13405a54449ac00d">REG_SERCOM2_SPI_DATA</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41012028UL)</td></tr>
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<tr class="memdesc:aa384eb924312f2ce13405a54449ac00d"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) SPI Data <br /></td></tr>
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<tr class="separator:aa384eb924312f2ce13405a54449ac00d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae63f865dd0b65bb9289e2a8a58aaf260"><td class="memItemLeft" align="right" valign="top"><a id="ae63f865dd0b65bb9289e2a8a58aaf260"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#ae63f865dd0b65bb9289e2a8a58aaf260">REG_SERCOM2_SPI_DBGCTRL</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x41012030UL)</td></tr>
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<tr class="memdesc:ae63f865dd0b65bb9289e2a8a58aaf260"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) SPI Debug Control <br /></td></tr>
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<tr class="separator:ae63f865dd0b65bb9289e2a8a58aaf260"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab0aa2ee35f818a58e56af689ae1aec7b"><td class="memItemLeft" align="right" valign="top"><a id="ab0aa2ee35f818a58e56af689ae1aec7b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#ab0aa2ee35f818a58e56af689ae1aec7b">REG_SERCOM2_USART_CTRLA</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41012000UL)</td></tr>
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<tr class="memdesc:ab0aa2ee35f818a58e56af689ae1aec7b"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) USART Control A <br /></td></tr>
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<tr class="separator:ab0aa2ee35f818a58e56af689ae1aec7b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a74b4e718403f95c395f4d551acf8be8e"><td class="memItemLeft" align="right" valign="top"><a id="a74b4e718403f95c395f4d551acf8be8e"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#a74b4e718403f95c395f4d551acf8be8e">REG_SERCOM2_USART_CTRLB</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41012004UL)</td></tr>
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<tr class="memdesc:a74b4e718403f95c395f4d551acf8be8e"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) USART Control B <br /></td></tr>
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<tr class="separator:a74b4e718403f95c395f4d551acf8be8e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae9fb8d8e2c0ea6eb4acead045714fbc9"><td class="memItemLeft" align="right" valign="top"><a id="ae9fb8d8e2c0ea6eb4acead045714fbc9"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#ae9fb8d8e2c0ea6eb4acead045714fbc9">REG_SERCOM2_USART_CTRLC</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41012008UL)</td></tr>
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<tr class="memdesc:ae9fb8d8e2c0ea6eb4acead045714fbc9"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) USART Control C <br /></td></tr>
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<tr class="separator:ae9fb8d8e2c0ea6eb4acead045714fbc9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6111994c5c0db79ed21ec1fb6b05b00a"><td class="memItemLeft" align="right" valign="top"><a id="a6111994c5c0db79ed21ec1fb6b05b00a"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#a6111994c5c0db79ed21ec1fb6b05b00a">REG_SERCOM2_USART_BAUD</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x4101200CUL)</td></tr>
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<tr class="memdesc:a6111994c5c0db79ed21ec1fb6b05b00a"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) USART Baud Rate <br /></td></tr>
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<tr class="separator:a6111994c5c0db79ed21ec1fb6b05b00a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab7de7ac41c8abd3f66fe0633c519cf42"><td class="memItemLeft" align="right" valign="top"><a id="ab7de7ac41c8abd3f66fe0633c519cf42"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#ab7de7ac41c8abd3f66fe0633c519cf42">REG_SERCOM2_USART_RXPL</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x4101200EUL)</td></tr>
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<tr class="memdesc:ab7de7ac41c8abd3f66fe0633c519cf42"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) USART Receive Pulse Length <br /></td></tr>
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<tr class="separator:ab7de7ac41c8abd3f66fe0633c519cf42"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8e9e4ebaf436768bfc17327e7cca8c02"><td class="memItemLeft" align="right" valign="top"><a id="a8e9e4ebaf436768bfc17327e7cca8c02"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#a8e9e4ebaf436768bfc17327e7cca8c02">REG_SERCOM2_USART_INTENCLR</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x41012014UL)</td></tr>
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<tr class="memdesc:a8e9e4ebaf436768bfc17327e7cca8c02"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) USART Interrupt Enable Clear <br /></td></tr>
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<tr class="separator:a8e9e4ebaf436768bfc17327e7cca8c02"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afbadea0875faf4e792d5b826864b4de7"><td class="memItemLeft" align="right" valign="top"><a id="afbadea0875faf4e792d5b826864b4de7"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#afbadea0875faf4e792d5b826864b4de7">REG_SERCOM2_USART_INTENSET</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x41012016UL)</td></tr>
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<tr class="memdesc:afbadea0875faf4e792d5b826864b4de7"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) USART Interrupt Enable Set <br /></td></tr>
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<tr class="separator:afbadea0875faf4e792d5b826864b4de7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a97cb95bddfea29ccda96b7926ba8d011"><td class="memItemLeft" align="right" valign="top"><a id="a97cb95bddfea29ccda96b7926ba8d011"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#a97cb95bddfea29ccda96b7926ba8d011">REG_SERCOM2_USART_INTFLAG</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x41012018UL)</td></tr>
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<tr class="memdesc:a97cb95bddfea29ccda96b7926ba8d011"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) USART Interrupt Flag Status and Clear <br /></td></tr>
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<tr class="separator:a97cb95bddfea29ccda96b7926ba8d011"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad9e096efc5f04ee38ce9ed91f0e920fb"><td class="memItemLeft" align="right" valign="top"><a id="ad9e096efc5f04ee38ce9ed91f0e920fb"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#ad9e096efc5f04ee38ce9ed91f0e920fb">REG_SERCOM2_USART_STATUS</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x4101201AUL)</td></tr>
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<tr class="memdesc:ad9e096efc5f04ee38ce9ed91f0e920fb"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) USART Status <br /></td></tr>
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<tr class="separator:ad9e096efc5f04ee38ce9ed91f0e920fb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:adebf269bef116a4c29f48e05a6705413"><td class="memItemLeft" align="right" valign="top"><a id="adebf269bef116a4c29f48e05a6705413"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#adebf269bef116a4c29f48e05a6705413">REG_SERCOM2_USART_SYNCBUSY</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x4101201CUL)</td></tr>
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<tr class="memdesc:adebf269bef116a4c29f48e05a6705413"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) USART Synchronization Busy <br /></td></tr>
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<tr class="separator:adebf269bef116a4c29f48e05a6705413"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a49407132eedfde95d61e23afbbd6d2e2"><td class="memItemLeft" align="right" valign="top"><a id="a49407132eedfde95d61e23afbbd6d2e2"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#a49407132eedfde95d61e23afbbd6d2e2">REG_SERCOM2_USART_RXERRCNT</a>   (*(<a class="el" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> *)0x41012020UL)</td></tr>
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<tr class="memdesc:a49407132eedfde95d61e23afbbd6d2e2"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) USART Receive Error Count <br /></td></tr>
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<tr class="separator:a49407132eedfde95d61e23afbbd6d2e2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a08faad084af839b3738e3bd9a07ba59b"><td class="memItemLeft" align="right" valign="top"><a id="a08faad084af839b3738e3bd9a07ba59b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#a08faad084af839b3738e3bd9a07ba59b">REG_SERCOM2_USART_LENGTH</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x41012022UL)</td></tr>
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<tr class="memdesc:a08faad084af839b3738e3bd9a07ba59b"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) USART Length <br /></td></tr>
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<tr class="separator:a08faad084af839b3738e3bd9a07ba59b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad95b8b6f8df0c18566cfcc15e66286d5"><td class="memItemLeft" align="right" valign="top"><a id="ad95b8b6f8df0c18566cfcc15e66286d5"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#ad95b8b6f8df0c18566cfcc15e66286d5">REG_SERCOM2_USART_DATA</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x41012028UL)</td></tr>
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<tr class="memdesc:ad95b8b6f8df0c18566cfcc15e66286d5"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) USART Data <br /></td></tr>
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<tr class="separator:ad95b8b6f8df0c18566cfcc15e66286d5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab1e83ea9fa054613a63b46e910d2ef48"><td class="memItemLeft" align="right" valign="top"><a id="ab1e83ea9fa054613a63b46e910d2ef48"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="sercom2_8h.html#ab1e83ea9fa054613a63b46e910d2ef48">REG_SERCOM2_USART_DBGCTRL</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x41012030UL)</td></tr>
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<tr class="memdesc:ab1e83ea9fa054613a63b46e910d2ef48"><td class="mdescLeft"> </td><td class="mdescRight">(SERCOM2) USART Debug Control <br /></td></tr>
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<tr class="separator:ab1e83ea9fa054613a63b46e910d2ef48"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7f529502ca8b8a2ace89270e7728d050"><td class="memItemLeft" align="right" valign="top"><a id="a7f529502ca8b8a2ace89270e7728d050"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_CLK_REDUCTION</b>   1</td></tr>
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<tr class="separator:a7f529502ca8b8a2ace89270e7728d050"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aefdb582aa05689844e184590f7ff317d"><td class="memItemLeft" align="right" valign="top"><a id="aefdb582aa05689844e184590f7ff317d"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_DLY_COMPENSATION</b>   1</td></tr>
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<tr class="separator:aefdb582aa05689844e184590f7ff317d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5e49f595fcf815e3d248b86a54b9b36f"><td class="memItemLeft" align="right" valign="top"><a id="a5e49f595fcf815e3d248b86a54b9b36f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_DMA</b>   1</td></tr>
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<tr class="separator:a5e49f595fcf815e3d248b86a54b9b36f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:adbdd3a084fc9f85a052c316d917e46ac"><td class="memItemLeft" align="right" valign="top"><a id="adbdd3a084fc9f85a052c316d917e46ac"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_DMAC_ID_RX</b>   8</td></tr>
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<tr class="separator:adbdd3a084fc9f85a052c316d917e46ac"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a18e80edc1d1852734d9542e87c7cc485"><td class="memItemLeft" align="right" valign="top"><a id="a18e80edc1d1852734d9542e87c7cc485"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_DMAC_ID_TX</b>   9</td></tr>
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<tr class="separator:a18e80edc1d1852734d9542e87c7cc485"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:acbcb6de93bdf997d582679089a62ef35"><td class="memItemLeft" align="right" valign="top"><a id="acbcb6de93bdf997d582679089a62ef35"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_FIFO_DEPTH_POWER</b>   1</td></tr>
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<tr class="separator:acbcb6de93bdf997d582679089a62ef35"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a463f35f4b36191168c1533e0981dd828"><td class="memItemLeft" align="right" valign="top"><a id="a463f35f4b36191168c1533e0981dd828"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_GCLK_ID_CORE</b>   23</td></tr>
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<tr class="separator:a463f35f4b36191168c1533e0981dd828"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3cd4c2c95860f0735b36e3af34c0e703"><td class="memItemLeft" align="right" valign="top"><a id="a3cd4c2c95860f0735b36e3af34c0e703"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_GCLK_ID_SLOW</b>   3</td></tr>
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<tr class="separator:a3cd4c2c95860f0735b36e3af34c0e703"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae9e7ece915b151bb6b2dfaf59521e0c0"><td class="memItemLeft" align="right" valign="top"><a id="ae9e7ece915b151bb6b2dfaf59521e0c0"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_INT_MSB</b>   6</td></tr>
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<tr class="separator:ae9e7ece915b151bb6b2dfaf59521e0c0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9f5c8570641b5ab6a0c7b6e664414da0"><td class="memItemLeft" align="right" valign="top"><a id="a9f5c8570641b5ab6a0c7b6e664414da0"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_I2CM</b>   1</td></tr>
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<tr class="separator:a9f5c8570641b5ab6a0c7b6e664414da0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a34e0c0edfcfda7140aeb0b833ddad818"><td class="memItemLeft" align="right" valign="top"><a id="a34e0c0edfcfda7140aeb0b833ddad818"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_I2CS</b>   1</td></tr>
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<tr class="separator:a34e0c0edfcfda7140aeb0b833ddad818"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a23cbd01ccd0e43eeb8706fa0269e55db"><td class="memItemLeft" align="right" valign="top"><a id="a23cbd01ccd0e43eeb8706fa0269e55db"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_I2CS_AUTO_ACK</b>   1</td></tr>
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<tr class="separator:a23cbd01ccd0e43eeb8706fa0269e55db"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0befc3081ad8ab378d609ca11b660cac"><td class="memItemLeft" align="right" valign="top"><a id="a0befc3081ad8ab378d609ca11b660cac"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_I2CS_GROUP_CMD</b>   1</td></tr>
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<tr class="separator:a0befc3081ad8ab378d609ca11b660cac"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a77a6fa9092f2e72270ccb68c47db555b"><td class="memItemLeft" align="right" valign="top"><a id="a77a6fa9092f2e72270ccb68c47db555b"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_I2CS_SDASETUP_CNT_SIZE</b>   8</td></tr>
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<tr class="separator:a77a6fa9092f2e72270ccb68c47db555b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a58b2e1c85eba82897396cd74490adad4"><td class="memItemLeft" align="right" valign="top"><a id="a58b2e1c85eba82897396cd74490adad4"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_I2CS_SDASETUP_SIZE</b>   4</td></tr>
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<tr class="separator:a58b2e1c85eba82897396cd74490adad4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab3559cf6f5adb9f73f61a32ac5aa1a36"><td class="memItemLeft" align="right" valign="top"><a id="ab3559cf6f5adb9f73f61a32ac5aa1a36"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_I2CS_SUDAT</b>   1</td></tr>
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<tr class="separator:ab3559cf6f5adb9f73f61a32ac5aa1a36"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5a7eb9f3173f16246601fbb175e712dd"><td class="memItemLeft" align="right" valign="top"><a id="a5a7eb9f3173f16246601fbb175e712dd"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_I2C_FASTMP</b>   1</td></tr>
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<tr class="separator:a5a7eb9f3173f16246601fbb175e712dd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae0fd3ed21b6f1b015c0b268c0c095550"><td class="memItemLeft" align="right" valign="top"><a id="ae0fd3ed21b6f1b015c0b268c0c095550"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_I2C_HSMODE</b>   1</td></tr>
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<tr class="separator:ae0fd3ed21b6f1b015c0b268c0c095550"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae87da90239b7c9445930679399b1e92b"><td class="memItemLeft" align="right" valign="top"><a id="ae87da90239b7c9445930679399b1e92b"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_I2C_SCLSM_MODE</b>   1</td></tr>
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<tr class="separator:ae87da90239b7c9445930679399b1e92b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab0c4d0dda6f33228526ba46b0d0a2011"><td class="memItemLeft" align="right" valign="top"><a id="ab0c4d0dda6f33228526ba46b0d0a2011"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_I2C_SMB_TIMEOUTS</b>   1</td></tr>
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<tr class="separator:ab0c4d0dda6f33228526ba46b0d0a2011"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9b20f410135655ae10b1f3b0aba8c450"><td class="memItemLeft" align="right" valign="top"><a id="a9b20f410135655ae10b1f3b0aba8c450"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_I2C_TENBIT_ADR</b>   1</td></tr>
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<tr class="separator:a9b20f410135655ae10b1f3b0aba8c450"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a92858fc6462b27751ee1b0a87beeab2f"><td class="memItemLeft" align="right" valign="top"><a id="a92858fc6462b27751ee1b0a87beeab2f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_PMSB</b>   3</td></tr>
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<tr class="separator:a92858fc6462b27751ee1b0a87beeab2f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae8b9b70d3da616d0cad744c38d051d03"><td class="memItemLeft" align="right" valign="top"><a id="ae8b9b70d3da616d0cad744c38d051d03"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_RETENTION_SUPPORT</b>   0</td></tr>
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<tr class="separator:ae8b9b70d3da616d0cad744c38d051d03"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a298ffb89d3260cd66c66772df0fb61e6"><td class="memItemLeft" align="right" valign="top"><a id="a298ffb89d3260cd66c66772df0fb61e6"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_SE_CNT</b>   1</td></tr>
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<tr class="separator:a298ffb89d3260cd66c66772df0fb61e6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa55c8ddc6f38893be1f65b5a1f3b1824"><td class="memItemLeft" align="right" valign="top"><a id="aa55c8ddc6f38893be1f65b5a1f3b1824"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_SPI</b>   1</td></tr>
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<tr class="separator:aa55c8ddc6f38893be1f65b5a1f3b1824"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3e73a579f07bf712edfab52571d1c6e1"><td class="memItemLeft" align="right" valign="top"><a id="a3e73a579f07bf712edfab52571d1c6e1"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_SPI_HW_SS_CTRL</b>   1</td></tr>
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<tr class="separator:a3e73a579f07bf712edfab52571d1c6e1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a86153900f39cd64d5dda0fe5d52cac22"><td class="memItemLeft" align="right" valign="top"><a id="a86153900f39cd64d5dda0fe5d52cac22"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_SPI_ICSPACE_EXT</b>   1</td></tr>
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<tr class="separator:a86153900f39cd64d5dda0fe5d52cac22"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af7fc9529a0fd10f7c761f8ad1122eb4c"><td class="memItemLeft" align="right" valign="top"><a id="af7fc9529a0fd10f7c761f8ad1122eb4c"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_SPI_OZMO</b>   0</td></tr>
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<tr class="separator:af7fc9529a0fd10f7c761f8ad1122eb4c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4c596f3b3877974f4b144b91f4a8f4fd"><td class="memItemLeft" align="right" valign="top"><a id="a4c596f3b3877974f4b144b91f4a8f4fd"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_SPI_WAKE_ON_SSL</b>   1</td></tr>
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<tr class="separator:a4c596f3b3877974f4b144b91f4a8f4fd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3454731b92b1a86da856a8a0b473161a"><td class="memItemLeft" align="right" valign="top"><a id="a3454731b92b1a86da856a8a0b473161a"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_TTBIT_EXTENSION</b>   1</td></tr>
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<tr class="separator:a3454731b92b1a86da856a8a0b473161a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aaa48c9bf172a53fe532d6eed3391a7b5"><td class="memItemLeft" align="right" valign="top"><a id="aaa48c9bf172a53fe532d6eed3391a7b5"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_USART</b>   1</td></tr>
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<tr class="separator:aaa48c9bf172a53fe532d6eed3391a7b5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a603ba01c2127e81ed1f366fd87898739"><td class="memItemLeft" align="right" valign="top"><a id="a603ba01c2127e81ed1f366fd87898739"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_USART_AUTOBAUD</b>   1</td></tr>
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<tr class="separator:a603ba01c2127e81ed1f366fd87898739"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac318ab80f5a392511828be2e1f6b737f"><td class="memItemLeft" align="right" valign="top"><a id="ac318ab80f5a392511828be2e1f6b737f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_USART_COLDET</b>   1</td></tr>
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<tr class="separator:ac318ab80f5a392511828be2e1f6b737f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad71bff7dbe668e95000038d73b9c2bd0"><td class="memItemLeft" align="right" valign="top"><a id="ad71bff7dbe668e95000038d73b9c2bd0"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_USART_FLOW_CTRL</b>   1</td></tr>
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<tr class="separator:ad71bff7dbe668e95000038d73b9c2bd0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7113460865be1bfb71a4c81572d78298"><td class="memItemLeft" align="right" valign="top"><a id="a7113460865be1bfb71a4c81572d78298"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_USART_FRAC_BAUD</b>   1</td></tr>
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<tr class="separator:a7113460865be1bfb71a4c81572d78298"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a823d3e1bef3bd5ac85d567468e7c23f6"><td class="memItemLeft" align="right" valign="top"><a id="a823d3e1bef3bd5ac85d567468e7c23f6"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_USART_IRDA</b>   1</td></tr>
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<tr class="separator:a823d3e1bef3bd5ac85d567468e7c23f6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2a7d7be5f76f61a3638200f2c69c0432"><td class="memItemLeft" align="right" valign="top"><a id="a2a7d7be5f76f61a3638200f2c69c0432"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_USART_ISO7816</b>   1</td></tr>
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<tr class="separator:a2a7d7be5f76f61a3638200f2c69c0432"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae47ffffa394737037c5ac303efda4e5e"><td class="memItemLeft" align="right" valign="top"><a id="ae47ffffa394737037c5ac303efda4e5e"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_USART_LIN_MASTER</b>   1</td></tr>
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<tr class="separator:ae47ffffa394737037c5ac303efda4e5e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a68419e8f905862b2960658cb6dffd664"><td class="memItemLeft" align="right" valign="top"><a id="a68419e8f905862b2960658cb6dffd664"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_USART_RS485</b>   1</td></tr>
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<tr class="separator:a68419e8f905862b2960658cb6dffd664"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:acaddc7cc71c32c945f991f3325307656"><td class="memItemLeft" align="right" valign="top"><a id="acaddc7cc71c32c945f991f3325307656"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_USART_SAMPA_EXT</b>   1</td></tr>
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<tr class="separator:acaddc7cc71c32c945f991f3325307656"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3922198d7b81387e7adb43ecb9c51e57"><td class="memItemLeft" align="right" valign="top"><a id="a3922198d7b81387e7adb43ecb9c51e57"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>SERCOM2_USART_SAMPR_EXT</b>   1</td></tr>
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<tr class="separator:a3922198d7b81387e7adb43ecb9c51e57"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
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<div class="textblock"><p>Instance description for SERCOM2. </p>
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<p>Copyright (c) 2019 Microchip Technology Inc.</p>
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<p>\asf_license_start </p>
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<p class="definition">Definition in file <a class="el" href="sercom2_8h_source.html">sercom2.h</a>.</p>
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