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<li class="navelem"><a class="el" href="dir_ea9599923402ca8ab47fc3e495999dea.html">arch</a></li><li class="navelem"><a class="el" href="dir_9e929c73feaf15d3695ce4c76b483065.html">arm</a></li><li class="navelem"><a class="el" href="dir_58955c0f35a9c3d48181d2be53994c7b.html">SAME54</a></li><li class="navelem"><a class="el" href="dir_09e97e512ca7d4e6cd359f1c5497eeba.html">SAME54A</a></li><li class="navelem"><a class="el" href="dir_4b38d63e5c584a4d6c9001c789e1829f.html">mcu</a></li><li class="navelem"><a class="el" href="dir_d4fc57b996dc082ef023092a5b7d90fc.html">inc</a></li><li class="navelem"><a class="el" href="dir_92b117bae75cf16a05ca7611db29e9c7.html">instance</a></li> </ul>
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<div class="title">sdhc1.h</div> </div>
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<a href="sdhc1_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>&#160; </div>
<div class="line"><a name="l00030"></a><span class="lineno"> 30</span>&#160;<span class="preprocessor">#ifndef _SAME54_SDHC1_INSTANCE_</span></div>
<div class="line"><a name="l00031"></a><span class="lineno"> 31</span>&#160;<span class="preprocessor">#define _SAME54_SDHC1_INSTANCE_</span></div>
<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>&#160; </div>
<div class="line"><a name="l00033"></a><span class="lineno"> 33</span>&#160;<span class="comment">/* ========== Register definition for SDHC1 peripheral ========== */</span></div>
<div class="line"><a name="l00034"></a><span class="lineno"> 34</span>&#160;<span class="preprocessor">#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
<div class="line"><a name="l00035"></a><span class="lineno"> 35</span>&#160;<span class="preprocessor">#define REG_SDHC1_SSAR (0x46000000) </span></div>
<div class="line"><a name="l00036"></a><span class="lineno"> 36</span>&#160;<span class="preprocessor">#define REG_SDHC1_BSR (0x46000004) </span></div>
<div class="line"><a name="l00037"></a><span class="lineno"> 37</span>&#160;<span class="preprocessor">#define REG_SDHC1_BCR (0x46000006) </span></div>
<div class="line"><a name="l00038"></a><span class="lineno"> 38</span>&#160;<span class="preprocessor">#define REG_SDHC1_ARG1R (0x46000008) </span></div>
<div class="line"><a name="l00039"></a><span class="lineno"> 39</span>&#160;<span class="preprocessor">#define REG_SDHC1_TMR (0x4600000C) </span></div>
<div class="line"><a name="l00040"></a><span class="lineno"> 40</span>&#160;<span class="preprocessor">#define REG_SDHC1_CR (0x4600000E) </span></div>
<div class="line"><a name="l00041"></a><span class="lineno"> 41</span>&#160;<span class="preprocessor">#define REG_SDHC1_RR0 (0x46000010) </span></div>
<div class="line"><a name="l00042"></a><span class="lineno"> 42</span>&#160;<span class="preprocessor">#define REG_SDHC1_RR1 (0x46000014) </span></div>
<div class="line"><a name="l00043"></a><span class="lineno"> 43</span>&#160;<span class="preprocessor">#define REG_SDHC1_RR2 (0x46000018) </span></div>
<div class="line"><a name="l00044"></a><span class="lineno"> 44</span>&#160;<span class="preprocessor">#define REG_SDHC1_RR3 (0x4600001C) </span></div>
<div class="line"><a name="l00045"></a><span class="lineno"> 45</span>&#160;<span class="preprocessor">#define REG_SDHC1_BDPR (0x46000020) </span></div>
<div class="line"><a name="l00046"></a><span class="lineno"> 46</span>&#160;<span class="preprocessor">#define REG_SDHC1_PSR (0x46000024) </span></div>
<div class="line"><a name="l00047"></a><span class="lineno"> 47</span>&#160;<span class="preprocessor">#define REG_SDHC1_HC1R (0x46000028) </span></div>
<div class="line"><a name="l00048"></a><span class="lineno"> 48</span>&#160;<span class="preprocessor">#define REG_SDHC1_PCR (0x46000029) </span></div>
<div class="line"><a name="l00049"></a><span class="lineno"> 49</span>&#160;<span class="preprocessor">#define REG_SDHC1_BGCR (0x4600002A) </span></div>
<div class="line"><a name="l00050"></a><span class="lineno"> 50</span>&#160;<span class="preprocessor">#define REG_SDHC1_WCR (0x4600002B) </span></div>
<div class="line"><a name="l00051"></a><span class="lineno"> 51</span>&#160;<span class="preprocessor">#define REG_SDHC1_CCR (0x4600002C) </span></div>
<div class="line"><a name="l00052"></a><span class="lineno"> 52</span>&#160;<span class="preprocessor">#define REG_SDHC1_TCR (0x4600002E) </span></div>
<div class="line"><a name="l00053"></a><span class="lineno"> 53</span>&#160;<span class="preprocessor">#define REG_SDHC1_SRR (0x4600002F) </span></div>
<div class="line"><a name="l00054"></a><span class="lineno"> 54</span>&#160;<span class="preprocessor">#define REG_SDHC1_NISTR (0x46000030) </span></div>
<div class="line"><a name="l00055"></a><span class="lineno"> 55</span>&#160;<span class="preprocessor">#define REG_SDHC1_EISTR (0x46000032) </span></div>
<div class="line"><a name="l00056"></a><span class="lineno"> 56</span>&#160;<span class="preprocessor">#define REG_SDHC1_NISTER (0x46000034) </span></div>
<div class="line"><a name="l00057"></a><span class="lineno"> 57</span>&#160;<span class="preprocessor">#define REG_SDHC1_EISTER (0x46000036) </span></div>
<div class="line"><a name="l00058"></a><span class="lineno"> 58</span>&#160;<span class="preprocessor">#define REG_SDHC1_NISIER (0x46000038) </span></div>
<div class="line"><a name="l00059"></a><span class="lineno"> 59</span>&#160;<span class="preprocessor">#define REG_SDHC1_EISIER (0x4600003A) </span></div>
<div class="line"><a name="l00060"></a><span class="lineno"> 60</span>&#160;<span class="preprocessor">#define REG_SDHC1_ACESR (0x4600003C) </span></div>
<div class="line"><a name="l00061"></a><span class="lineno"> 61</span>&#160;<span class="preprocessor">#define REG_SDHC1_HC2R (0x4600003E) </span></div>
<div class="line"><a name="l00062"></a><span class="lineno"> 62</span>&#160;<span class="preprocessor">#define REG_SDHC1_CA0R (0x46000040) </span></div>
<div class="line"><a name="l00063"></a><span class="lineno"> 63</span>&#160;<span class="preprocessor">#define REG_SDHC1_CA1R (0x46000044) </span></div>
<div class="line"><a name="l00064"></a><span class="lineno"> 64</span>&#160;<span class="preprocessor">#define REG_SDHC1_MCCAR (0x46000048) </span></div>
<div class="line"><a name="l00065"></a><span class="lineno"> 65</span>&#160;<span class="preprocessor">#define REG_SDHC1_FERACES (0x46000050) </span></div>
<div class="line"><a name="l00066"></a><span class="lineno"> 66</span>&#160;<span class="preprocessor">#define REG_SDHC1_FEREIS (0x46000052) </span></div>
<div class="line"><a name="l00067"></a><span class="lineno"> 67</span>&#160;<span class="preprocessor">#define REG_SDHC1_AESR (0x46000054) </span></div>
<div class="line"><a name="l00068"></a><span class="lineno"> 68</span>&#160;<span class="preprocessor">#define REG_SDHC1_ASAR0 (0x46000058) </span></div>
<div class="line"><a name="l00069"></a><span class="lineno"> 69</span>&#160;<span class="preprocessor">#define REG_SDHC1_PVR0 (0x46000060) </span></div>
<div class="line"><a name="l00070"></a><span class="lineno"> 70</span>&#160;<span class="preprocessor">#define REG_SDHC1_PVR1 (0x46000062) </span></div>
<div class="line"><a name="l00071"></a><span class="lineno"> 71</span>&#160;<span class="preprocessor">#define REG_SDHC1_PVR2 (0x46000064) </span></div>
<div class="line"><a name="l00072"></a><span class="lineno"> 72</span>&#160;<span class="preprocessor">#define REG_SDHC1_PVR3 (0x46000066) </span></div>
<div class="line"><a name="l00073"></a><span class="lineno"> 73</span>&#160;<span class="preprocessor">#define REG_SDHC1_PVR4 (0x46000068) </span></div>
<div class="line"><a name="l00074"></a><span class="lineno"> 74</span>&#160;<span class="preprocessor">#define REG_SDHC1_PVR5 (0x4600006A) </span></div>
<div class="line"><a name="l00075"></a><span class="lineno"> 75</span>&#160;<span class="preprocessor">#define REG_SDHC1_PVR6 (0x4600006C) </span></div>
<div class="line"><a name="l00076"></a><span class="lineno"> 76</span>&#160;<span class="preprocessor">#define REG_SDHC1_PVR7 (0x4600006E) </span></div>
<div class="line"><a name="l00077"></a><span class="lineno"> 77</span>&#160;<span class="preprocessor">#define REG_SDHC1_SISR (0x460000FC) </span></div>
<div class="line"><a name="l00078"></a><span class="lineno"> 78</span>&#160;<span class="preprocessor">#define REG_SDHC1_HCVR (0x460000FE) </span></div>
<div class="line"><a name="l00079"></a><span class="lineno"> 79</span>&#160;<span class="preprocessor">#define REG_SDHC1_MC1R (0x46000204) </span></div>
<div class="line"><a name="l00080"></a><span class="lineno"> 80</span>&#160;<span class="preprocessor">#define REG_SDHC1_MC2R (0x46000205) </span></div>
<div class="line"><a name="l00081"></a><span class="lineno"> 81</span>&#160;<span class="preprocessor">#define REG_SDHC1_ACR (0x46000208) </span></div>
<div class="line"><a name="l00082"></a><span class="lineno"> 82</span>&#160;<span class="preprocessor">#define REG_SDHC1_CC2R (0x4600020C) </span></div>
<div class="line"><a name="l00083"></a><span class="lineno"> 83</span>&#160;<span class="preprocessor">#define REG_SDHC1_CACR (0x46000230) </span></div>
<div class="line"><a name="l00084"></a><span class="lineno"> 84</span>&#160;<span class="preprocessor">#define REG_SDHC1_DBGR (0x46000234) </span></div>
<div class="line"><a name="l00085"></a><span class="lineno"> 85</span>&#160;<span class="preprocessor">#else</span></div>
<div class="line"><a name="l00086"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#a6bbb4d593120cfa1463ac4a44e693b84"> 86</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_SSAR (*(RwReg *)0x46000000UL) </span></div>
<div class="line"><a name="l00087"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#a865e934a053ebb9d4f2f688812bbe1ab"> 87</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_BSR (*(RwReg16*)0x46000004UL) </span></div>
<div class="line"><a name="l00088"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#a198673fecd34391f3384da6226dc49b2"> 88</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_BCR (*(RwReg16*)0x46000006UL) </span></div>
<div class="line"><a name="l00089"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#aad163f93ccff808a9a456182ecca91b5"> 89</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_ARG1R (*(RwReg *)0x46000008UL) </span></div>
<div class="line"><a name="l00090"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#a933e870d94460933803f1296691ffa78"> 90</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_TMR (*(RwReg16*)0x4600000CUL) </span></div>
<div class="line"><a name="l00091"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#a8b4ad7b6433c8d523e69c44a3484eb90"> 91</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_CR (*(RwReg16*)0x4600000EUL) </span></div>
<div class="line"><a name="l00092"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#abb30e3244ea714d7636ee4983d325bce"> 92</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_RR0 (*(RoReg *)0x46000010UL) </span></div>
<div class="line"><a name="l00093"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#a784db29f8476ce74a9e9581bcfcd3bd2"> 93</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_RR1 (*(RoReg *)0x46000014UL) </span></div>
<div class="line"><a name="l00094"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#adc54afd610c144ca5deaa1a9e3d2cabe"> 94</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_RR2 (*(RoReg *)0x46000018UL) </span></div>
<div class="line"><a name="l00095"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#a9390382f21a99d523624672449bf86be"> 95</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_RR3 (*(RoReg *)0x4600001CUL) </span></div>
<div class="line"><a name="l00096"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#a29715c479708548ece5e4afc4dd1f774"> 96</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_BDPR (*(RwReg *)0x46000020UL) </span></div>
<div class="line"><a name="l00097"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#a427d7cbf9738f53cc222e81d8273185f"> 97</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_PSR (*(RoReg *)0x46000024UL) </span></div>
<div class="line"><a name="l00098"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#aaa3d8d9ca72cb98118dd8383a8e00646"> 98</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_HC1R (*(RwReg8 *)0x46000028UL) </span></div>
<div class="line"><a name="l00099"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#a5cec30317d3298d583245e5f98ec2241"> 99</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_PCR (*(RwReg8 *)0x46000029UL) </span></div>
<div class="line"><a name="l00100"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#ac32466a4e40e068f1d306260d6722a77"> 100</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_BGCR (*(RwReg8 *)0x4600002AUL) </span></div>
<div class="line"><a name="l00101"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#ab413464f41c6dfbea3caf6bb81285c6c"> 101</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_WCR (*(RwReg8 *)0x4600002BUL) </span></div>
<div class="line"><a name="l00102"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#a79adad14b1b67193772044385479cea7"> 102</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_CCR (*(RwReg16*)0x4600002CUL) </span></div>
<div class="line"><a name="l00103"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#a774ef8e66b70ad41cc0ac8b587c14b67"> 103</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_TCR (*(RwReg8 *)0x4600002EUL) </span></div>
<div class="line"><a name="l00104"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#a50d6aeb1ed8d901b68e49e99530c08c9"> 104</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_SRR (*(RwReg8 *)0x4600002FUL) </span></div>
<div class="line"><a name="l00105"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#a8ea5f015005bd56d6b139f23d964d7d8"> 105</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_NISTR (*(RwReg16*)0x46000030UL) </span></div>
<div class="line"><a name="l00106"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#aaf211937d241f48aea26b13021954c47"> 106</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_EISTR (*(RwReg16*)0x46000032UL) </span></div>
<div class="line"><a name="l00107"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#a4edd7093f3722ac71a28318df6e14260"> 107</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_NISTER (*(RwReg16*)0x46000034UL) </span></div>
<div class="line"><a name="l00108"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#ab6b0a91762d01272dbde049c825b09b9"> 108</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_EISTER (*(RwReg16*)0x46000036UL) </span></div>
<div class="line"><a name="l00109"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#ab686a50cd009672b0c7405e62a297b6c"> 109</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_NISIER (*(RwReg16*)0x46000038UL) </span></div>
<div class="line"><a name="l00110"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#a2d290a0715aec4fe95778a15444721ed"> 110</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_EISIER (*(RwReg16*)0x4600003AUL) </span></div>
<div class="line"><a name="l00111"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#a11d52e22e8c1e3ce88d39ff604ed16e9"> 111</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_ACESR (*(RoReg16*)0x4600003CUL) </span></div>
<div class="line"><a name="l00112"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#ac33a9b96ab0675be66d4793c05bf282b"> 112</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_HC2R (*(RwReg16*)0x4600003EUL) </span></div>
<div class="line"><a name="l00113"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#ad72a4b840413d2167ae20c275e367ee1"> 113</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_CA0R (*(RoReg *)0x46000040UL) </span></div>
<div class="line"><a name="l00114"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#a7ad18a3a56a1ec47073648d7ca78e48d"> 114</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_CA1R (*(RoReg *)0x46000044UL) </span></div>
<div class="line"><a name="l00115"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#a1ea423a45a54dcca0f89dbab88fa941a"> 115</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_MCCAR (*(RoReg *)0x46000048UL) </span></div>
<div class="line"><a name="l00116"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#ae260a343bd219fb789777f073416fd2e"> 116</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_FERACES (*(WoReg16*)0x46000050UL) </span></div>
<div class="line"><a name="l00117"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#af82ef2af4a0fb0fe57e282486e444597"> 117</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_FEREIS (*(WoReg16*)0x46000052UL) </span></div>
<div class="line"><a name="l00118"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#a86928886c9e1f43e0bdc92600786cca0"> 118</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_AESR (*(RoReg8 *)0x46000054UL) </span></div>
<div class="line"><a name="l00119"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#a1ebb727f9d2cbd58150ec97d3e94d2d8"> 119</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_ASAR0 (*(RwReg *)0x46000058UL) </span></div>
<div class="line"><a name="l00120"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#a2cddba3819a0d45545250523ed37085a"> 120</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_PVR0 (*(RwReg16*)0x46000060UL) </span></div>
<div class="line"><a name="l00121"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#a2e19ae4ea03e9edbac7c821b24dc4d81"> 121</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_PVR1 (*(RwReg16*)0x46000062UL) </span></div>
<div class="line"><a name="l00122"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#aba247026d48f0f37361757d51f4862b1"> 122</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_PVR2 (*(RwReg16*)0x46000064UL) </span></div>
<div class="line"><a name="l00123"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#a7d9a5bc86f1a33fddd84aed1721c8b36"> 123</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_PVR3 (*(RwReg16*)0x46000066UL) </span></div>
<div class="line"><a name="l00124"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#a999451324e22353856b184645ed80c2f"> 124</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_PVR4 (*(RwReg16*)0x46000068UL) </span></div>
<div class="line"><a name="l00125"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#a5d87cdcda20335386f49a0e61608fb8c"> 125</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_PVR5 (*(RwReg16*)0x4600006AUL) </span></div>
<div class="line"><a name="l00126"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#ac0f90b430987f769641c2e248a49a8a6"> 126</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_PVR6 (*(RwReg16*)0x4600006CUL) </span></div>
<div class="line"><a name="l00127"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#a1271c803bb327c16180eab019910d055"> 127</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_PVR7 (*(RwReg16*)0x4600006EUL) </span></div>
<div class="line"><a name="l00128"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#ab946d2cfa4c133e1fe77c537fa7d18a9"> 128</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_SISR (*(RoReg16*)0x460000FCUL) </span></div>
<div class="line"><a name="l00129"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#a0a361d0a9e8311a29b6e545a6c0ae5d6"> 129</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_HCVR (*(RoReg16*)0x460000FEUL) </span></div>
<div class="line"><a name="l00130"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#a81e6acf57a91944319b102d9cae2449b"> 130</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_MC1R (*(RwReg8 *)0x46000204UL) </span></div>
<div class="line"><a name="l00131"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#a8b67d3d8a51088d71bfb61f1d79834df"> 131</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_MC2R (*(WoReg8 *)0x46000205UL) </span></div>
<div class="line"><a name="l00132"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#a6e629d8fd6a6c7bff2e5fbdf64c1e120"> 132</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_ACR (*(RwReg *)0x46000208UL) </span></div>
<div class="line"><a name="l00133"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#af30d449cd3b164982fbc15b9bde221d6"> 133</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_CC2R (*(RwReg *)0x4600020CUL) </span></div>
<div class="line"><a name="l00134"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#abf0d1c263c97e3f5522f1c8b07b98c75"> 134</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_CACR (*(RwReg *)0x46000230UL) </span></div>
<div class="line"><a name="l00135"></a><span class="lineno"><a class="line" href="sdhc1_8h.html#adc19835330fd733d0f06e56968dfd3f7"> 135</a></span>&#160;<span class="preprocessor">#define REG_SDHC1_DBGR (*(RwReg8 *)0x46000234UL) </span></div>
<div class="line"><a name="l00136"></a><span class="lineno"> 136</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
<div class="line"><a name="l00137"></a><span class="lineno"> 137</span>&#160; </div>
<div class="line"><a name="l00138"></a><span class="lineno"> 138</span>&#160;<span class="comment">/* ========== Instance parameters for SDHC1 peripheral ========== */</span></div>
<div class="line"><a name="l00139"></a><span class="lineno"> 139</span>&#160;<span class="preprocessor">#define SDHC1_CARD_DATA_SIZE 4 </span></div>
<div class="line"><a name="l00140"></a><span class="lineno"> 140</span>&#160;<span class="preprocessor">#define SDHC1_CLK_AHB_ID 16 </span></div>
<div class="line"><a name="l00141"></a><span class="lineno"> 141</span>&#160;<span class="preprocessor">#define SDHC1_GCLK_ID 46 </span></div>
<div class="line"><a name="l00142"></a><span class="lineno"> 142</span>&#160;<span class="preprocessor">#define SDHC1_GCLK_ID_SLOW 3 </span></div>
<div class="line"><a name="l00143"></a><span class="lineno"> 143</span>&#160;<span class="preprocessor">#define SDHC1_NB_OF_DEVICES 1 </span></div>
<div class="line"><a name="l00144"></a><span class="lineno"> 144</span>&#160;<span class="preprocessor">#define SDHC1_NB_REG_PVR 8 </span></div>
<div class="line"><a name="l00145"></a><span class="lineno"> 145</span>&#160;<span class="preprocessor">#define SDHC1_NB_REG_RR 4 </span></div>
<div class="line"><a name="l00146"></a><span class="lineno"> 146</span>&#160; </div>
<div class="line"><a name="l00147"></a><span class="lineno"> 147</span>&#160;<span class="preprocessor">#endif </span><span class="comment">/* _SAME54_SDHC1_INSTANCE_ */</span><span class="preprocessor"></span></div>
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