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<li class="navelem"><a class="el" href="dir_ea9599923402ca8ab47fc3e495999dea.html">arch</a></li><li class="navelem"><a class="el" href="dir_9e929c73feaf15d3695ce4c76b483065.html">arm</a></li><li class="navelem"><a class="el" href="dir_58955c0f35a9c3d48181d2be53994c7b.html">SAME54</a></li><li class="navelem"><a class="el" href="dir_09e97e512ca7d4e6cd359f1c5497eeba.html">SAME54A</a></li><li class="navelem"><a class="el" href="dir_4b38d63e5c584a4d6c9001c789e1829f.html">mcu</a></li><li class="navelem"><a class="el" href="dir_d4fc57b996dc082ef023092a5b7d90fc.html">inc</a></li><li class="navelem"><a class="el" href="dir_92b117bae75cf16a05ca7611db29e9c7.html">instance</a></li> </ul>
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<a href="#define-members">Macros</a> </div>
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<div class="title">gmac.h File Reference</div> </div>
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<div class="contents">
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<p>Instance description for GMAC.
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<a href="#details">More...</a></p>
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<p><a href="instance_2gmac_8h_source.html">Go to the source code of this file.</a></p>
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<table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
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Macros</h2></td></tr>
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<tr class="memitem:a64e814cd2804615563a53e3781ab0ed6"><td class="memItemLeft" align="right" valign="top"><a id="a64e814cd2804615563a53e3781ab0ed6"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a64e814cd2804615563a53e3781ab0ed6">REG_GMAC_NCR</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000800UL)</td></tr>
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<tr class="memdesc:a64e814cd2804615563a53e3781ab0ed6"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Network Control Register <br /></td></tr>
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<tr class="separator:a64e814cd2804615563a53e3781ab0ed6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a934a448b9c5b362d65c6620032a74d2d"><td class="memItemLeft" align="right" valign="top"><a id="a934a448b9c5b362d65c6620032a74d2d"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a934a448b9c5b362d65c6620032a74d2d">REG_GMAC_NCFGR</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000804UL)</td></tr>
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<tr class="memdesc:a934a448b9c5b362d65c6620032a74d2d"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Network Configuration Register <br /></td></tr>
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<tr class="separator:a934a448b9c5b362d65c6620032a74d2d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab9475ac375ad1f9d6f669f0a22f01996"><td class="memItemLeft" align="right" valign="top"><a id="ab9475ac375ad1f9d6f669f0a22f01996"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#ab9475ac375ad1f9d6f669f0a22f01996">REG_GMAC_NSR</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000808UL)</td></tr>
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<tr class="memdesc:ab9475ac375ad1f9d6f669f0a22f01996"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Network Status Register <br /></td></tr>
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<tr class="separator:ab9475ac375ad1f9d6f669f0a22f01996"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a492604061d8da8b57651586de0942d4b"><td class="memItemLeft" align="right" valign="top"><a id="a492604061d8da8b57651586de0942d4b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a492604061d8da8b57651586de0942d4b">REG_GMAC_UR</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x4200080CUL)</td></tr>
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<tr class="memdesc:a492604061d8da8b57651586de0942d4b"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) User Register <br /></td></tr>
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<tr class="separator:a492604061d8da8b57651586de0942d4b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a829dea9dd4c70747a6d45bd9af59f289"><td class="memItemLeft" align="right" valign="top"><a id="a829dea9dd4c70747a6d45bd9af59f289"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a829dea9dd4c70747a6d45bd9af59f289">REG_GMAC_DCFGR</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000810UL)</td></tr>
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<tr class="memdesc:a829dea9dd4c70747a6d45bd9af59f289"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) DMA Configuration Register <br /></td></tr>
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<tr class="separator:a829dea9dd4c70747a6d45bd9af59f289"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7def7fe96249d63136bf4c4ff4e60d7a"><td class="memItemLeft" align="right" valign="top"><a id="a7def7fe96249d63136bf4c4ff4e60d7a"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a7def7fe96249d63136bf4c4ff4e60d7a">REG_GMAC_TSR</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000814UL)</td></tr>
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<tr class="memdesc:a7def7fe96249d63136bf4c4ff4e60d7a"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Transmit Status Register <br /></td></tr>
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<tr class="separator:a7def7fe96249d63136bf4c4ff4e60d7a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abc0cd34e920c2dbd96d7e68d0e1b5d62"><td class="memItemLeft" align="right" valign="top"><a id="abc0cd34e920c2dbd96d7e68d0e1b5d62"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#abc0cd34e920c2dbd96d7e68d0e1b5d62">REG_GMAC_RBQB</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000818UL)</td></tr>
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<tr class="memdesc:abc0cd34e920c2dbd96d7e68d0e1b5d62"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Receive Buffer Queue Base Address <br /></td></tr>
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<tr class="separator:abc0cd34e920c2dbd96d7e68d0e1b5d62"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab69fe363687b3c70a33236eb230042d9"><td class="memItemLeft" align="right" valign="top"><a id="ab69fe363687b3c70a33236eb230042d9"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#ab69fe363687b3c70a33236eb230042d9">REG_GMAC_TBQB</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x4200081CUL)</td></tr>
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<tr class="memdesc:ab69fe363687b3c70a33236eb230042d9"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Transmit Buffer Queue Base Address <br /></td></tr>
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<tr class="separator:ab69fe363687b3c70a33236eb230042d9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7692a808bebeac31d784eaaa79bda3b5"><td class="memItemLeft" align="right" valign="top"><a id="a7692a808bebeac31d784eaaa79bda3b5"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a7692a808bebeac31d784eaaa79bda3b5">REG_GMAC_RSR</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000820UL)</td></tr>
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<tr class="memdesc:a7692a808bebeac31d784eaaa79bda3b5"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Receive Status Register <br /></td></tr>
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<tr class="separator:a7692a808bebeac31d784eaaa79bda3b5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:adecc511ae3c7129dc5621d6386541312"><td class="memItemLeft" align="right" valign="top"><a id="adecc511ae3c7129dc5621d6386541312"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#adecc511ae3c7129dc5621d6386541312">REG_GMAC_ISR</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000824UL)</td></tr>
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<tr class="memdesc:adecc511ae3c7129dc5621d6386541312"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Interrupt Status Register <br /></td></tr>
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<tr class="separator:adecc511ae3c7129dc5621d6386541312"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1af578113d65cf1914d487698c18edd4"><td class="memItemLeft" align="right" valign="top"><a id="a1af578113d65cf1914d487698c18edd4"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a1af578113d65cf1914d487698c18edd4">REG_GMAC_IER</a>   (*(<a class="el" href="same54n19a_8h.html#ac0f96d4e8018367b38f527007cf0eafd">WoReg</a> *)0x42000828UL)</td></tr>
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<tr class="memdesc:a1af578113d65cf1914d487698c18edd4"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Interrupt Enable Register <br /></td></tr>
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<tr class="separator:a1af578113d65cf1914d487698c18edd4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a762a1745bef8d624f58e04a4546de5f1"><td class="memItemLeft" align="right" valign="top"><a id="a762a1745bef8d624f58e04a4546de5f1"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a762a1745bef8d624f58e04a4546de5f1">REG_GMAC_IDR</a>   (*(<a class="el" href="same54n19a_8h.html#ac0f96d4e8018367b38f527007cf0eafd">WoReg</a> *)0x4200082CUL)</td></tr>
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<tr class="memdesc:a762a1745bef8d624f58e04a4546de5f1"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Interrupt Disable Register <br /></td></tr>
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<tr class="separator:a762a1745bef8d624f58e04a4546de5f1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a679802550de3793bc147f6cf6bdbbe1e"><td class="memItemLeft" align="right" valign="top"><a id="a679802550de3793bc147f6cf6bdbbe1e"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a679802550de3793bc147f6cf6bdbbe1e">REG_GMAC_IMR</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000830UL)</td></tr>
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<tr class="memdesc:a679802550de3793bc147f6cf6bdbbe1e"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Interrupt Mask Register <br /></td></tr>
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<tr class="separator:a679802550de3793bc147f6cf6bdbbe1e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aac5e66cda262237d3621033c6117c950"><td class="memItemLeft" align="right" valign="top"><a id="aac5e66cda262237d3621033c6117c950"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#aac5e66cda262237d3621033c6117c950">REG_GMAC_MAN</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000834UL)</td></tr>
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<tr class="memdesc:aac5e66cda262237d3621033c6117c950"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) PHY Maintenance Register <br /></td></tr>
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<tr class="separator:aac5e66cda262237d3621033c6117c950"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8cf3c086b861cccd51a4b514fc66e267"><td class="memItemLeft" align="right" valign="top"><a id="a8cf3c086b861cccd51a4b514fc66e267"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a8cf3c086b861cccd51a4b514fc66e267">REG_GMAC_RPQ</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000838UL)</td></tr>
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<tr class="memdesc:a8cf3c086b861cccd51a4b514fc66e267"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Received Pause Quantum Register <br /></td></tr>
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<tr class="separator:a8cf3c086b861cccd51a4b514fc66e267"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6a1d0de4691c8af7517e9902829c1807"><td class="memItemLeft" align="right" valign="top"><a id="a6a1d0de4691c8af7517e9902829c1807"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a6a1d0de4691c8af7517e9902829c1807">REG_GMAC_TPQ</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x4200083CUL)</td></tr>
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<tr class="memdesc:a6a1d0de4691c8af7517e9902829c1807"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Transmit Pause Quantum Register <br /></td></tr>
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<tr class="separator:a6a1d0de4691c8af7517e9902829c1807"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0abfc0d8a7f4b9166d59e416bdba73dc"><td class="memItemLeft" align="right" valign="top"><a id="a0abfc0d8a7f4b9166d59e416bdba73dc"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a0abfc0d8a7f4b9166d59e416bdba73dc">REG_GMAC_TPSF</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000840UL)</td></tr>
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<tr class="memdesc:a0abfc0d8a7f4b9166d59e416bdba73dc"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) TX partial store and forward Register <br /></td></tr>
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<tr class="separator:a0abfc0d8a7f4b9166d59e416bdba73dc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4362b730c5a730033ae69f2b1135fc0f"><td class="memItemLeft" align="right" valign="top"><a id="a4362b730c5a730033ae69f2b1135fc0f"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a4362b730c5a730033ae69f2b1135fc0f">REG_GMAC_RPSF</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000844UL)</td></tr>
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<tr class="memdesc:a4362b730c5a730033ae69f2b1135fc0f"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) RX partial store and forward Register <br /></td></tr>
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<tr class="separator:a4362b730c5a730033ae69f2b1135fc0f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a562e3be64288b45bd9cc0ac7fc9d5514"><td class="memItemLeft" align="right" valign="top"><a id="a562e3be64288b45bd9cc0ac7fc9d5514"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a562e3be64288b45bd9cc0ac7fc9d5514">REG_GMAC_RJFML</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000848UL)</td></tr>
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<tr class="memdesc:a562e3be64288b45bd9cc0ac7fc9d5514"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) RX Jumbo Frame Max Length Register <br /></td></tr>
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<tr class="separator:a562e3be64288b45bd9cc0ac7fc9d5514"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9dfca2fe17f7d515932fd7b34a9bf923"><td class="memItemLeft" align="right" valign="top"><a id="a9dfca2fe17f7d515932fd7b34a9bf923"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a9dfca2fe17f7d515932fd7b34a9bf923">REG_GMAC_HRB</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000880UL)</td></tr>
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<tr class="memdesc:a9dfca2fe17f7d515932fd7b34a9bf923"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Hash Register Bottom [31:0] <br /></td></tr>
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<tr class="separator:a9dfca2fe17f7d515932fd7b34a9bf923"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad4f33b96c78890ce8265cf2e6d975560"><td class="memItemLeft" align="right" valign="top"><a id="ad4f33b96c78890ce8265cf2e6d975560"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#ad4f33b96c78890ce8265cf2e6d975560">REG_GMAC_HRT</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000884UL)</td></tr>
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<tr class="memdesc:ad4f33b96c78890ce8265cf2e6d975560"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Hash Register Top [63:32] <br /></td></tr>
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<tr class="separator:ad4f33b96c78890ce8265cf2e6d975560"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac1c46a84258531a9583e68be3ded9175"><td class="memItemLeft" align="right" valign="top"><a id="ac1c46a84258531a9583e68be3ded9175"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#ac1c46a84258531a9583e68be3ded9175">REG_GMAC_SAB0</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000888UL)</td></tr>
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<tr class="memdesc:ac1c46a84258531a9583e68be3ded9175"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Specific Address Bottom [31:0] Register 0 <br /></td></tr>
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<tr class="separator:ac1c46a84258531a9583e68be3ded9175"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a06d987f0e8381268b1fb7276abb73ecc"><td class="memItemLeft" align="right" valign="top"><a id="a06d987f0e8381268b1fb7276abb73ecc"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a06d987f0e8381268b1fb7276abb73ecc">REG_GMAC_SAT0</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x4200088CUL)</td></tr>
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<tr class="memdesc:a06d987f0e8381268b1fb7276abb73ecc"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Specific Address Top [47:32] Register 0 <br /></td></tr>
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<tr class="separator:a06d987f0e8381268b1fb7276abb73ecc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abb2be1b89cc85a3ad916fda40f93a1d9"><td class="memItemLeft" align="right" valign="top"><a id="abb2be1b89cc85a3ad916fda40f93a1d9"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#abb2be1b89cc85a3ad916fda40f93a1d9">REG_GMAC_SAB1</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000890UL)</td></tr>
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<tr class="memdesc:abb2be1b89cc85a3ad916fda40f93a1d9"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Specific Address Bottom [31:0] Register 1 <br /></td></tr>
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<tr class="separator:abb2be1b89cc85a3ad916fda40f93a1d9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a186b6052896247d6eb13d4798a1c0fe2"><td class="memItemLeft" align="right" valign="top"><a id="a186b6052896247d6eb13d4798a1c0fe2"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a186b6052896247d6eb13d4798a1c0fe2">REG_GMAC_SAT1</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000894UL)</td></tr>
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<tr class="memdesc:a186b6052896247d6eb13d4798a1c0fe2"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Specific Address Top [47:32] Register 1 <br /></td></tr>
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<tr class="separator:a186b6052896247d6eb13d4798a1c0fe2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:adfa4b5f59e4f92660a957bf766b8ae6f"><td class="memItemLeft" align="right" valign="top"><a id="adfa4b5f59e4f92660a957bf766b8ae6f"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#adfa4b5f59e4f92660a957bf766b8ae6f">REG_GMAC_SAB2</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x42000898UL)</td></tr>
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<tr class="memdesc:adfa4b5f59e4f92660a957bf766b8ae6f"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Specific Address Bottom [31:0] Register 2 <br /></td></tr>
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<tr class="separator:adfa4b5f59e4f92660a957bf766b8ae6f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6d636f48a3fe5b0c553c88b3ccfc3190"><td class="memItemLeft" align="right" valign="top"><a id="a6d636f48a3fe5b0c553c88b3ccfc3190"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a6d636f48a3fe5b0c553c88b3ccfc3190">REG_GMAC_SAT2</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x4200089CUL)</td></tr>
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<tr class="memdesc:a6d636f48a3fe5b0c553c88b3ccfc3190"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Specific Address Top [47:32] Register 2 <br /></td></tr>
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<tr class="separator:a6d636f48a3fe5b0c553c88b3ccfc3190"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac81a6d3932c839adf36c97ce60d514e4"><td class="memItemLeft" align="right" valign="top"><a id="ac81a6d3932c839adf36c97ce60d514e4"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#ac81a6d3932c839adf36c97ce60d514e4">REG_GMAC_SAB3</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420008A0UL)</td></tr>
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<tr class="memdesc:ac81a6d3932c839adf36c97ce60d514e4"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Specific Address Bottom [31:0] Register 3 <br /></td></tr>
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<tr class="separator:ac81a6d3932c839adf36c97ce60d514e4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af70fc27ccf721da58ce1fa87ba811154"><td class="memItemLeft" align="right" valign="top"><a id="af70fc27ccf721da58ce1fa87ba811154"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#af70fc27ccf721da58ce1fa87ba811154">REG_GMAC_SAT3</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420008A4UL)</td></tr>
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<tr class="memdesc:af70fc27ccf721da58ce1fa87ba811154"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Specific Address Top [47:32] Register 3 <br /></td></tr>
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<tr class="separator:af70fc27ccf721da58ce1fa87ba811154"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7e4573b8a1942cb2b20a3907807f6ff6"><td class="memItemLeft" align="right" valign="top"><a id="a7e4573b8a1942cb2b20a3907807f6ff6"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a7e4573b8a1942cb2b20a3907807f6ff6">REG_GMAC_TIDM0</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420008A8UL)</td></tr>
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<tr class="memdesc:a7e4573b8a1942cb2b20a3907807f6ff6"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Type ID Match Register 0 <br /></td></tr>
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<tr class="separator:a7e4573b8a1942cb2b20a3907807f6ff6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a31c4b24dc51d5b5a10b2d0ed0228da96"><td class="memItemLeft" align="right" valign="top"><a id="a31c4b24dc51d5b5a10b2d0ed0228da96"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a31c4b24dc51d5b5a10b2d0ed0228da96">REG_GMAC_TIDM1</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420008ACUL)</td></tr>
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<tr class="memdesc:a31c4b24dc51d5b5a10b2d0ed0228da96"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Type ID Match Register 1 <br /></td></tr>
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<tr class="separator:a31c4b24dc51d5b5a10b2d0ed0228da96"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a335d61cf7466ba088a8e811cad2c092b"><td class="memItemLeft" align="right" valign="top"><a id="a335d61cf7466ba088a8e811cad2c092b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a335d61cf7466ba088a8e811cad2c092b">REG_GMAC_TIDM2</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420008B0UL)</td></tr>
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<tr class="memdesc:a335d61cf7466ba088a8e811cad2c092b"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Type ID Match Register 2 <br /></td></tr>
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<tr class="separator:a335d61cf7466ba088a8e811cad2c092b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a701bcf5da0541db8547ee5a4f8aabbb4"><td class="memItemLeft" align="right" valign="top"><a id="a701bcf5da0541db8547ee5a4f8aabbb4"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a701bcf5da0541db8547ee5a4f8aabbb4">REG_GMAC_TIDM3</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420008B4UL)</td></tr>
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<tr class="memdesc:a701bcf5da0541db8547ee5a4f8aabbb4"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Type ID Match Register 3 <br /></td></tr>
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<tr class="separator:a701bcf5da0541db8547ee5a4f8aabbb4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a94b27a3756fefb3015329abfc0e3d815"><td class="memItemLeft" align="right" valign="top"><a id="a94b27a3756fefb3015329abfc0e3d815"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a94b27a3756fefb3015329abfc0e3d815">REG_GMAC_WOL</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420008B8UL)</td></tr>
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<tr class="memdesc:a94b27a3756fefb3015329abfc0e3d815"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Wake on LAN <br /></td></tr>
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<tr class="separator:a94b27a3756fefb3015329abfc0e3d815"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af096c639742e9311ec86ea774488cdf9"><td class="memItemLeft" align="right" valign="top"><a id="af096c639742e9311ec86ea774488cdf9"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#af096c639742e9311ec86ea774488cdf9">REG_GMAC_IPGS</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420008BCUL)</td></tr>
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<tr class="memdesc:af096c639742e9311ec86ea774488cdf9"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) IPG Stretch Register <br /></td></tr>
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<tr class="separator:af096c639742e9311ec86ea774488cdf9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab1ad8dddf49555c9bef9d6218c09dda9"><td class="memItemLeft" align="right" valign="top"><a id="ab1ad8dddf49555c9bef9d6218c09dda9"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#ab1ad8dddf49555c9bef9d6218c09dda9">REG_GMAC_SVLAN</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420008C0UL)</td></tr>
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<tr class="memdesc:ab1ad8dddf49555c9bef9d6218c09dda9"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Stacked VLAN Register <br /></td></tr>
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<tr class="separator:ab1ad8dddf49555c9bef9d6218c09dda9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab71b69558bc57028677e25f86d3adbf6"><td class="memItemLeft" align="right" valign="top"><a id="ab71b69558bc57028677e25f86d3adbf6"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#ab71b69558bc57028677e25f86d3adbf6">REG_GMAC_TPFCP</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420008C4UL)</td></tr>
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<tr class="memdesc:ab71b69558bc57028677e25f86d3adbf6"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Transmit PFC Pause Register <br /></td></tr>
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<tr class="separator:ab71b69558bc57028677e25f86d3adbf6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aafb0ab4c38dbbb9e51dbcef714ef2e02"><td class="memItemLeft" align="right" valign="top"><a id="aafb0ab4c38dbbb9e51dbcef714ef2e02"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#aafb0ab4c38dbbb9e51dbcef714ef2e02">REG_GMAC_SAMB1</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420008C8UL)</td></tr>
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<tr class="memdesc:aafb0ab4c38dbbb9e51dbcef714ef2e02"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Specific Address 1 Mask Bottom [31:0] Register <br /></td></tr>
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<tr class="separator:aafb0ab4c38dbbb9e51dbcef714ef2e02"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0df621afe149489cfe2d2884d3ef7159"><td class="memItemLeft" align="right" valign="top"><a id="a0df621afe149489cfe2d2884d3ef7159"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a0df621afe149489cfe2d2884d3ef7159">REG_GMAC_SAMT1</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420008CCUL)</td></tr>
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<tr class="memdesc:a0df621afe149489cfe2d2884d3ef7159"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Specific Address 1 Mask Top [47:32] Register <br /></td></tr>
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<tr class="separator:a0df621afe149489cfe2d2884d3ef7159"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a68bcc07214762ec0a7c3ae20d0d20b46"><td class="memItemLeft" align="right" valign="top"><a id="a68bcc07214762ec0a7c3ae20d0d20b46"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a68bcc07214762ec0a7c3ae20d0d20b46">REG_GMAC_NSC</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420008DCUL)</td></tr>
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<tr class="memdesc:a68bcc07214762ec0a7c3ae20d0d20b46"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Tsu timer comparison nanoseconds Register <br /></td></tr>
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<tr class="separator:a68bcc07214762ec0a7c3ae20d0d20b46"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a43f9f9ae94f760057614f11b7d1a1622"><td class="memItemLeft" align="right" valign="top"><a id="a43f9f9ae94f760057614f11b7d1a1622"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a43f9f9ae94f760057614f11b7d1a1622">REG_GMAC_SCL</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420008E0UL)</td></tr>
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<tr class="memdesc:a43f9f9ae94f760057614f11b7d1a1622"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Tsu timer second comparison Register <br /></td></tr>
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<tr class="separator:a43f9f9ae94f760057614f11b7d1a1622"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aeb18949f7ff8e9f79d51c82fa06ad7a5"><td class="memItemLeft" align="right" valign="top"><a id="aeb18949f7ff8e9f79d51c82fa06ad7a5"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#aeb18949f7ff8e9f79d51c82fa06ad7a5">REG_GMAC_SCH</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420008E4UL)</td></tr>
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<tr class="memdesc:aeb18949f7ff8e9f79d51c82fa06ad7a5"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Tsu timer second comparison Register <br /></td></tr>
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<tr class="separator:aeb18949f7ff8e9f79d51c82fa06ad7a5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a73bf43e526abd10b17e58b0062cb29e2"><td class="memItemLeft" align="right" valign="top"><a id="a73bf43e526abd10b17e58b0062cb29e2"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a73bf43e526abd10b17e58b0062cb29e2">REG_GMAC_EFTSH</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x420008E8UL)</td></tr>
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<tr class="memdesc:a73bf43e526abd10b17e58b0062cb29e2"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) PTP Event Frame Transmitted Seconds High Register <br /></td></tr>
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<tr class="separator:a73bf43e526abd10b17e58b0062cb29e2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:acfd792d58551430bc1d5ab03ff60023f"><td class="memItemLeft" align="right" valign="top"><a id="acfd792d58551430bc1d5ab03ff60023f"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#acfd792d58551430bc1d5ab03ff60023f">REG_GMAC_EFRSH</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x420008ECUL)</td></tr>
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<tr class="memdesc:acfd792d58551430bc1d5ab03ff60023f"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) PTP Event Frame Received Seconds High Register <br /></td></tr>
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<tr class="separator:acfd792d58551430bc1d5ab03ff60023f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa12206679d660a4a8f18f51eb63e8147"><td class="memItemLeft" align="right" valign="top"><a id="aa12206679d660a4a8f18f51eb63e8147"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#aa12206679d660a4a8f18f51eb63e8147">REG_GMAC_PEFTSH</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x420008F0UL)</td></tr>
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<tr class="memdesc:aa12206679d660a4a8f18f51eb63e8147"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) PTP Peer Event Frame Transmitted Seconds High Register <br /></td></tr>
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<tr class="separator:aa12206679d660a4a8f18f51eb63e8147"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1c269645360b7a8cdbd71b83d79e7741"><td class="memItemLeft" align="right" valign="top"><a id="a1c269645360b7a8cdbd71b83d79e7741"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a1c269645360b7a8cdbd71b83d79e7741">REG_GMAC_PEFRSH</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x420008F4UL)</td></tr>
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<tr class="memdesc:a1c269645360b7a8cdbd71b83d79e7741"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) PTP Peer Event Frame Received Seconds High Register <br /></td></tr>
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<tr class="separator:a1c269645360b7a8cdbd71b83d79e7741"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a41eae85c63442611a1f1346fc3b342e4"><td class="memItemLeft" align="right" valign="top"><a id="a41eae85c63442611a1f1346fc3b342e4"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a41eae85c63442611a1f1346fc3b342e4">REG_GMAC_OTLO</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000900UL)</td></tr>
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<tr class="memdesc:a41eae85c63442611a1f1346fc3b342e4"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Octets Transmitted [31:0] Register <br /></td></tr>
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<tr class="separator:a41eae85c63442611a1f1346fc3b342e4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6fca64c022d3bbe926aabd06f706b937"><td class="memItemLeft" align="right" valign="top"><a id="a6fca64c022d3bbe926aabd06f706b937"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a6fca64c022d3bbe926aabd06f706b937">REG_GMAC_OTHI</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000904UL)</td></tr>
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<tr class="memdesc:a6fca64c022d3bbe926aabd06f706b937"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Octets Transmitted [47:32] Register <br /></td></tr>
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<tr class="separator:a6fca64c022d3bbe926aabd06f706b937"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9b6a4f176638d7b0b6ff472ff62e0ace"><td class="memItemLeft" align="right" valign="top"><a id="a9b6a4f176638d7b0b6ff472ff62e0ace"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a9b6a4f176638d7b0b6ff472ff62e0ace">REG_GMAC_FT</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000908UL)</td></tr>
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<tr class="memdesc:a9b6a4f176638d7b0b6ff472ff62e0ace"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Frames Transmitted Register <br /></td></tr>
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<tr class="separator:a9b6a4f176638d7b0b6ff472ff62e0ace"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aaa25277d01ab17d5d321a166723b7a4f"><td class="memItemLeft" align="right" valign="top"><a id="aaa25277d01ab17d5d321a166723b7a4f"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#aaa25277d01ab17d5d321a166723b7a4f">REG_GMAC_BCFT</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x4200090CUL)</td></tr>
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<tr class="memdesc:aaa25277d01ab17d5d321a166723b7a4f"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Broadcast Frames Transmitted Register <br /></td></tr>
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<tr class="separator:aaa25277d01ab17d5d321a166723b7a4f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:acfb253706b0ed9d928065a4e0d27b298"><td class="memItemLeft" align="right" valign="top"><a id="acfb253706b0ed9d928065a4e0d27b298"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#acfb253706b0ed9d928065a4e0d27b298">REG_GMAC_MFT</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000910UL)</td></tr>
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<tr class="memdesc:acfb253706b0ed9d928065a4e0d27b298"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Multicast Frames Transmitted Register <br /></td></tr>
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<tr class="separator:acfb253706b0ed9d928065a4e0d27b298"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad014c31529c5327e60cf76a891589dfa"><td class="memItemLeft" align="right" valign="top"><a id="ad014c31529c5327e60cf76a891589dfa"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#ad014c31529c5327e60cf76a891589dfa">REG_GMAC_PFT</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000914UL)</td></tr>
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<tr class="memdesc:ad014c31529c5327e60cf76a891589dfa"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Pause Frames Transmitted Register <br /></td></tr>
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<tr class="separator:ad014c31529c5327e60cf76a891589dfa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9375aae9f572ddce1f4095f6f0581a1c"><td class="memItemLeft" align="right" valign="top"><a id="a9375aae9f572ddce1f4095f6f0581a1c"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a9375aae9f572ddce1f4095f6f0581a1c">REG_GMAC_BFT64</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000918UL)</td></tr>
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<tr class="memdesc:a9375aae9f572ddce1f4095f6f0581a1c"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) 64 Byte Frames Transmitted Register <br /></td></tr>
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<tr class="separator:a9375aae9f572ddce1f4095f6f0581a1c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab8806b04656497f45f4cd5d14a5b316f"><td class="memItemLeft" align="right" valign="top"><a id="ab8806b04656497f45f4cd5d14a5b316f"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#ab8806b04656497f45f4cd5d14a5b316f">REG_GMAC_TBFT127</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x4200091CUL)</td></tr>
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<tr class="memdesc:ab8806b04656497f45f4cd5d14a5b316f"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) 65 to 127 Byte Frames Transmitted Register <br /></td></tr>
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<tr class="separator:ab8806b04656497f45f4cd5d14a5b316f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a45eecaab04d2d56848b9ab2f5ba3b4d4"><td class="memItemLeft" align="right" valign="top"><a id="a45eecaab04d2d56848b9ab2f5ba3b4d4"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a45eecaab04d2d56848b9ab2f5ba3b4d4">REG_GMAC_TBFT255</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000920UL)</td></tr>
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<tr class="memdesc:a45eecaab04d2d56848b9ab2f5ba3b4d4"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) 128 to 255 Byte Frames Transmitted Register <br /></td></tr>
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<tr class="separator:a45eecaab04d2d56848b9ab2f5ba3b4d4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aae65fe5eb2521ed5e413287f80286d1f"><td class="memItemLeft" align="right" valign="top"><a id="aae65fe5eb2521ed5e413287f80286d1f"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#aae65fe5eb2521ed5e413287f80286d1f">REG_GMAC_TBFT511</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000924UL)</td></tr>
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<tr class="memdesc:aae65fe5eb2521ed5e413287f80286d1f"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) 256 to 511 Byte Frames Transmitted Register <br /></td></tr>
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<tr class="separator:aae65fe5eb2521ed5e413287f80286d1f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7009b149a3f13b66319c0f26d464c1f4"><td class="memItemLeft" align="right" valign="top"><a id="a7009b149a3f13b66319c0f26d464c1f4"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a7009b149a3f13b66319c0f26d464c1f4">REG_GMAC_TBFT1023</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000928UL)</td></tr>
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<tr class="memdesc:a7009b149a3f13b66319c0f26d464c1f4"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) 512 to 1023 Byte Frames Transmitted Register <br /></td></tr>
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<tr class="separator:a7009b149a3f13b66319c0f26d464c1f4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0dcdebcf15d084c7b8db2ec28f9f3f3d"><td class="memItemLeft" align="right" valign="top"><a id="a0dcdebcf15d084c7b8db2ec28f9f3f3d"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a0dcdebcf15d084c7b8db2ec28f9f3f3d">REG_GMAC_TBFT1518</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x4200092CUL)</td></tr>
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<tr class="memdesc:a0dcdebcf15d084c7b8db2ec28f9f3f3d"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) 1024 to 1518 Byte Frames Transmitted Register <br /></td></tr>
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<tr class="separator:a0dcdebcf15d084c7b8db2ec28f9f3f3d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a19876ffc2c7714045375dd5699b4466f"><td class="memItemLeft" align="right" valign="top"><a id="a19876ffc2c7714045375dd5699b4466f"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a19876ffc2c7714045375dd5699b4466f">REG_GMAC_GTBFT1518</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000930UL)</td></tr>
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<tr class="memdesc:a19876ffc2c7714045375dd5699b4466f"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Greater Than 1518 Byte Frames Transmitted Register <br /></td></tr>
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<tr class="separator:a19876ffc2c7714045375dd5699b4466f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afec7c2d089aa8f82567e42c65c6f3a95"><td class="memItemLeft" align="right" valign="top"><a id="afec7c2d089aa8f82567e42c65c6f3a95"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#afec7c2d089aa8f82567e42c65c6f3a95">REG_GMAC_TUR</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000934UL)</td></tr>
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<tr class="memdesc:afec7c2d089aa8f82567e42c65c6f3a95"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Transmit Underruns Register <br /></td></tr>
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<tr class="separator:afec7c2d089aa8f82567e42c65c6f3a95"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a87690928892a17d86b388d3fa02c75e5"><td class="memItemLeft" align="right" valign="top"><a id="a87690928892a17d86b388d3fa02c75e5"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a87690928892a17d86b388d3fa02c75e5">REG_GMAC_SCF</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000938UL)</td></tr>
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<tr class="memdesc:a87690928892a17d86b388d3fa02c75e5"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Single Collision Frames Register <br /></td></tr>
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<tr class="separator:a87690928892a17d86b388d3fa02c75e5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a32294efa9ccf073cd3707a391d2ab5bf"><td class="memItemLeft" align="right" valign="top"><a id="a32294efa9ccf073cd3707a391d2ab5bf"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a32294efa9ccf073cd3707a391d2ab5bf">REG_GMAC_MCF</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x4200093CUL)</td></tr>
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<tr class="memdesc:a32294efa9ccf073cd3707a391d2ab5bf"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Multiple Collision Frames Register <br /></td></tr>
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<tr class="separator:a32294efa9ccf073cd3707a391d2ab5bf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a80c6b38339431aa96fd8378ab0fbf521"><td class="memItemLeft" align="right" valign="top"><a id="a80c6b38339431aa96fd8378ab0fbf521"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a80c6b38339431aa96fd8378ab0fbf521">REG_GMAC_EC</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000940UL)</td></tr>
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<tr class="memdesc:a80c6b38339431aa96fd8378ab0fbf521"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Excessive Collisions Register <br /></td></tr>
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<tr class="separator:a80c6b38339431aa96fd8378ab0fbf521"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af7844a5b973f095e62331f56a8c32d06"><td class="memItemLeft" align="right" valign="top"><a id="af7844a5b973f095e62331f56a8c32d06"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#af7844a5b973f095e62331f56a8c32d06">REG_GMAC_LC</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000944UL)</td></tr>
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<tr class="memdesc:af7844a5b973f095e62331f56a8c32d06"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Late Collisions Register <br /></td></tr>
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<tr class="separator:af7844a5b973f095e62331f56a8c32d06"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a39d87377dfef5af10917100150051594"><td class="memItemLeft" align="right" valign="top"><a id="a39d87377dfef5af10917100150051594"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a39d87377dfef5af10917100150051594">REG_GMAC_DTF</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000948UL)</td></tr>
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<tr class="memdesc:a39d87377dfef5af10917100150051594"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Deferred Transmission Frames Register <br /></td></tr>
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<tr class="separator:a39d87377dfef5af10917100150051594"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4c3f561bfb85e2ba7d758ea460e78fec"><td class="memItemLeft" align="right" valign="top"><a id="a4c3f561bfb85e2ba7d758ea460e78fec"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a4c3f561bfb85e2ba7d758ea460e78fec">REG_GMAC_CSE</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x4200094CUL)</td></tr>
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<tr class="memdesc:a4c3f561bfb85e2ba7d758ea460e78fec"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Carrier Sense Errors Register <br /></td></tr>
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<tr class="separator:a4c3f561bfb85e2ba7d758ea460e78fec"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab616ff288f2f54f2623c146a00393f59"><td class="memItemLeft" align="right" valign="top"><a id="ab616ff288f2f54f2623c146a00393f59"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#ab616ff288f2f54f2623c146a00393f59">REG_GMAC_ORLO</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000950UL)</td></tr>
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|
<tr class="memdesc:ab616ff288f2f54f2623c146a00393f59"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Octets Received [31:0] Received <br /></td></tr>
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|
<tr class="separator:ab616ff288f2f54f2623c146a00393f59"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:a060be354b2f80506987beec7e7ef54b0"><td class="memItemLeft" align="right" valign="top"><a id="a060be354b2f80506987beec7e7ef54b0"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a060be354b2f80506987beec7e7ef54b0">REG_GMAC_ORHI</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000954UL)</td></tr>
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|
<tr class="memdesc:a060be354b2f80506987beec7e7ef54b0"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Octets Received [47:32] Received <br /></td></tr>
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|
<tr class="separator:a060be354b2f80506987beec7e7ef54b0"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:a8fbfe8376a61d1f309f56431c6dd5592"><td class="memItemLeft" align="right" valign="top"><a id="a8fbfe8376a61d1f309f56431c6dd5592"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a8fbfe8376a61d1f309f56431c6dd5592">REG_GMAC_FR</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000958UL)</td></tr>
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|
<tr class="memdesc:a8fbfe8376a61d1f309f56431c6dd5592"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Frames Received Register <br /></td></tr>
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<tr class="separator:a8fbfe8376a61d1f309f56431c6dd5592"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:a96f59dd05eb072dbaf8506d61fc2f654"><td class="memItemLeft" align="right" valign="top"><a id="a96f59dd05eb072dbaf8506d61fc2f654"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a96f59dd05eb072dbaf8506d61fc2f654">REG_GMAC_BCFR</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x4200095CUL)</td></tr>
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|
<tr class="memdesc:a96f59dd05eb072dbaf8506d61fc2f654"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Broadcast Frames Received Register <br /></td></tr>
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<tr class="separator:a96f59dd05eb072dbaf8506d61fc2f654"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:abcf0eaad767d66a9c81a858201294ba3"><td class="memItemLeft" align="right" valign="top"><a id="abcf0eaad767d66a9c81a858201294ba3"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#abcf0eaad767d66a9c81a858201294ba3">REG_GMAC_MFR</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000960UL)</td></tr>
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|
<tr class="memdesc:abcf0eaad767d66a9c81a858201294ba3"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Multicast Frames Received Register <br /></td></tr>
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<tr class="separator:abcf0eaad767d66a9c81a858201294ba3"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:a2a123e5344dabe576664e34b7db915bc"><td class="memItemLeft" align="right" valign="top"><a id="a2a123e5344dabe576664e34b7db915bc"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a2a123e5344dabe576664e34b7db915bc">REG_GMAC_PFR</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000964UL)</td></tr>
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|
<tr class="memdesc:a2a123e5344dabe576664e34b7db915bc"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Pause Frames Received Register <br /></td></tr>
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<tr class="separator:a2a123e5344dabe576664e34b7db915bc"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:a33535e6b9be7f044103024212755b1ce"><td class="memItemLeft" align="right" valign="top"><a id="a33535e6b9be7f044103024212755b1ce"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a33535e6b9be7f044103024212755b1ce">REG_GMAC_BFR64</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000968UL)</td></tr>
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|
<tr class="memdesc:a33535e6b9be7f044103024212755b1ce"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) 64 Byte Frames Received Register <br /></td></tr>
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<tr class="separator:a33535e6b9be7f044103024212755b1ce"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:a5c0a22923d2872ed1e04589b78278d8a"><td class="memItemLeft" align="right" valign="top"><a id="a5c0a22923d2872ed1e04589b78278d8a"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a5c0a22923d2872ed1e04589b78278d8a">REG_GMAC_TBFR127</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x4200096CUL)</td></tr>
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|
<tr class="memdesc:a5c0a22923d2872ed1e04589b78278d8a"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) 65 to 127 Byte Frames Received Register <br /></td></tr>
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<tr class="separator:a5c0a22923d2872ed1e04589b78278d8a"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:ab533bbb2ff35e334dcb8be51e335950f"><td class="memItemLeft" align="right" valign="top"><a id="ab533bbb2ff35e334dcb8be51e335950f"></a>
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|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#ab533bbb2ff35e334dcb8be51e335950f">REG_GMAC_TBFR255</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000970UL)</td></tr>
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|
<tr class="memdesc:ab533bbb2ff35e334dcb8be51e335950f"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) 128 to 255 Byte Frames Received Register <br /></td></tr>
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<tr class="separator:ab533bbb2ff35e334dcb8be51e335950f"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:a9ee47886a4b44b39cb0fcdd6ccc3b588"><td class="memItemLeft" align="right" valign="top"><a id="a9ee47886a4b44b39cb0fcdd6ccc3b588"></a>
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|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a9ee47886a4b44b39cb0fcdd6ccc3b588">REG_GMAC_TBFR511</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000974UL)</td></tr>
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|
<tr class="memdesc:a9ee47886a4b44b39cb0fcdd6ccc3b588"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) 256 to 511Byte Frames Received Register <br /></td></tr>
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|
<tr class="separator:a9ee47886a4b44b39cb0fcdd6ccc3b588"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:af2436cc4aa20dce3fed3ceb75d93ae28"><td class="memItemLeft" align="right" valign="top"><a id="af2436cc4aa20dce3fed3ceb75d93ae28"></a>
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|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#af2436cc4aa20dce3fed3ceb75d93ae28">REG_GMAC_TBFR1023</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000978UL)</td></tr>
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|
<tr class="memdesc:af2436cc4aa20dce3fed3ceb75d93ae28"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) 512 to 1023 Byte Frames Received Register <br /></td></tr>
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|
<tr class="separator:af2436cc4aa20dce3fed3ceb75d93ae28"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:a5349cd02411ab7f03cb405b0b2c4fd30"><td class="memItemLeft" align="right" valign="top"><a id="a5349cd02411ab7f03cb405b0b2c4fd30"></a>
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|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a5349cd02411ab7f03cb405b0b2c4fd30">REG_GMAC_TBFR1518</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x4200097CUL)</td></tr>
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|
<tr class="memdesc:a5349cd02411ab7f03cb405b0b2c4fd30"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) 1024 to 1518 Byte Frames Received Register <br /></td></tr>
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|
<tr class="separator:a5349cd02411ab7f03cb405b0b2c4fd30"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a9597479d10e6526b0f59bf572db8d290"><td class="memItemLeft" align="right" valign="top"><a id="a9597479d10e6526b0f59bf572db8d290"></a>
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|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a9597479d10e6526b0f59bf572db8d290">REG_GMAC_TMXBFR</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000980UL)</td></tr>
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|
<tr class="memdesc:a9597479d10e6526b0f59bf572db8d290"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) 1519 to Maximum Byte Frames Received Register <br /></td></tr>
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|
<tr class="separator:a9597479d10e6526b0f59bf572db8d290"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a5f4fd0d6b2d8fb6cf905b246e4f4009f"><td class="memItemLeft" align="right" valign="top"><a id="a5f4fd0d6b2d8fb6cf905b246e4f4009f"></a>
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|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a5f4fd0d6b2d8fb6cf905b246e4f4009f">REG_GMAC_UFR</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000984UL)</td></tr>
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|
<tr class="memdesc:a5f4fd0d6b2d8fb6cf905b246e4f4009f"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Undersize Frames Received Register <br /></td></tr>
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<tr class="separator:a5f4fd0d6b2d8fb6cf905b246e4f4009f"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:aaa51e935f15d5e95eef22ae241742d6a"><td class="memItemLeft" align="right" valign="top"><a id="aaa51e935f15d5e95eef22ae241742d6a"></a>
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|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#aaa51e935f15d5e95eef22ae241742d6a">REG_GMAC_OFR</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000988UL)</td></tr>
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|
<tr class="memdesc:aaa51e935f15d5e95eef22ae241742d6a"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Oversize Frames Received Register <br /></td></tr>
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|
<tr class="separator:aaa51e935f15d5e95eef22ae241742d6a"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:aaf03aff0ea1fd929a660863a841c6393"><td class="memItemLeft" align="right" valign="top"><a id="aaf03aff0ea1fd929a660863a841c6393"></a>
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|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#aaf03aff0ea1fd929a660863a841c6393">REG_GMAC_JR</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x4200098CUL)</td></tr>
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|
<tr class="memdesc:aaf03aff0ea1fd929a660863a841c6393"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Jabbers Received Register <br /></td></tr>
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|
<tr class="separator:aaf03aff0ea1fd929a660863a841c6393"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a109a50c41e8d3edc3eae1cd9058e318c"><td class="memItemLeft" align="right" valign="top"><a id="a109a50c41e8d3edc3eae1cd9058e318c"></a>
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|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a109a50c41e8d3edc3eae1cd9058e318c">REG_GMAC_FCSE</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000990UL)</td></tr>
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|
<tr class="memdesc:a109a50c41e8d3edc3eae1cd9058e318c"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Frame Check Sequence Errors Register <br /></td></tr>
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|
<tr class="separator:a109a50c41e8d3edc3eae1cd9058e318c"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ac316b68fd63d4f505af964300412edf3"><td class="memItemLeft" align="right" valign="top"><a id="ac316b68fd63d4f505af964300412edf3"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#ac316b68fd63d4f505af964300412edf3">REG_GMAC_LFFE</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000994UL)</td></tr>
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|
<tr class="memdesc:ac316b68fd63d4f505af964300412edf3"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Length Field Frame Errors Register <br /></td></tr>
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|
<tr class="separator:ac316b68fd63d4f505af964300412edf3"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:aa832f62d332920ebd3a1a50f7bb22d44"><td class="memItemLeft" align="right" valign="top"><a id="aa832f62d332920ebd3a1a50f7bb22d44"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#aa832f62d332920ebd3a1a50f7bb22d44">REG_GMAC_RSE</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000998UL)</td></tr>
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|
<tr class="memdesc:aa832f62d332920ebd3a1a50f7bb22d44"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Receive Symbol Errors Register <br /></td></tr>
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|
<tr class="separator:aa832f62d332920ebd3a1a50f7bb22d44"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a5718489e26f1f838d7da2155461ad26c"><td class="memItemLeft" align="right" valign="top"><a id="a5718489e26f1f838d7da2155461ad26c"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a5718489e26f1f838d7da2155461ad26c">REG_GMAC_AE</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x4200099CUL)</td></tr>
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|
<tr class="memdesc:a5718489e26f1f838d7da2155461ad26c"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Alignment Errors Register <br /></td></tr>
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|
<tr class="separator:a5718489e26f1f838d7da2155461ad26c"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a7bbe54db9238cb322ea9db31a5efa6c6"><td class="memItemLeft" align="right" valign="top"><a id="a7bbe54db9238cb322ea9db31a5efa6c6"></a>
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|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a7bbe54db9238cb322ea9db31a5efa6c6">REG_GMAC_RRE</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x420009A0UL)</td></tr>
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|
<tr class="memdesc:a7bbe54db9238cb322ea9db31a5efa6c6"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Receive Resource Errors Register <br /></td></tr>
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|
<tr class="separator:a7bbe54db9238cb322ea9db31a5efa6c6"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a0ef3e3edcf9d6fa8776c1613c35b3779"><td class="memItemLeft" align="right" valign="top"><a id="a0ef3e3edcf9d6fa8776c1613c35b3779"></a>
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|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a0ef3e3edcf9d6fa8776c1613c35b3779">REG_GMAC_ROE</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x420009A4UL)</td></tr>
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|
<tr class="memdesc:a0ef3e3edcf9d6fa8776c1613c35b3779"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Receive Overrun Register <br /></td></tr>
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<tr class="separator:a0ef3e3edcf9d6fa8776c1613c35b3779"><td class="memSeparator" colspan="2"> </td></tr>
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|
<tr class="memitem:a4e7e56b1a94ba6444a877394b1063092"><td class="memItemLeft" align="right" valign="top"><a id="a4e7e56b1a94ba6444a877394b1063092"></a>
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|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a4e7e56b1a94ba6444a877394b1063092">REG_GMAC_IHCE</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x420009A8UL)</td></tr>
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|
<tr class="memdesc:a4e7e56b1a94ba6444a877394b1063092"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) IP Header Checksum Errors Register <br /></td></tr>
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|
<tr class="separator:a4e7e56b1a94ba6444a877394b1063092"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ab413b4e7155eb7f58831e14fb0ca0cb3"><td class="memItemLeft" align="right" valign="top"><a id="ab413b4e7155eb7f58831e14fb0ca0cb3"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#ab413b4e7155eb7f58831e14fb0ca0cb3">REG_GMAC_TCE</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x420009ACUL)</td></tr>
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|
<tr class="memdesc:ab413b4e7155eb7f58831e14fb0ca0cb3"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) TCP Checksum Errors Register <br /></td></tr>
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<tr class="separator:ab413b4e7155eb7f58831e14fb0ca0cb3"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a86bab588d7fafe3fa6621c3447f9b03a"><td class="memItemLeft" align="right" valign="top"><a id="a86bab588d7fafe3fa6621c3447f9b03a"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a86bab588d7fafe3fa6621c3447f9b03a">REG_GMAC_UCE</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x420009B0UL)</td></tr>
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<tr class="memdesc:a86bab588d7fafe3fa6621c3447f9b03a"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) UDP Checksum Errors Register <br /></td></tr>
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<tr class="separator:a86bab588d7fafe3fa6621c3447f9b03a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afc7686331e7c914ac3d2eb1b96fc4c01"><td class="memItemLeft" align="right" valign="top"><a id="afc7686331e7c914ac3d2eb1b96fc4c01"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#afc7686331e7c914ac3d2eb1b96fc4c01">REG_GMAC_TISUBN</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420009BCUL)</td></tr>
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<tr class="memdesc:afc7686331e7c914ac3d2eb1b96fc4c01"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) 1588 Timer Increment [15:0] Sub-Nanoseconds Register <br /></td></tr>
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<tr class="separator:afc7686331e7c914ac3d2eb1b96fc4c01"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a195609c73403cc2adbc2c2806e4d6f81"><td class="memItemLeft" align="right" valign="top"><a id="a195609c73403cc2adbc2c2806e4d6f81"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a195609c73403cc2adbc2c2806e4d6f81">REG_GMAC_TSH</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420009C0UL)</td></tr>
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<tr class="memdesc:a195609c73403cc2adbc2c2806e4d6f81"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) 1588 Timer Seconds High [15:0] Register <br /></td></tr>
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<tr class="separator:a195609c73403cc2adbc2c2806e4d6f81"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aec2b636727216ff24a4229310a493653"><td class="memItemLeft" align="right" valign="top"><a id="aec2b636727216ff24a4229310a493653"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#aec2b636727216ff24a4229310a493653">REG_GMAC_TSSSL</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420009C8UL)</td></tr>
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<tr class="memdesc:aec2b636727216ff24a4229310a493653"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) 1588 Timer Sync Strobe Seconds [31:0] Register <br /></td></tr>
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<tr class="separator:aec2b636727216ff24a4229310a493653"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abbd337cf91a56a0f2359566ac40a9856"><td class="memItemLeft" align="right" valign="top"><a id="abbd337cf91a56a0f2359566ac40a9856"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#abbd337cf91a56a0f2359566ac40a9856">REG_GMAC_TSSN</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420009CCUL)</td></tr>
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<tr class="memdesc:abbd337cf91a56a0f2359566ac40a9856"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) 1588 Timer Sync Strobe Nanoseconds Register <br /></td></tr>
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<tr class="separator:abbd337cf91a56a0f2359566ac40a9856"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac9ade4b967cb517000f62370df3c6a25"><td class="memItemLeft" align="right" valign="top"><a id="ac9ade4b967cb517000f62370df3c6a25"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#ac9ade4b967cb517000f62370df3c6a25">REG_GMAC_TSL</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420009D0UL)</td></tr>
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<tr class="memdesc:ac9ade4b967cb517000f62370df3c6a25"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) 1588 Timer Seconds [31:0] Register <br /></td></tr>
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<tr class="separator:ac9ade4b967cb517000f62370df3c6a25"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aaebac8b7fb0c2dac73078c5604f36e3f"><td class="memItemLeft" align="right" valign="top"><a id="aaebac8b7fb0c2dac73078c5604f36e3f"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#aaebac8b7fb0c2dac73078c5604f36e3f">REG_GMAC_TN</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420009D4UL)</td></tr>
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<tr class="memdesc:aaebac8b7fb0c2dac73078c5604f36e3f"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) 1588 Timer Nanoseconds Register <br /></td></tr>
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<tr class="separator:aaebac8b7fb0c2dac73078c5604f36e3f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:acf4aa155328d0950dde92b151ee81c48"><td class="memItemLeft" align="right" valign="top"><a id="acf4aa155328d0950dde92b151ee81c48"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#acf4aa155328d0950dde92b151ee81c48">REG_GMAC_TA</a>   (*(<a class="el" href="same54n19a_8h.html#ac0f96d4e8018367b38f527007cf0eafd">WoReg</a> *)0x420009D8UL)</td></tr>
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<tr class="memdesc:acf4aa155328d0950dde92b151ee81c48"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) 1588 Timer Adjust Register <br /></td></tr>
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<tr class="separator:acf4aa155328d0950dde92b151ee81c48"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a301c5e7203f5d9f80f43b271b86d8c9b"><td class="memItemLeft" align="right" valign="top"><a id="a301c5e7203f5d9f80f43b271b86d8c9b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a301c5e7203f5d9f80f43b271b86d8c9b">REG_GMAC_TI</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x420009DCUL)</td></tr>
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<tr class="memdesc:a301c5e7203f5d9f80f43b271b86d8c9b"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) 1588 Timer Increment Register <br /></td></tr>
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<tr class="separator:a301c5e7203f5d9f80f43b271b86d8c9b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad9fbcc27622a7ede3bec91242f21c038"><td class="memItemLeft" align="right" valign="top"><a id="ad9fbcc27622a7ede3bec91242f21c038"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#ad9fbcc27622a7ede3bec91242f21c038">REG_GMAC_EFTSL</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x420009E0UL)</td></tr>
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<tr class="memdesc:ad9fbcc27622a7ede3bec91242f21c038"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) PTP Event Frame Transmitted Seconds Low Register <br /></td></tr>
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<tr class="separator:ad9fbcc27622a7ede3bec91242f21c038"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3f3ba094f4ae9ca9399aa7742ddfb9fe"><td class="memItemLeft" align="right" valign="top"><a id="a3f3ba094f4ae9ca9399aa7742ddfb9fe"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a3f3ba094f4ae9ca9399aa7742ddfb9fe">REG_GMAC_EFTN</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x420009E4UL)</td></tr>
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<tr class="memdesc:a3f3ba094f4ae9ca9399aa7742ddfb9fe"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) PTP Event Frame Transmitted Nanoseconds <br /></td></tr>
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<tr class="separator:a3f3ba094f4ae9ca9399aa7742ddfb9fe"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5334c0bbb550a7a145ac95709fa78b49"><td class="memItemLeft" align="right" valign="top"><a id="a5334c0bbb550a7a145ac95709fa78b49"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a5334c0bbb550a7a145ac95709fa78b49">REG_GMAC_EFRSL</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x420009E8UL)</td></tr>
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<tr class="memdesc:a5334c0bbb550a7a145ac95709fa78b49"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) PTP Event Frame Received Seconds Low Register <br /></td></tr>
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<tr class="separator:a5334c0bbb550a7a145ac95709fa78b49"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a157a58826c78eadec707ed3caac9bf92"><td class="memItemLeft" align="right" valign="top"><a id="a157a58826c78eadec707ed3caac9bf92"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a157a58826c78eadec707ed3caac9bf92">REG_GMAC_EFRN</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x420009ECUL)</td></tr>
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<tr class="memdesc:a157a58826c78eadec707ed3caac9bf92"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) PTP Event Frame Received Nanoseconds <br /></td></tr>
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<tr class="separator:a157a58826c78eadec707ed3caac9bf92"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ada374378c77cac6fbe3d8fadb6b3df6f"><td class="memItemLeft" align="right" valign="top"><a id="ada374378c77cac6fbe3d8fadb6b3df6f"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#ada374378c77cac6fbe3d8fadb6b3df6f">REG_GMAC_PEFTSL</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x420009F0UL)</td></tr>
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<tr class="memdesc:ada374378c77cac6fbe3d8fadb6b3df6f"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) PTP Peer Event Frame Transmitted Seconds Low Register <br /></td></tr>
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<tr class="separator:ada374378c77cac6fbe3d8fadb6b3df6f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af1b9189f9546b34142373575bdebb657"><td class="memItemLeft" align="right" valign="top"><a id="af1b9189f9546b34142373575bdebb657"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#af1b9189f9546b34142373575bdebb657">REG_GMAC_PEFTN</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x420009F4UL)</td></tr>
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<tr class="memdesc:af1b9189f9546b34142373575bdebb657"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) PTP Peer Event Frame Transmitted Nanoseconds <br /></td></tr>
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<tr class="separator:af1b9189f9546b34142373575bdebb657"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2367e144b3ef844456983dfb0e39a1f9"><td class="memItemLeft" align="right" valign="top"><a id="a2367e144b3ef844456983dfb0e39a1f9"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a2367e144b3ef844456983dfb0e39a1f9">REG_GMAC_PEFRSL</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x420009F8UL)</td></tr>
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<tr class="memdesc:a2367e144b3ef844456983dfb0e39a1f9"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) PTP Peer Event Frame Received Seconds Low Register <br /></td></tr>
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<tr class="separator:a2367e144b3ef844456983dfb0e39a1f9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0f2d19a8683e9970e91f44170dff2b4c"><td class="memItemLeft" align="right" valign="top"><a id="a0f2d19a8683e9970e91f44170dff2b4c"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a0f2d19a8683e9970e91f44170dff2b4c">REG_GMAC_PEFRN</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x420009FCUL)</td></tr>
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<tr class="memdesc:a0f2d19a8683e9970e91f44170dff2b4c"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) PTP Peer Event Frame Received Nanoseconds <br /></td></tr>
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<tr class="separator:a0f2d19a8683e9970e91f44170dff2b4c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad6466c36369537039d68e72212376ac2"><td class="memItemLeft" align="right" valign="top"><a id="ad6466c36369537039d68e72212376ac2"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#ad6466c36369537039d68e72212376ac2">REG_GMAC_RLPITR</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000A70UL)</td></tr>
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<tr class="memdesc:ad6466c36369537039d68e72212376ac2"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Receive LPI transition Register <br /></td></tr>
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<tr class="separator:ad6466c36369537039d68e72212376ac2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5b8a25687a352f21ea903de49fb475d1"><td class="memItemLeft" align="right" valign="top"><a id="a5b8a25687a352f21ea903de49fb475d1"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#a5b8a25687a352f21ea903de49fb475d1">REG_GMAC_RLPITI</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000A74UL)</td></tr>
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<tr class="memdesc:a5b8a25687a352f21ea903de49fb475d1"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Receive LPI Time Register <br /></td></tr>
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<tr class="separator:a5b8a25687a352f21ea903de49fb475d1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac9abe6b1cca592227f327dccbdbdcb6d"><td class="memItemLeft" align="right" valign="top"><a id="ac9abe6b1cca592227f327dccbdbdcb6d"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#ac9abe6b1cca592227f327dccbdbdcb6d">REG_GMAC_TLPITR</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000A78UL)</td></tr>
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<tr class="memdesc:ac9abe6b1cca592227f327dccbdbdcb6d"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Receive LPI transition Register <br /></td></tr>
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<tr class="separator:ac9abe6b1cca592227f327dccbdbdcb6d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ade7d1c9cc4aa6ccff2f4d537625aa414"><td class="memItemLeft" align="right" valign="top"><a id="ade7d1c9cc4aa6ccff2f4d537625aa414"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="instance_2gmac_8h.html#ade7d1c9cc4aa6ccff2f4d537625aa414">REG_GMAC_TLPITI</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x42000A7CUL)</td></tr>
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<tr class="memdesc:ade7d1c9cc4aa6ccff2f4d537625aa414"><td class="mdescLeft"> </td><td class="mdescRight">(GMAC) Receive LPI Time Register <br /></td></tr>
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<tr class="separator:ade7d1c9cc4aa6ccff2f4d537625aa414"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2bb2ff90133d43a28bd28f276c30d5fe"><td class="memItemLeft" align="right" valign="top"><a id="a2bb2ff90133d43a28bd28f276c30d5fe"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>GMAC_CLK_AHB_ID</b>   14</td></tr>
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<tr class="separator:a2bb2ff90133d43a28bd28f276c30d5fe"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
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<div class="textblock"><p>Instance description for GMAC. </p>
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<p>Copyright (c) 2019 Microchip Technology Inc.</p>
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<p>\asf_license_start </p>
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<p class="definition">Definition in file <a class="el" href="instance_2gmac_8h_source.html">gmac.h</a>.</p>
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</div></div><!-- contents -->
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