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<div class="title">osc32kctrl.h File Reference</div> </div>
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<div class="contents">
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<p>Component description for OSC32KCTRL.
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<a href="#details">More...</a></p>
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<p><a href="component_2osc32kctrl_8h_source.html">Go to the source code of this file.</a></p>
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Data Structures</h2></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionOSC32KCTRL__INTENCLR__Type.html">OSC32KCTRL_INTENCLR_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionOSC32KCTRL__INTENSET__Type.html">OSC32KCTRL_INTENSET_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionOSC32KCTRL__INTFLAG__Type.html">OSC32KCTRL_INTFLAG_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionOSC32KCTRL__STATUS__Type.html">OSC32KCTRL_STATUS_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionOSC32KCTRL__RTCCTRL__Type.html">OSC32KCTRL_RTCCTRL_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionOSC32KCTRL__XOSC32K__Type.html">OSC32KCTRL_XOSC32K_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionOSC32KCTRL__CFDCTRL__Type.html">OSC32KCTRL_CFDCTRL_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionOSC32KCTRL__EVCTRL__Type.html">OSC32KCTRL_EVCTRL_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionOSC32KCTRL__OSCULP32K__Type.html">OSC32KCTRL_OSCULP32K_Type</a></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="structOsc32kctrl.html">Osc32kctrl</a></td></tr>
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<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">OSC32KCTRL hardware registers. <a href="structOsc32kctrl.html#details">More...</a><br /></td></tr>
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<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
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Macros</h2></td></tr>
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<tr class="memitem:a763ba60933864b043eb6e970e4d61ae4"><td class="memItemLeft" align="right" valign="top"><a id="a763ba60933864b043eb6e970e4d61ae4"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_U2400</b></td></tr>
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<tr class="separator:a763ba60933864b043eb6e970e4d61ae4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4f74f492a5ffcfdf0f22aca1812e134c"><td class="memItemLeft" align="right" valign="top"><a id="a4f74f492a5ffcfdf0f22aca1812e134c"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>REV_OSC32KCTRL</b>   0x100</td></tr>
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<tr class="separator:a4f74f492a5ffcfdf0f22aca1812e134c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a22544563390854dfa7f044a4b83abb54"><td class="memItemLeft" align="right" valign="top"><a id="a22544563390854dfa7f044a4b83abb54"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a22544563390854dfa7f044a4b83abb54">OSC32KCTRL_INTENCLR_OFFSET</a>   0x00</td></tr>
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<tr class="memdesc:a22544563390854dfa7f044a4b83abb54"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_INTENCLR offset) Interrupt Enable Clear <br /></td></tr>
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<tr class="separator:a22544563390854dfa7f044a4b83abb54"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad3aafd31e91ecf11f10d847aca17c178"><td class="memItemLeft" align="right" valign="top"><a id="ad3aafd31e91ecf11f10d847aca17c178"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#ad3aafd31e91ecf11f10d847aca17c178">OSC32KCTRL_INTENCLR_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
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<tr class="memdesc:ad3aafd31e91ecf11f10d847aca17c178"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_INTENCLR reset_value) Interrupt Enable Clear <br /></td></tr>
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<tr class="separator:ad3aafd31e91ecf11f10d847aca17c178"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac526cada7174d6b98a29d5f0cf44ae97"><td class="memItemLeft" align="right" valign="top"><a id="ac526cada7174d6b98a29d5f0cf44ae97"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#ac526cada7174d6b98a29d5f0cf44ae97">OSC32KCTRL_INTENCLR_XOSC32KRDY_Pos</a>   0</td></tr>
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<tr class="memdesc:ac526cada7174d6b98a29d5f0cf44ae97"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_INTENCLR) XOSC32K Ready Interrupt Enable <br /></td></tr>
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<tr class="separator:ac526cada7174d6b98a29d5f0cf44ae97"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9ff2e92e80971d5c85b058c13c3a72d8"><td class="memItemLeft" align="right" valign="top"><a id="a9ff2e92e80971d5c85b058c13c3a72d8"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_INTENCLR_XOSC32KRDY</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2osc32kctrl_8h.html#ac526cada7174d6b98a29d5f0cf44ae97">OSC32KCTRL_INTENCLR_XOSC32KRDY_Pos</a>)</td></tr>
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<tr class="separator:a9ff2e92e80971d5c85b058c13c3a72d8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af25e6f5cc19d74258a0272cab04cc74e"><td class="memItemLeft" align="right" valign="top"><a id="af25e6f5cc19d74258a0272cab04cc74e"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#af25e6f5cc19d74258a0272cab04cc74e">OSC32KCTRL_INTENCLR_XOSC32KFAIL_Pos</a>   2</td></tr>
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<tr class="memdesc:af25e6f5cc19d74258a0272cab04cc74e"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_INTENCLR) XOSC32K Clock Failure Detector Interrupt Enable <br /></td></tr>
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<tr class="separator:af25e6f5cc19d74258a0272cab04cc74e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9b04b9b6d57110689f93d44723739711"><td class="memItemLeft" align="right" valign="top"><a id="a9b04b9b6d57110689f93d44723739711"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_INTENCLR_XOSC32KFAIL</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2osc32kctrl_8h.html#af25e6f5cc19d74258a0272cab04cc74e">OSC32KCTRL_INTENCLR_XOSC32KFAIL_Pos</a>)</td></tr>
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<tr class="separator:a9b04b9b6d57110689f93d44723739711"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a753f913b2693500c8b4c878c5ed1e60a"><td class="memItemLeft" align="right" valign="top"><a id="a753f913b2693500c8b4c878c5ed1e60a"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a753f913b2693500c8b4c878c5ed1e60a">OSC32KCTRL_INTENCLR_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000005)</td></tr>
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<tr class="memdesc:a753f913b2693500c8b4c878c5ed1e60a"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_INTENCLR) MASK Register <br /></td></tr>
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<tr class="separator:a753f913b2693500c8b4c878c5ed1e60a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:acd0c571999e2292d247edb6c3226bc6a"><td class="memItemLeft" align="right" valign="top"><a id="acd0c571999e2292d247edb6c3226bc6a"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#acd0c571999e2292d247edb6c3226bc6a">OSC32KCTRL_INTENSET_OFFSET</a>   0x04</td></tr>
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<tr class="memdesc:acd0c571999e2292d247edb6c3226bc6a"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_INTENSET offset) Interrupt Enable Set <br /></td></tr>
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<tr class="separator:acd0c571999e2292d247edb6c3226bc6a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a50b1ca7855eb0e99ad3619bb83f08d14"><td class="memItemLeft" align="right" valign="top"><a id="a50b1ca7855eb0e99ad3619bb83f08d14"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a50b1ca7855eb0e99ad3619bb83f08d14">OSC32KCTRL_INTENSET_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
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<tr class="memdesc:a50b1ca7855eb0e99ad3619bb83f08d14"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_INTENSET reset_value) Interrupt Enable Set <br /></td></tr>
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<tr class="separator:a50b1ca7855eb0e99ad3619bb83f08d14"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:af952ca2a3c0659258f67df4af0455662"><td class="memItemLeft" align="right" valign="top"><a id="af952ca2a3c0659258f67df4af0455662"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#af952ca2a3c0659258f67df4af0455662">OSC32KCTRL_INTENSET_XOSC32KRDY_Pos</a>   0</td></tr>
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<tr class="memdesc:af952ca2a3c0659258f67df4af0455662"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_INTENSET) XOSC32K Ready Interrupt Enable <br /></td></tr>
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<tr class="separator:af952ca2a3c0659258f67df4af0455662"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab6791e6053589baa831f510e92f28557"><td class="memItemLeft" align="right" valign="top"><a id="ab6791e6053589baa831f510e92f28557"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_INTENSET_XOSC32KRDY</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2osc32kctrl_8h.html#af952ca2a3c0659258f67df4af0455662">OSC32KCTRL_INTENSET_XOSC32KRDY_Pos</a>)</td></tr>
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<tr class="separator:ab6791e6053589baa831f510e92f28557"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7ebf60f93ae5934bdb16757b89c65663"><td class="memItemLeft" align="right" valign="top"><a id="a7ebf60f93ae5934bdb16757b89c65663"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a7ebf60f93ae5934bdb16757b89c65663">OSC32KCTRL_INTENSET_XOSC32KFAIL_Pos</a>   2</td></tr>
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<tr class="memdesc:a7ebf60f93ae5934bdb16757b89c65663"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_INTENSET) XOSC32K Clock Failure Detector Interrupt Enable <br /></td></tr>
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<tr class="separator:a7ebf60f93ae5934bdb16757b89c65663"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a6837cf93594b6569aa5c9c42c1f77f14"><td class="memItemLeft" align="right" valign="top"><a id="a6837cf93594b6569aa5c9c42c1f77f14"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_INTENSET_XOSC32KFAIL</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2osc32kctrl_8h.html#a7ebf60f93ae5934bdb16757b89c65663">OSC32KCTRL_INTENSET_XOSC32KFAIL_Pos</a>)</td></tr>
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<tr class="separator:a6837cf93594b6569aa5c9c42c1f77f14"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:affc01dd3bc722708c644175127d73070"><td class="memItemLeft" align="right" valign="top"><a id="affc01dd3bc722708c644175127d73070"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#affc01dd3bc722708c644175127d73070">OSC32KCTRL_INTENSET_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000005)</td></tr>
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<tr class="memdesc:affc01dd3bc722708c644175127d73070"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_INTENSET) MASK Register <br /></td></tr>
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<tr class="separator:affc01dd3bc722708c644175127d73070"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aec77fa56678a12082b0db8a754fa1750"><td class="memItemLeft" align="right" valign="top"><a id="aec77fa56678a12082b0db8a754fa1750"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#aec77fa56678a12082b0db8a754fa1750">OSC32KCTRL_INTFLAG_OFFSET</a>   0x08</td></tr>
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<tr class="memdesc:aec77fa56678a12082b0db8a754fa1750"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_INTFLAG offset) Interrupt Flag Status and Clear <br /></td></tr>
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<tr class="separator:aec77fa56678a12082b0db8a754fa1750"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a29a58edeb42ff385598a3005004dddf0"><td class="memItemLeft" align="right" valign="top"><a id="a29a58edeb42ff385598a3005004dddf0"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a29a58edeb42ff385598a3005004dddf0">OSC32KCTRL_INTFLAG_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
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<tr class="memdesc:a29a58edeb42ff385598a3005004dddf0"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_INTFLAG reset_value) Interrupt Flag Status and Clear <br /></td></tr>
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<tr class="separator:a29a58edeb42ff385598a3005004dddf0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a85c2db168fc2fe2f24f7d01f57721a86"><td class="memItemLeft" align="right" valign="top"><a id="a85c2db168fc2fe2f24f7d01f57721a86"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a85c2db168fc2fe2f24f7d01f57721a86">OSC32KCTRL_INTFLAG_XOSC32KRDY_Pos</a>   0</td></tr>
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<tr class="memdesc:a85c2db168fc2fe2f24f7d01f57721a86"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_INTFLAG) XOSC32K Ready <br /></td></tr>
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<tr class="separator:a85c2db168fc2fe2f24f7d01f57721a86"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a928db90e1b2498fad008f00b1f14567d"><td class="memItemLeft" align="right" valign="top"><a id="a928db90e1b2498fad008f00b1f14567d"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_INTFLAG_XOSC32KRDY</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2osc32kctrl_8h.html#a85c2db168fc2fe2f24f7d01f57721a86">OSC32KCTRL_INTFLAG_XOSC32KRDY_Pos</a>)</td></tr>
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<tr class="separator:a928db90e1b2498fad008f00b1f14567d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ac64beded2c373e26b4afc3145c5913de"><td class="memItemLeft" align="right" valign="top"><a id="ac64beded2c373e26b4afc3145c5913de"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#ac64beded2c373e26b4afc3145c5913de">OSC32KCTRL_INTFLAG_XOSC32KFAIL_Pos</a>   2</td></tr>
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<tr class="memdesc:ac64beded2c373e26b4afc3145c5913de"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_INTFLAG) XOSC32K Clock Failure Detector <br /></td></tr>
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<tr class="separator:ac64beded2c373e26b4afc3145c5913de"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8a998695b05d55b68b4e1eb3b999e61e"><td class="memItemLeft" align="right" valign="top"><a id="a8a998695b05d55b68b4e1eb3b999e61e"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_INTFLAG_XOSC32KFAIL</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2osc32kctrl_8h.html#ac64beded2c373e26b4afc3145c5913de">OSC32KCTRL_INTFLAG_XOSC32KFAIL_Pos</a>)</td></tr>
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<tr class="separator:a8a998695b05d55b68b4e1eb3b999e61e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7265e7d7ad5a14c6c1c13035721290c2"><td class="memItemLeft" align="right" valign="top"><a id="a7265e7d7ad5a14c6c1c13035721290c2"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a7265e7d7ad5a14c6c1c13035721290c2">OSC32KCTRL_INTFLAG_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000005)</td></tr>
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<tr class="memdesc:a7265e7d7ad5a14c6c1c13035721290c2"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_INTFLAG) MASK Register <br /></td></tr>
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<tr class="separator:a7265e7d7ad5a14c6c1c13035721290c2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aac54085818ba483d7ee48d673dee16a4"><td class="memItemLeft" align="right" valign="top"><a id="aac54085818ba483d7ee48d673dee16a4"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#aac54085818ba483d7ee48d673dee16a4">OSC32KCTRL_STATUS_OFFSET</a>   0x0C</td></tr>
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<tr class="memdesc:aac54085818ba483d7ee48d673dee16a4"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_STATUS offset) Power and Clocks Status <br /></td></tr>
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<tr class="separator:aac54085818ba483d7ee48d673dee16a4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9e2afc754dc43d2728983182cadff4f1"><td class="memItemLeft" align="right" valign="top"><a id="a9e2afc754dc43d2728983182cadff4f1"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a9e2afc754dc43d2728983182cadff4f1">OSC32KCTRL_STATUS_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
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<tr class="memdesc:a9e2afc754dc43d2728983182cadff4f1"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_STATUS reset_value) Power and Clocks Status <br /></td></tr>
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<tr class="separator:a9e2afc754dc43d2728983182cadff4f1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa403dd126839f064ae0c834d2bd63477"><td class="memItemLeft" align="right" valign="top"><a id="aa403dd126839f064ae0c834d2bd63477"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#aa403dd126839f064ae0c834d2bd63477">OSC32KCTRL_STATUS_XOSC32KRDY_Pos</a>   0</td></tr>
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<tr class="memdesc:aa403dd126839f064ae0c834d2bd63477"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_STATUS) XOSC32K Ready <br /></td></tr>
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<tr class="separator:aa403dd126839f064ae0c834d2bd63477"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afc8fd494fedc012db5a796e6946346b8"><td class="memItemLeft" align="right" valign="top"><a id="afc8fd494fedc012db5a796e6946346b8"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_STATUS_XOSC32KRDY</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2osc32kctrl_8h.html#aa403dd126839f064ae0c834d2bd63477">OSC32KCTRL_STATUS_XOSC32KRDY_Pos</a>)</td></tr>
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<tr class="separator:afc8fd494fedc012db5a796e6946346b8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aaa40c13030939e6facaf0e5e61977ceb"><td class="memItemLeft" align="right" valign="top"><a id="aaa40c13030939e6facaf0e5e61977ceb"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#aaa40c13030939e6facaf0e5e61977ceb">OSC32KCTRL_STATUS_XOSC32KFAIL_Pos</a>   2</td></tr>
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<tr class="memdesc:aaa40c13030939e6facaf0e5e61977ceb"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_STATUS) XOSC32K Clock Failure Detector <br /></td></tr>
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<tr class="separator:aaa40c13030939e6facaf0e5e61977ceb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a45b7d349910ca1672a76fd009e998c5f"><td class="memItemLeft" align="right" valign="top"><a id="a45b7d349910ca1672a76fd009e998c5f"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_STATUS_XOSC32KFAIL</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2osc32kctrl_8h.html#aaa40c13030939e6facaf0e5e61977ceb">OSC32KCTRL_STATUS_XOSC32KFAIL_Pos</a>)</td></tr>
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<tr class="separator:a45b7d349910ca1672a76fd009e998c5f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a747587aa6615db76b74bf6f40ecd6f78"><td class="memItemLeft" align="right" valign="top"><a id="a747587aa6615db76b74bf6f40ecd6f78"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a747587aa6615db76b74bf6f40ecd6f78">OSC32KCTRL_STATUS_XOSC32KSW_Pos</a>   3</td></tr>
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<tr class="memdesc:a747587aa6615db76b74bf6f40ecd6f78"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_STATUS) XOSC32K Clock switch <br /></td></tr>
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<tr class="separator:a747587aa6615db76b74bf6f40ecd6f78"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab4c5a18dcba0868f64223e7efd636729"><td class="memItemLeft" align="right" valign="top"><a id="ab4c5a18dcba0868f64223e7efd636729"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_STATUS_XOSC32KSW</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2osc32kctrl_8h.html#a747587aa6615db76b74bf6f40ecd6f78">OSC32KCTRL_STATUS_XOSC32KSW_Pos</a>)</td></tr>
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<tr class="separator:ab4c5a18dcba0868f64223e7efd636729"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1951a838cab5c017c20ba51dcea40224"><td class="memItemLeft" align="right" valign="top"><a id="a1951a838cab5c017c20ba51dcea40224"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a1951a838cab5c017c20ba51dcea40224">OSC32KCTRL_STATUS_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0000000D)</td></tr>
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<tr class="memdesc:a1951a838cab5c017c20ba51dcea40224"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_STATUS) MASK Register <br /></td></tr>
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<tr class="separator:a1951a838cab5c017c20ba51dcea40224"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa2ebbecf02c02fa55aa17bb3f0099fbf"><td class="memItemLeft" align="right" valign="top"><a id="aa2ebbecf02c02fa55aa17bb3f0099fbf"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#aa2ebbecf02c02fa55aa17bb3f0099fbf">OSC32KCTRL_RTCCTRL_OFFSET</a>   0x10</td></tr>
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<tr class="memdesc:aa2ebbecf02c02fa55aa17bb3f0099fbf"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_RTCCTRL offset) RTC Clock Selection <br /></td></tr>
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<tr class="separator:aa2ebbecf02c02fa55aa17bb3f0099fbf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a7d97c06430481f93acb8a0290e2dad80"><td class="memItemLeft" align="right" valign="top"><a id="a7d97c06430481f93acb8a0290e2dad80"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a7d97c06430481f93acb8a0290e2dad80">OSC32KCTRL_RTCCTRL_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
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<tr class="memdesc:a7d97c06430481f93acb8a0290e2dad80"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_RTCCTRL reset_value) RTC Clock Selection <br /></td></tr>
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<tr class="separator:a7d97c06430481f93acb8a0290e2dad80"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:adcfbd528df699f49aa94aed33cfa1324"><td class="memItemLeft" align="right" valign="top"><a id="adcfbd528df699f49aa94aed33cfa1324"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#adcfbd528df699f49aa94aed33cfa1324">OSC32KCTRL_RTCCTRL_RTCSEL_Pos</a>   0</td></tr>
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<tr class="memdesc:adcfbd528df699f49aa94aed33cfa1324"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_RTCCTRL) RTC Clock Selection <br /></td></tr>
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<tr class="separator:adcfbd528df699f49aa94aed33cfa1324"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a592f890037599de9333c6be135f04c51"><td class="memItemLeft" align="right" valign="top"><a id="a592f890037599de9333c6be135f04c51"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_RTCCTRL_RTCSEL_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7) << <a class="el" href="component_2osc32kctrl_8h.html#adcfbd528df699f49aa94aed33cfa1324">OSC32KCTRL_RTCCTRL_RTCSEL_Pos</a>)</td></tr>
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<tr class="separator:a592f890037599de9333c6be135f04c51"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a9c5410c5a3c5f72873b82a08fddfa6d1"><td class="memItemLeft" align="right" valign="top"><a id="a9c5410c5a3c5f72873b82a08fddfa6d1"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_RTCCTRL_RTCSEL</b>(value)   (OSC32KCTRL_RTCCTRL_RTCSEL_Msk & ((value) << <a class="el" href="component_2osc32kctrl_8h.html#adcfbd528df699f49aa94aed33cfa1324">OSC32KCTRL_RTCCTRL_RTCSEL_Pos</a>))</td></tr>
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<tr class="separator:a9c5410c5a3c5f72873b82a08fddfa6d1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abc6a6db1dfeac26e74f33b4afd4a1252"><td class="memItemLeft" align="right" valign="top"><a id="abc6a6db1dfeac26e74f33b4afd4a1252"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#abc6a6db1dfeac26e74f33b4afd4a1252">OSC32KCTRL_RTCCTRL_RTCSEL_ULP1K_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
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<tr class="memdesc:abc6a6db1dfeac26e74f33b4afd4a1252"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_RTCCTRL) 1.024kHz from 32kHz internal ULP oscillator <br /></td></tr>
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<tr class="separator:abc6a6db1dfeac26e74f33b4afd4a1252"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae97e1489ab8d1f1a49d8e7e2ad8b7427"><td class="memItemLeft" align="right" valign="top"><a id="ae97e1489ab8d1f1a49d8e7e2ad8b7427"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#ae97e1489ab8d1f1a49d8e7e2ad8b7427">OSC32KCTRL_RTCCTRL_RTCSEL_ULP32K_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
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<tr class="memdesc:ae97e1489ab8d1f1a49d8e7e2ad8b7427"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_RTCCTRL) 32.768kHz from 32kHz internal ULP oscillator <br /></td></tr>
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<tr class="separator:ae97e1489ab8d1f1a49d8e7e2ad8b7427"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a14454b0efb7d20c1a14a46ebc86ff167"><td class="memItemLeft" align="right" valign="top"><a id="a14454b0efb7d20c1a14a46ebc86ff167"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a14454b0efb7d20c1a14a46ebc86ff167">OSC32KCTRL_RTCCTRL_RTCSEL_XOSC1K_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x4)</td></tr>
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<tr class="memdesc:a14454b0efb7d20c1a14a46ebc86ff167"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_RTCCTRL) 1.024kHz from 32.768kHz internal oscillator <br /></td></tr>
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<tr class="separator:a14454b0efb7d20c1a14a46ebc86ff167"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3a4fae30686693a728ec790fa0bde8e6"><td class="memItemLeft" align="right" valign="top"><a id="a3a4fae30686693a728ec790fa0bde8e6"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a3a4fae30686693a728ec790fa0bde8e6">OSC32KCTRL_RTCCTRL_RTCSEL_XOSC32K_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x5)</td></tr>
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<tr class="memdesc:a3a4fae30686693a728ec790fa0bde8e6"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_RTCCTRL) 32.768kHz from 32.768kHz external crystal oscillator <br /></td></tr>
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<tr class="separator:a3a4fae30686693a728ec790fa0bde8e6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:afafab9c8c609b5fed9d2e316ac79fbd2"><td class="memItemLeft" align="right" valign="top"><a id="afafab9c8c609b5fed9d2e316ac79fbd2"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_RTCCTRL_RTCSEL_ULP1K</b>   (<a class="el" href="component_2osc32kctrl_8h.html#abc6a6db1dfeac26e74f33b4afd4a1252">OSC32KCTRL_RTCCTRL_RTCSEL_ULP1K_Val</a> << <a class="el" href="component_2osc32kctrl_8h.html#adcfbd528df699f49aa94aed33cfa1324">OSC32KCTRL_RTCCTRL_RTCSEL_Pos</a>)</td></tr>
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<tr class="separator:afafab9c8c609b5fed9d2e316ac79fbd2"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1030b2391e420452e82cc099bca18108"><td class="memItemLeft" align="right" valign="top"><a id="a1030b2391e420452e82cc099bca18108"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_RTCCTRL_RTCSEL_ULP32K</b>   (<a class="el" href="component_2osc32kctrl_8h.html#ae97e1489ab8d1f1a49d8e7e2ad8b7427">OSC32KCTRL_RTCCTRL_RTCSEL_ULP32K_Val</a> << <a class="el" href="component_2osc32kctrl_8h.html#adcfbd528df699f49aa94aed33cfa1324">OSC32KCTRL_RTCCTRL_RTCSEL_Pos</a>)</td></tr>
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<tr class="separator:a1030b2391e420452e82cc099bca18108"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a082a70fa1afabc485d1e05603757581a"><td class="memItemLeft" align="right" valign="top"><a id="a082a70fa1afabc485d1e05603757581a"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_RTCCTRL_RTCSEL_XOSC1K</b>   (<a class="el" href="component_2osc32kctrl_8h.html#a14454b0efb7d20c1a14a46ebc86ff167">OSC32KCTRL_RTCCTRL_RTCSEL_XOSC1K_Val</a> << <a class="el" href="component_2osc32kctrl_8h.html#adcfbd528df699f49aa94aed33cfa1324">OSC32KCTRL_RTCCTRL_RTCSEL_Pos</a>)</td></tr>
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<tr class="separator:a082a70fa1afabc485d1e05603757581a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aab04e1f8b1bd6a65de6ca3c58c945a4a"><td class="memItemLeft" align="right" valign="top"><a id="aab04e1f8b1bd6a65de6ca3c58c945a4a"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_RTCCTRL_RTCSEL_XOSC32K</b>   (<a class="el" href="component_2osc32kctrl_8h.html#a3a4fae30686693a728ec790fa0bde8e6">OSC32KCTRL_RTCCTRL_RTCSEL_XOSC32K_Val</a> << <a class="el" href="component_2osc32kctrl_8h.html#adcfbd528df699f49aa94aed33cfa1324">OSC32KCTRL_RTCCTRL_RTCSEL_Pos</a>)</td></tr>
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<tr class="separator:aab04e1f8b1bd6a65de6ca3c58c945a4a"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa679222a2941c8283211ffdc4f5a7899"><td class="memItemLeft" align="right" valign="top"><a id="aa679222a2941c8283211ffdc4f5a7899"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#aa679222a2941c8283211ffdc4f5a7899">OSC32KCTRL_RTCCTRL_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x07)</td></tr>
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<tr class="memdesc:aa679222a2941c8283211ffdc4f5a7899"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_RTCCTRL) MASK Register <br /></td></tr>
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<tr class="separator:aa679222a2941c8283211ffdc4f5a7899"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4c8965d920445c75c0c2c3ef28b2a642"><td class="memItemLeft" align="right" valign="top"><a id="a4c8965d920445c75c0c2c3ef28b2a642"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a4c8965d920445c75c0c2c3ef28b2a642">OSC32KCTRL_XOSC32K_OFFSET</a>   0x14</td></tr>
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<tr class="memdesc:a4c8965d920445c75c0c2c3ef28b2a642"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_XOSC32K offset) 32kHz External Crystal Oscillator (XOSC32K) Control <br /></td></tr>
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<tr class="separator:a4c8965d920445c75c0c2c3ef28b2a642"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a387f876de09ea1649ef2298d27e83c00"><td class="memItemLeft" align="right" valign="top"><a id="a387f876de09ea1649ef2298d27e83c00"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a387f876de09ea1649ef2298d27e83c00">OSC32KCTRL_XOSC32K_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2080)</td></tr>
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<tr class="memdesc:a387f876de09ea1649ef2298d27e83c00"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_XOSC32K reset_value) 32kHz External Crystal Oscillator (XOSC32K) Control <br /></td></tr>
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<tr class="separator:a387f876de09ea1649ef2298d27e83c00"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0d7122ed419157c43c7c76da24469f6e"><td class="memItemLeft" align="right" valign="top"><a id="a0d7122ed419157c43c7c76da24469f6e"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a0d7122ed419157c43c7c76da24469f6e">OSC32KCTRL_XOSC32K_ENABLE_Pos</a>   1</td></tr>
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<tr class="memdesc:a0d7122ed419157c43c7c76da24469f6e"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_XOSC32K) Oscillator Enable <br /></td></tr>
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<tr class="separator:a0d7122ed419157c43c7c76da24469f6e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a32d877d8a016b0277e09268656487204"><td class="memItemLeft" align="right" valign="top"><a id="a32d877d8a016b0277e09268656487204"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_XOSC32K_ENABLE</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2osc32kctrl_8h.html#a0d7122ed419157c43c7c76da24469f6e">OSC32KCTRL_XOSC32K_ENABLE_Pos</a>)</td></tr>
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<tr class="separator:a32d877d8a016b0277e09268656487204"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aab290b9fde2ce0432bd019281585e60c"><td class="memItemLeft" align="right" valign="top"><a id="aab290b9fde2ce0432bd019281585e60c"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#aab290b9fde2ce0432bd019281585e60c">OSC32KCTRL_XOSC32K_XTALEN_Pos</a>   2</td></tr>
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<tr class="memdesc:aab290b9fde2ce0432bd019281585e60c"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_XOSC32K) Crystal Oscillator Enable <br /></td></tr>
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<tr class="separator:aab290b9fde2ce0432bd019281585e60c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad2de3df4aa5f28ed5aa7aa3dd10f8233"><td class="memItemLeft" align="right" valign="top"><a id="ad2de3df4aa5f28ed5aa7aa3dd10f8233"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_XOSC32K_XTALEN</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2osc32kctrl_8h.html#aab290b9fde2ce0432bd019281585e60c">OSC32KCTRL_XOSC32K_XTALEN_Pos</a>)</td></tr>
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<tr class="separator:ad2de3df4aa5f28ed5aa7aa3dd10f8233"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a746636fe077be073185aec9422a5c7a6"><td class="memItemLeft" align="right" valign="top"><a id="a746636fe077be073185aec9422a5c7a6"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a746636fe077be073185aec9422a5c7a6">OSC32KCTRL_XOSC32K_EN32K_Pos</a>   3</td></tr>
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<tr class="memdesc:a746636fe077be073185aec9422a5c7a6"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_XOSC32K) 32kHz Output Enable <br /></td></tr>
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<tr class="separator:a746636fe077be073185aec9422a5c7a6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1fa80f6c89dded8bc827e016e37a9ae8"><td class="memItemLeft" align="right" valign="top"><a id="a1fa80f6c89dded8bc827e016e37a9ae8"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_XOSC32K_EN32K</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2osc32kctrl_8h.html#a746636fe077be073185aec9422a5c7a6">OSC32KCTRL_XOSC32K_EN32K_Pos</a>)</td></tr>
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<tr class="separator:a1fa80f6c89dded8bc827e016e37a9ae8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ade7145443f1f0bbd5705dce47e2e990e"><td class="memItemLeft" align="right" valign="top"><a id="ade7145443f1f0bbd5705dce47e2e990e"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#ade7145443f1f0bbd5705dce47e2e990e">OSC32KCTRL_XOSC32K_EN1K_Pos</a>   4</td></tr>
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<tr class="memdesc:ade7145443f1f0bbd5705dce47e2e990e"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_XOSC32K) 1kHz Output Enable <br /></td></tr>
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<tr class="separator:ade7145443f1f0bbd5705dce47e2e990e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a76147ae9ecde38088720cf375ffc25c5"><td class="memItemLeft" align="right" valign="top"><a id="a76147ae9ecde38088720cf375ffc25c5"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_XOSC32K_EN1K</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2osc32kctrl_8h.html#ade7145443f1f0bbd5705dce47e2e990e">OSC32KCTRL_XOSC32K_EN1K_Pos</a>)</td></tr>
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<tr class="separator:a76147ae9ecde38088720cf375ffc25c5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aab719702395f394c3f8ab2a0862e3c62"><td class="memItemLeft" align="right" valign="top"><a id="aab719702395f394c3f8ab2a0862e3c62"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#aab719702395f394c3f8ab2a0862e3c62">OSC32KCTRL_XOSC32K_RUNSTDBY_Pos</a>   6</td></tr>
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<tr class="memdesc:aab719702395f394c3f8ab2a0862e3c62"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_XOSC32K) Run in Standby <br /></td></tr>
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<tr class="separator:aab719702395f394c3f8ab2a0862e3c62"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8651bb51b712bcdeeed8dfce3edb1701"><td class="memItemLeft" align="right" valign="top"><a id="a8651bb51b712bcdeeed8dfce3edb1701"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_XOSC32K_RUNSTDBY</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2osc32kctrl_8h.html#aab719702395f394c3f8ab2a0862e3c62">OSC32KCTRL_XOSC32K_RUNSTDBY_Pos</a>)</td></tr>
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<tr class="separator:a8651bb51b712bcdeeed8dfce3edb1701"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3f72f0a3fe37daf64ad90aa1041cc747"><td class="memItemLeft" align="right" valign="top"><a id="a3f72f0a3fe37daf64ad90aa1041cc747"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a3f72f0a3fe37daf64ad90aa1041cc747">OSC32KCTRL_XOSC32K_ONDEMAND_Pos</a>   7</td></tr>
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<tr class="memdesc:a3f72f0a3fe37daf64ad90aa1041cc747"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_XOSC32K) On Demand Control <br /></td></tr>
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<tr class="separator:a3f72f0a3fe37daf64ad90aa1041cc747"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a85cbdca51f42273bf6312a20699e2ebd"><td class="memItemLeft" align="right" valign="top"><a id="a85cbdca51f42273bf6312a20699e2ebd"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_XOSC32K_ONDEMAND</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2osc32kctrl_8h.html#a3f72f0a3fe37daf64ad90aa1041cc747">OSC32KCTRL_XOSC32K_ONDEMAND_Pos</a>)</td></tr>
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<tr class="separator:a85cbdca51f42273bf6312a20699e2ebd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ace3a98c58164bac82b192e5c04bbc4f8"><td class="memItemLeft" align="right" valign="top"><a id="ace3a98c58164bac82b192e5c04bbc4f8"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#ace3a98c58164bac82b192e5c04bbc4f8">OSC32KCTRL_XOSC32K_STARTUP_Pos</a>   8</td></tr>
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<tr class="memdesc:ace3a98c58164bac82b192e5c04bbc4f8"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_XOSC32K) Oscillator Start-Up Time <br /></td></tr>
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<tr class="separator:ace3a98c58164bac82b192e5c04bbc4f8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a135006047a837d0c00f6eeb490d67989"><td class="memItemLeft" align="right" valign="top"><a id="a135006047a837d0c00f6eeb490d67989"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_XOSC32K_STARTUP_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7) << <a class="el" href="component_2osc32kctrl_8h.html#ace3a98c58164bac82b192e5c04bbc4f8">OSC32KCTRL_XOSC32K_STARTUP_Pos</a>)</td></tr>
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<tr class="separator:a135006047a837d0c00f6eeb490d67989"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5c7441085cbe7e77a0a117eb7080e9aa"><td class="memItemLeft" align="right" valign="top"><a id="a5c7441085cbe7e77a0a117eb7080e9aa"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_XOSC32K_STARTUP</b>(value)   (OSC32KCTRL_XOSC32K_STARTUP_Msk & ((value) << <a class="el" href="component_2osc32kctrl_8h.html#ace3a98c58164bac82b192e5c04bbc4f8">OSC32KCTRL_XOSC32K_STARTUP_Pos</a>))</td></tr>
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<tr class="separator:a5c7441085cbe7e77a0a117eb7080e9aa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aac0d0821539272a535011934da425e8b"><td class="memItemLeft" align="right" valign="top"><a id="aac0d0821539272a535011934da425e8b"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#aac0d0821539272a535011934da425e8b">OSC32KCTRL_XOSC32K_WRTLOCK_Pos</a>   12</td></tr>
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<tr class="memdesc:aac0d0821539272a535011934da425e8b"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_XOSC32K) Write Lock <br /></td></tr>
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<tr class="separator:aac0d0821539272a535011934da425e8b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5e3d4392d4bac19edc5ea0a1362f2414"><td class="memItemLeft" align="right" valign="top"><a id="a5e3d4392d4bac19edc5ea0a1362f2414"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_XOSC32K_WRTLOCK</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2osc32kctrl_8h.html#aac0d0821539272a535011934da425e8b">OSC32KCTRL_XOSC32K_WRTLOCK_Pos</a>)</td></tr>
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<tr class="separator:a5e3d4392d4bac19edc5ea0a1362f2414"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2951861a2035901bcd3f214e894a1a5e"><td class="memItemLeft" align="right" valign="top"><a id="a2951861a2035901bcd3f214e894a1a5e"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a2951861a2035901bcd3f214e894a1a5e">OSC32KCTRL_XOSC32K_CGM_Pos</a>   13</td></tr>
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<tr class="memdesc:a2951861a2035901bcd3f214e894a1a5e"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_XOSC32K) Control Gain Mode <br /></td></tr>
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<tr class="separator:a2951861a2035901bcd3f214e894a1a5e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2143a1e277d9787754f776c76df930a1"><td class="memItemLeft" align="right" valign="top"><a id="a2143a1e277d9787754f776c76df930a1"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_XOSC32K_CGM_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2osc32kctrl_8h.html#a2951861a2035901bcd3f214e894a1a5e">OSC32KCTRL_XOSC32K_CGM_Pos</a>)</td></tr>
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<tr class="separator:a2143a1e277d9787754f776c76df930a1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3ca66f28519aa5c4487227575f090119"><td class="memItemLeft" align="right" valign="top"><a id="a3ca66f28519aa5c4487227575f090119"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_XOSC32K_CGM</b>(value)   (OSC32KCTRL_XOSC32K_CGM_Msk & ((value) << <a class="el" href="component_2osc32kctrl_8h.html#a2951861a2035901bcd3f214e894a1a5e">OSC32KCTRL_XOSC32K_CGM_Pos</a>))</td></tr>
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<tr class="separator:a3ca66f28519aa5c4487227575f090119"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a13a89e5964df1c5525050900094eda55"><td class="memItemLeft" align="right" valign="top"><a id="a13a89e5964df1c5525050900094eda55"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a13a89e5964df1c5525050900094eda55">OSC32KCTRL_XOSC32K_CGM_XT_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
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<tr class="memdesc:a13a89e5964df1c5525050900094eda55"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_XOSC32K) Standard mode <br /></td></tr>
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<tr class="separator:a13a89e5964df1c5525050900094eda55"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a5861dda7b93a256f983a20230827df31"><td class="memItemLeft" align="right" valign="top"><a id="a5861dda7b93a256f983a20230827df31"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a5861dda7b93a256f983a20230827df31">OSC32KCTRL_XOSC32K_CGM_HS_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
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<tr class="memdesc:a5861dda7b93a256f983a20230827df31"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_XOSC32K) High Speed mode <br /></td></tr>
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<tr class="separator:a5861dda7b93a256f983a20230827df31"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a846ad0c322bd22687331a3fb6f6c9ea8"><td class="memItemLeft" align="right" valign="top"><a id="a846ad0c322bd22687331a3fb6f6c9ea8"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_XOSC32K_CGM_XT</b>   (<a class="el" href="component_2osc32kctrl_8h.html#a13a89e5964df1c5525050900094eda55">OSC32KCTRL_XOSC32K_CGM_XT_Val</a> << <a class="el" href="component_2osc32kctrl_8h.html#a2951861a2035901bcd3f214e894a1a5e">OSC32KCTRL_XOSC32K_CGM_Pos</a>)</td></tr>
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<tr class="separator:a846ad0c322bd22687331a3fb6f6c9ea8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa167696bb41284cdcef90f7f28ccf4f7"><td class="memItemLeft" align="right" valign="top"><a id="aa167696bb41284cdcef90f7f28ccf4f7"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_XOSC32K_CGM_HS</b>   (<a class="el" href="component_2osc32kctrl_8h.html#a5861dda7b93a256f983a20230827df31">OSC32KCTRL_XOSC32K_CGM_HS_Val</a> << <a class="el" href="component_2osc32kctrl_8h.html#a2951861a2035901bcd3f214e894a1a5e">OSC32KCTRL_XOSC32K_CGM_Pos</a>)</td></tr>
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<tr class="separator:aa167696bb41284cdcef90f7f28ccf4f7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ad0a22f67c5bcc3d0f0df3840c623f7ec"><td class="memItemLeft" align="right" valign="top"><a id="ad0a22f67c5bcc3d0f0df3840c623f7ec"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#ad0a22f67c5bcc3d0f0df3840c623f7ec">OSC32KCTRL_XOSC32K_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x77DE)</td></tr>
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<tr class="memdesc:ad0a22f67c5bcc3d0f0df3840c623f7ec"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_XOSC32K) MASK Register <br /></td></tr>
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<tr class="separator:ad0a22f67c5bcc3d0f0df3840c623f7ec"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab2fbb0a95bf2348b26d6eb55d9488e27"><td class="memItemLeft" align="right" valign="top"><a id="ab2fbb0a95bf2348b26d6eb55d9488e27"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#ab2fbb0a95bf2348b26d6eb55d9488e27">OSC32KCTRL_CFDCTRL_OFFSET</a>   0x16</td></tr>
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<tr class="memdesc:ab2fbb0a95bf2348b26d6eb55d9488e27"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_CFDCTRL offset) Clock Failure Detector Control <br /></td></tr>
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<tr class="separator:ab2fbb0a95bf2348b26d6eb55d9488e27"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab195093fda704bdb95893108576c6ba5"><td class="memItemLeft" align="right" valign="top"><a id="ab195093fda704bdb95893108576c6ba5"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#ab195093fda704bdb95893108576c6ba5">OSC32KCTRL_CFDCTRL_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
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<tr class="memdesc:ab195093fda704bdb95893108576c6ba5"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_CFDCTRL reset_value) Clock Failure Detector Control <br /></td></tr>
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<tr class="separator:ab195093fda704bdb95893108576c6ba5"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2aedb65f916f976703240140126904f6"><td class="memItemLeft" align="right" valign="top"><a id="a2aedb65f916f976703240140126904f6"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a2aedb65f916f976703240140126904f6">OSC32KCTRL_CFDCTRL_CFDEN_Pos</a>   0</td></tr>
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<tr class="memdesc:a2aedb65f916f976703240140126904f6"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_CFDCTRL) Clock Failure Detector Enable <br /></td></tr>
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<tr class="separator:a2aedb65f916f976703240140126904f6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a48c5bbd2014d4426de3da7c19843cccd"><td class="memItemLeft" align="right" valign="top"><a id="a48c5bbd2014d4426de3da7c19843cccd"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_CFDCTRL_CFDEN</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2osc32kctrl_8h.html#a2aedb65f916f976703240140126904f6">OSC32KCTRL_CFDCTRL_CFDEN_Pos</a>)</td></tr>
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<tr class="separator:a48c5bbd2014d4426de3da7c19843cccd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2e8a160a709d649bf92161a98ed35068"><td class="memItemLeft" align="right" valign="top"><a id="a2e8a160a709d649bf92161a98ed35068"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a2e8a160a709d649bf92161a98ed35068">OSC32KCTRL_CFDCTRL_SWBACK_Pos</a>   1</td></tr>
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<tr class="memdesc:a2e8a160a709d649bf92161a98ed35068"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_CFDCTRL) Clock Switch Back <br /></td></tr>
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<tr class="separator:a2e8a160a709d649bf92161a98ed35068"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a4917b873da9c12348949f45296415642"><td class="memItemLeft" align="right" valign="top"><a id="a4917b873da9c12348949f45296415642"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_CFDCTRL_SWBACK</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2osc32kctrl_8h.html#a2e8a160a709d649bf92161a98ed35068">OSC32KCTRL_CFDCTRL_SWBACK_Pos</a>)</td></tr>
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<tr class="separator:a4917b873da9c12348949f45296415642"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a2dc36bba505b43a70628172895e4cee3"><td class="memItemLeft" align="right" valign="top"><a id="a2dc36bba505b43a70628172895e4cee3"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a2dc36bba505b43a70628172895e4cee3">OSC32KCTRL_CFDCTRL_CFDPRESC_Pos</a>   2</td></tr>
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<tr class="memdesc:a2dc36bba505b43a70628172895e4cee3"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_CFDCTRL) Clock Failure Detector Prescaler <br /></td></tr>
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<tr class="separator:a2dc36bba505b43a70628172895e4cee3"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a365297836f76db49eeea030e59b87471"><td class="memItemLeft" align="right" valign="top"><a id="a365297836f76db49eeea030e59b87471"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_CFDCTRL_CFDPRESC</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2osc32kctrl_8h.html#a2dc36bba505b43a70628172895e4cee3">OSC32KCTRL_CFDCTRL_CFDPRESC_Pos</a>)</td></tr>
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<tr class="separator:a365297836f76db49eeea030e59b87471"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a3fec783d5e565f11fe77f4ae88a9876d"><td class="memItemLeft" align="right" valign="top"><a id="a3fec783d5e565f11fe77f4ae88a9876d"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a3fec783d5e565f11fe77f4ae88a9876d">OSC32KCTRL_CFDCTRL_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x07)</td></tr>
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<tr class="memdesc:a3fec783d5e565f11fe77f4ae88a9876d"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_CFDCTRL) MASK Register <br /></td></tr>
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<tr class="separator:a3fec783d5e565f11fe77f4ae88a9876d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:abe8425e24e008b4160dd1756dc5c4e66"><td class="memItemLeft" align="right" valign="top"><a id="abe8425e24e008b4160dd1756dc5c4e66"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#abe8425e24e008b4160dd1756dc5c4e66">OSC32KCTRL_EVCTRL_OFFSET</a>   0x17</td></tr>
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<tr class="memdesc:abe8425e24e008b4160dd1756dc5c4e66"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_EVCTRL offset) Event Control <br /></td></tr>
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<tr class="separator:abe8425e24e008b4160dd1756dc5c4e66"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aced57526fa5e5b62a8f4bebb37deea0f"><td class="memItemLeft" align="right" valign="top"><a id="aced57526fa5e5b62a8f4bebb37deea0f"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#aced57526fa5e5b62a8f4bebb37deea0f">OSC32KCTRL_EVCTRL_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
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<tr class="memdesc:aced57526fa5e5b62a8f4bebb37deea0f"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_EVCTRL reset_value) Event Control <br /></td></tr>
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<tr class="separator:aced57526fa5e5b62a8f4bebb37deea0f"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a71fb66c27d4c80fa73af5641ef5083ae"><td class="memItemLeft" align="right" valign="top"><a id="a71fb66c27d4c80fa73af5641ef5083ae"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a71fb66c27d4c80fa73af5641ef5083ae">OSC32KCTRL_EVCTRL_CFDEO_Pos</a>   0</td></tr>
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<tr class="memdesc:a71fb66c27d4c80fa73af5641ef5083ae"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_EVCTRL) Clock Failure Detector Event Output Enable <br /></td></tr>
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<tr class="separator:a71fb66c27d4c80fa73af5641ef5083ae"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a1539ff86694925a58269f5416763f901"><td class="memItemLeft" align="right" valign="top"><a id="a1539ff86694925a58269f5416763f901"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_EVCTRL_CFDEO</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2osc32kctrl_8h.html#a71fb66c27d4c80fa73af5641ef5083ae">OSC32KCTRL_EVCTRL_CFDEO_Pos</a>)</td></tr>
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<tr class="separator:a1539ff86694925a58269f5416763f901"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a8c5fd77028706618775ef03e5b6fd146"><td class="memItemLeft" align="right" valign="top"><a id="a8c5fd77028706618775ef03e5b6fd146"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a8c5fd77028706618775ef03e5b6fd146">OSC32KCTRL_EVCTRL_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x01)</td></tr>
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<tr class="memdesc:a8c5fd77028706618775ef03e5b6fd146"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_EVCTRL) MASK Register <br /></td></tr>
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<tr class="separator:a8c5fd77028706618775ef03e5b6fd146"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa2ae9323b7a5247081c2bfc04f97e8d1"><td class="memItemLeft" align="right" valign="top"><a id="aa2ae9323b7a5247081c2bfc04f97e8d1"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#aa2ae9323b7a5247081c2bfc04f97e8d1">OSC32KCTRL_OSCULP32K_OFFSET</a>   0x1C</td></tr>
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<tr class="memdesc:aa2ae9323b7a5247081c2bfc04f97e8d1"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_OSCULP32K offset) 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) Control <br /></td></tr>
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<tr class="separator:aa2ae9323b7a5247081c2bfc04f97e8d1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ab745111a32543331557e25c5563a4511"><td class="memItemLeft" align="right" valign="top"><a id="ab745111a32543331557e25c5563a4511"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#ab745111a32543331557e25c5563a4511">OSC32KCTRL_OSCULP32K_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
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<tr class="memdesc:ab745111a32543331557e25c5563a4511"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_OSCULP32K reset_value) 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) Control <br /></td></tr>
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<tr class="separator:ab745111a32543331557e25c5563a4511"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a83057d513fe89052c2f00778184eeb02"><td class="memItemLeft" align="right" valign="top"><a id="a83057d513fe89052c2f00778184eeb02"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a83057d513fe89052c2f00778184eeb02">OSC32KCTRL_OSCULP32K_EN32K_Pos</a>   1</td></tr>
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<tr class="memdesc:a83057d513fe89052c2f00778184eeb02"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_OSCULP32K) Enable Out 32k <br /></td></tr>
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<tr class="separator:a83057d513fe89052c2f00778184eeb02"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ae40d48cd922ffde35a053c4f7ddc16ea"><td class="memItemLeft" align="right" valign="top"><a id="ae40d48cd922ffde35a053c4f7ddc16ea"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_OSCULP32K_EN32K</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2osc32kctrl_8h.html#a83057d513fe89052c2f00778184eeb02">OSC32KCTRL_OSCULP32K_EN32K_Pos</a>)</td></tr>
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<tr class="separator:ae40d48cd922ffde35a053c4f7ddc16ea"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aadfe0343e0462db3b20dca24186d2681"><td class="memItemLeft" align="right" valign="top"><a id="aadfe0343e0462db3b20dca24186d2681"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#aadfe0343e0462db3b20dca24186d2681">OSC32KCTRL_OSCULP32K_EN1K_Pos</a>   2</td></tr>
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<tr class="memdesc:aadfe0343e0462db3b20dca24186d2681"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_OSCULP32K) Enable Out 1k <br /></td></tr>
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<tr class="separator:aadfe0343e0462db3b20dca24186d2681"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a0c8ed34843f388e5215db1136e6f8793"><td class="memItemLeft" align="right" valign="top"><a id="a0c8ed34843f388e5215db1136e6f8793"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_OSCULP32K_EN1K</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2osc32kctrl_8h.html#aadfe0343e0462db3b20dca24186d2681">OSC32KCTRL_OSCULP32K_EN1K_Pos</a>)</td></tr>
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<tr class="separator:a0c8ed34843f388e5215db1136e6f8793"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa2abedc94425667d08d6682c2c4f19cf"><td class="memItemLeft" align="right" valign="top"><a id="aa2abedc94425667d08d6682c2c4f19cf"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#aa2abedc94425667d08d6682c2c4f19cf">OSC32KCTRL_OSCULP32K_CALIB_Pos</a>   8</td></tr>
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<tr class="memdesc:aa2abedc94425667d08d6682c2c4f19cf"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_OSCULP32K) Oscillator Calibration <br /></td></tr>
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<tr class="separator:aa2abedc94425667d08d6682c2c4f19cf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:a032ec879eb215f0dce18a67a9507c2c6"><td class="memItemLeft" align="right" valign="top"><a id="a032ec879eb215f0dce18a67a9507c2c6"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_OSCULP32K_CALIB_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3F) << <a class="el" href="component_2osc32kctrl_8h.html#aa2abedc94425667d08d6682c2c4f19cf">OSC32KCTRL_OSCULP32K_CALIB_Pos</a>)</td></tr>
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<tr class="separator:a032ec879eb215f0dce18a67a9507c2c6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:aa82a019f33f0dcaa43f1076cf19b1839"><td class="memItemLeft" align="right" valign="top"><a id="aa82a019f33f0dcaa43f1076cf19b1839"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_OSCULP32K_CALIB</b>(value)   (OSC32KCTRL_OSCULP32K_CALIB_Msk & ((value) << <a class="el" href="component_2osc32kctrl_8h.html#aa2abedc94425667d08d6682c2c4f19cf">OSC32KCTRL_OSCULP32K_CALIB_Pos</a>))</td></tr>
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<tr class="memitem:a591a0a2ca06e742e29fcac7418e0593f"><td class="memItemLeft" align="right" valign="top"><a id="a591a0a2ca06e742e29fcac7418e0593f"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a591a0a2ca06e742e29fcac7418e0593f">OSC32KCTRL_OSCULP32K_WRTLOCK_Pos</a>   15</td></tr>
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<tr class="memdesc:a591a0a2ca06e742e29fcac7418e0593f"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_OSCULP32K) Write Lock <br /></td></tr>
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<tr class="memitem:a03e99d5691394be1b3b2b55d1b422a7c"><td class="memItemLeft" align="right" valign="top"><a id="a03e99d5691394be1b3b2b55d1b422a7c"></a>
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#define </td><td class="memItemRight" valign="bottom"><b>OSC32KCTRL_OSCULP32K_WRTLOCK</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2osc32kctrl_8h.html#a591a0a2ca06e742e29fcac7418e0593f">OSC32KCTRL_OSCULP32K_WRTLOCK_Pos</a>)</td></tr>
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<tr class="memitem:a7b3ca0c8a3b7f6e1b9baf3c1da4cd182"><td class="memItemLeft" align="right" valign="top"><a id="a7b3ca0c8a3b7f6e1b9baf3c1da4cd182"></a>
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#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2osc32kctrl_8h.html#a7b3ca0c8a3b7f6e1b9baf3c1da4cd182">OSC32KCTRL_OSCULP32K_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0000BF06)</td></tr>
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<tr class="memdesc:a7b3ca0c8a3b7f6e1b9baf3c1da4cd182"><td class="mdescLeft"> </td><td class="mdescRight">(OSC32KCTRL_OSCULP32K) MASK Register <br /></td></tr>
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</table>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
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<div class="textblock"><p>Component description for OSC32KCTRL. </p>
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<p>Copyright (c) 2019 Microchip Technology Inc.</p>
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<p>\asf_license_start </p>
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<p class="definition">Definition in file <a class="el" href="component_2osc32kctrl_8h_source.html">osc32kctrl.h</a>.</p>
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