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<li class="navelem"><a class="el" href="dir_ea9599923402ca8ab47fc3e495999dea.html">arch</a></li><li class="navelem"><a class="el" href="dir_9e929c73feaf15d3695ce4c76b483065.html">arm</a></li><li class="navelem"><a class="el" href="dir_58955c0f35a9c3d48181d2be53994c7b.html">SAME54</a></li><li class="navelem"><a class="el" href="dir_09e97e512ca7d4e6cd359f1c5497eeba.html">SAME54A</a></li><li class="navelem"><a class="el" href="dir_4b38d63e5c584a4d6c9001c789e1829f.html">mcu</a></li><li class="navelem"><a class="el" href="dir_d4fc57b996dc082ef023092a5b7d90fc.html">inc</a></li><li class="navelem"><a class="el" href="dir_2bb2e10400507f879251f0324a0a8c7c.html">component</a></li> </ul>
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<div class="title">nvmctrl.h</div> </div>
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<div class="contents">
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<a href="component_2nvmctrl_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>  </div>
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<div class="line"><a name="l00030"></a><span class="lineno"> 30</span> <span class="preprocessor">#ifndef _SAME54_NVMCTRL_COMPONENT_</span></div>
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<div class="line"><a name="l00031"></a><span class="lineno"> 31</span> <span class="preprocessor">#define _SAME54_NVMCTRL_COMPONENT_</span></div>
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<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>  </div>
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<div class="line"><a name="l00033"></a><span class="lineno"> 33</span> <span class="comment">/* ========================================================================== */</span></div>
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<div class="line"><a name="l00035"></a><span class="lineno"> 35</span> <span class="comment">/* ========================================================================== */</span></div>
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<div class="line"><a name="l00038"></a><span class="lineno"> 38</span>  </div>
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<div class="line"><a name="l00039"></a><span class="lineno"> 39</span> <span class="preprocessor">#define NVMCTRL_U2409</span></div>
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<div class="line"><a name="l00040"></a><span class="lineno"> 40</span> <span class="preprocessor">#define REV_NVMCTRL 0x100</span></div>
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<div class="line"><a name="l00041"></a><span class="lineno"> 41</span>  </div>
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<div class="line"><a name="l00042"></a><span class="lineno"> 42</span> <span class="comment">/* -------- NVMCTRL_CTRLA : (NVMCTRL Offset: 0x00) (R/W 16) Control A -------- */</span></div>
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<div class="line"><a name="l00043"></a><span class="lineno"> 43</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
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<div class="line"><a name="l00044"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLA__Type.html"> 44</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
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<div class="line"><a name="l00045"></a><span class="lineno"> 45</span>  <span class="keyword">struct </span>{</div>
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<div class="line"><a name="l00046"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLA__Type.html#ad1dcc5ff570a3c710aa29340a0f82445"> 46</a></span>  uint16_t :2; </div>
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<div class="line"><a name="l00047"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLA__Type.html#a681489c8c6abf9104a2fab49f0b7f6fe"> 47</a></span>  uint16_t <a class="code" href="unionNVMCTRL__CTRLA__Type.html#a681489c8c6abf9104a2fab49f0b7f6fe">AUTOWS</a>:1; </div>
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<div class="line"><a name="l00048"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLA__Type.html#a3bbab66b83056fd662612f08a715ae30"> 48</a></span>  uint16_t <a class="code" href="unionNVMCTRL__CTRLA__Type.html#a3bbab66b83056fd662612f08a715ae30">SUSPEN</a>:1; </div>
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<div class="line"><a name="l00049"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLA__Type.html#adbd3afd8e391e8c2f43182d8e68f78a4"> 49</a></span>  uint16_t <a class="code" href="unionNVMCTRL__CTRLA__Type.html#adbd3afd8e391e8c2f43182d8e68f78a4">WMODE</a>:2; </div>
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<div class="line"><a name="l00050"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLA__Type.html#a07cb354a8474052820dddae6fb60b601"> 50</a></span>  uint16_t <a class="code" href="unionNVMCTRL__CTRLA__Type.html#a07cb354a8474052820dddae6fb60b601">PRM</a>:2; </div>
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<div class="line"><a name="l00051"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLA__Type.html#ac25be3eb6ef2954bb84c10da7659e4fd"> 51</a></span>  uint16_t <a class="code" href="unionNVMCTRL__CTRLA__Type.html#ac25be3eb6ef2954bb84c10da7659e4fd">RWS</a>:4; </div>
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<div class="line"><a name="l00052"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLA__Type.html#a3437a1c23022e60b41149d46aefbb8a6"> 52</a></span>  uint16_t <a class="code" href="unionNVMCTRL__CTRLA__Type.html#a3437a1c23022e60b41149d46aefbb8a6">AHBNS0</a>:1; </div>
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<div class="line"><a name="l00053"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLA__Type.html#a514f4360f729f5cd90e5421293f620ee"> 53</a></span>  uint16_t <a class="code" href="unionNVMCTRL__CTRLA__Type.html#a514f4360f729f5cd90e5421293f620ee">AHBNS1</a>:1; </div>
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<div class="line"><a name="l00054"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLA__Type.html#a326ec917cd719be68c60f3dba461e529"> 54</a></span>  uint16_t <a class="code" href="unionNVMCTRL__CTRLA__Type.html#a326ec917cd719be68c60f3dba461e529">CACHEDIS0</a>:1; </div>
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<div class="line"><a name="l00055"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLA__Type.html#ae906ccf75cdbcbe61cb732d71b205aaa"> 55</a></span>  uint16_t <a class="code" href="unionNVMCTRL__CTRLA__Type.html#ae906ccf75cdbcbe61cb732d71b205aaa">CACHEDIS1</a>:1; </div>
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<div class="line"><a name="l00056"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLA__Type.html#a08ae6bbf8650bda375060d39f4122221"> 56</a></span>  } bit; </div>
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<div class="line"><a name="l00057"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLA__Type.html#a675bd7dd11996723b783028b20c0c280"> 57</a></span>  uint16_t <a class="code" href="unionNVMCTRL__CTRLA__Type.html#a675bd7dd11996723b783028b20c0c280">reg</a>; </div>
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<div class="line"><a name="l00058"></a><span class="lineno"> 58</span> } <a class="code" href="unionNVMCTRL__CTRLA__Type.html">NVMCTRL_CTRLA_Type</a>;</div>
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<div class="line"><a name="l00059"></a><span class="lineno"> 59</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
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<div class="line"><a name="l00060"></a><span class="lineno"> 60</span>  </div>
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<div class="line"><a name="l00061"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a4853195148a26c13e84af06b27099a5a"> 61</a></span> <span class="preprocessor">#define NVMCTRL_CTRLA_OFFSET 0x00 </span></div>
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<div class="line"><a name="l00062"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#afda7d874f8e5f91f9590105c7bc984b5"> 62</a></span> <span class="preprocessor">#define NVMCTRL_CTRLA_RESETVALUE _U_(0x0004) </span></div>
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<div class="line"><a name="l00064"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a257e603f4a7174e1d635448e228bfc07"> 64</a></span> <span class="preprocessor">#define NVMCTRL_CTRLA_AUTOWS_Pos 2 </span></div>
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<div class="line"><a name="l00065"></a><span class="lineno"> 65</span> <span class="preprocessor">#define NVMCTRL_CTRLA_AUTOWS (_U_(0x1) << NVMCTRL_CTRLA_AUTOWS_Pos)</span></div>
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<div class="line"><a name="l00066"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a6aab60ee7f62c471607703ddd3b7b6e4"> 66</a></span> <span class="preprocessor">#define NVMCTRL_CTRLA_SUSPEN_Pos 3 </span></div>
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<div class="line"><a name="l00067"></a><span class="lineno"> 67</span> <span class="preprocessor">#define NVMCTRL_CTRLA_SUSPEN (_U_(0x1) << NVMCTRL_CTRLA_SUSPEN_Pos)</span></div>
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<div class="line"><a name="l00068"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a42f77205ee1d60ab6bde5ce2f96d81a4"> 68</a></span> <span class="preprocessor">#define NVMCTRL_CTRLA_WMODE_Pos 4 </span></div>
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<div class="line"><a name="l00069"></a><span class="lineno"> 69</span> <span class="preprocessor">#define NVMCTRL_CTRLA_WMODE_Msk (_U_(0x3) << NVMCTRL_CTRLA_WMODE_Pos)</span></div>
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<div class="line"><a name="l00070"></a><span class="lineno"> 70</span> <span class="preprocessor">#define NVMCTRL_CTRLA_WMODE(value) (NVMCTRL_CTRLA_WMODE_Msk & ((value) << NVMCTRL_CTRLA_WMODE_Pos))</span></div>
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<div class="line"><a name="l00071"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a45ac920f783317e834656f1918eaebbd"> 71</a></span> <span class="preprocessor">#define NVMCTRL_CTRLA_WMODE_MAN_Val _U_(0x0) </span></div>
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<div class="line"><a name="l00072"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a339f6e3dd7fd6de30c66c844b0387e8d"> 72</a></span> <span class="preprocessor">#define NVMCTRL_CTRLA_WMODE_ADW_Val _U_(0x1) </span></div>
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<div class="line"><a name="l00073"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a13be0616ab7d1862c3ec88ba15e65588"> 73</a></span> <span class="preprocessor">#define NVMCTRL_CTRLA_WMODE_AQW_Val _U_(0x2) </span></div>
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<div class="line"><a name="l00074"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a01fc2f0de453700c5253ca7aefe693c5"> 74</a></span> <span class="preprocessor">#define NVMCTRL_CTRLA_WMODE_AP_Val _U_(0x3) </span></div>
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<div class="line"><a name="l00075"></a><span class="lineno"> 75</span> <span class="preprocessor">#define NVMCTRL_CTRLA_WMODE_MAN (NVMCTRL_CTRLA_WMODE_MAN_Val << NVMCTRL_CTRLA_WMODE_Pos)</span></div>
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<div class="line"><a name="l00076"></a><span class="lineno"> 76</span> <span class="preprocessor">#define NVMCTRL_CTRLA_WMODE_ADW (NVMCTRL_CTRLA_WMODE_ADW_Val << NVMCTRL_CTRLA_WMODE_Pos)</span></div>
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<div class="line"><a name="l00077"></a><span class="lineno"> 77</span> <span class="preprocessor">#define NVMCTRL_CTRLA_WMODE_AQW (NVMCTRL_CTRLA_WMODE_AQW_Val << NVMCTRL_CTRLA_WMODE_Pos)</span></div>
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<div class="line"><a name="l00078"></a><span class="lineno"> 78</span> <span class="preprocessor">#define NVMCTRL_CTRLA_WMODE_AP (NVMCTRL_CTRLA_WMODE_AP_Val << NVMCTRL_CTRLA_WMODE_Pos)</span></div>
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<div class="line"><a name="l00079"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a0f41c800b0d4a71442b2386ed1cbf40e"> 79</a></span> <span class="preprocessor">#define NVMCTRL_CTRLA_PRM_Pos 6 </span></div>
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<div class="line"><a name="l00080"></a><span class="lineno"> 80</span> <span class="preprocessor">#define NVMCTRL_CTRLA_PRM_Msk (_U_(0x3) << NVMCTRL_CTRLA_PRM_Pos)</span></div>
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<div class="line"><a name="l00081"></a><span class="lineno"> 81</span> <span class="preprocessor">#define NVMCTRL_CTRLA_PRM(value) (NVMCTRL_CTRLA_PRM_Msk & ((value) << NVMCTRL_CTRLA_PRM_Pos))</span></div>
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<div class="line"><a name="l00082"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aac7012aec3df3a960aa7429f44d351e5"> 82</a></span> <span class="preprocessor">#define NVMCTRL_CTRLA_PRM_SEMIAUTO_Val _U_(0x0) </span></div>
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<div class="line"><a name="l00083"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#adb5e8d0001604c78e97b4df1d79c8bd2"> 83</a></span> <span class="preprocessor">#define NVMCTRL_CTRLA_PRM_FULLAUTO_Val _U_(0x1) </span></div>
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<div class="line"><a name="l00084"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a2eb1d721aa675d6e611dd76a807ca656"> 84</a></span> <span class="preprocessor">#define NVMCTRL_CTRLA_PRM_MANUAL_Val _U_(0x3) </span></div>
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<div class="line"><a name="l00085"></a><span class="lineno"> 85</span> <span class="preprocessor">#define NVMCTRL_CTRLA_PRM_SEMIAUTO (NVMCTRL_CTRLA_PRM_SEMIAUTO_Val << NVMCTRL_CTRLA_PRM_Pos)</span></div>
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<div class="line"><a name="l00086"></a><span class="lineno"> 86</span> <span class="preprocessor">#define NVMCTRL_CTRLA_PRM_FULLAUTO (NVMCTRL_CTRLA_PRM_FULLAUTO_Val << NVMCTRL_CTRLA_PRM_Pos)</span></div>
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<div class="line"><a name="l00087"></a><span class="lineno"> 87</span> <span class="preprocessor">#define NVMCTRL_CTRLA_PRM_MANUAL (NVMCTRL_CTRLA_PRM_MANUAL_Val << NVMCTRL_CTRLA_PRM_Pos)</span></div>
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<div class="line"><a name="l00088"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a79492707dae78f3e00d769fc45a33fd3"> 88</a></span> <span class="preprocessor">#define NVMCTRL_CTRLA_RWS_Pos 8 </span></div>
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<div class="line"><a name="l00089"></a><span class="lineno"> 89</span> <span class="preprocessor">#define NVMCTRL_CTRLA_RWS_Msk (_U_(0xF) << NVMCTRL_CTRLA_RWS_Pos)</span></div>
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<div class="line"><a name="l00090"></a><span class="lineno"> 90</span> <span class="preprocessor">#define NVMCTRL_CTRLA_RWS(value) (NVMCTRL_CTRLA_RWS_Msk & ((value) << NVMCTRL_CTRLA_RWS_Pos))</span></div>
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<div class="line"><a name="l00091"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aaf7319d1b7b994e5238f58155453a3bd"> 91</a></span> <span class="preprocessor">#define NVMCTRL_CTRLA_AHBNS0_Pos 12 </span></div>
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<div class="line"><a name="l00092"></a><span class="lineno"> 92</span> <span class="preprocessor">#define NVMCTRL_CTRLA_AHBNS0 (_U_(0x1) << NVMCTRL_CTRLA_AHBNS0_Pos)</span></div>
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<div class="line"><a name="l00093"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a657739dc21d96ce606df063bbcabb531"> 93</a></span> <span class="preprocessor">#define NVMCTRL_CTRLA_AHBNS1_Pos 13 </span></div>
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<div class="line"><a name="l00094"></a><span class="lineno"> 94</span> <span class="preprocessor">#define NVMCTRL_CTRLA_AHBNS1 (_U_(0x1) << NVMCTRL_CTRLA_AHBNS1_Pos)</span></div>
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<div class="line"><a name="l00095"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a4ecb1a6ccfe7b8164364078aac486806"> 95</a></span> <span class="preprocessor">#define NVMCTRL_CTRLA_CACHEDIS0_Pos 14 </span></div>
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<div class="line"><a name="l00096"></a><span class="lineno"> 96</span> <span class="preprocessor">#define NVMCTRL_CTRLA_CACHEDIS0 (_U_(0x1) << NVMCTRL_CTRLA_CACHEDIS0_Pos)</span></div>
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<div class="line"><a name="l00097"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a80271bf72ecf3941808bbbd26df4f55c"> 97</a></span> <span class="preprocessor">#define NVMCTRL_CTRLA_CACHEDIS1_Pos 15 </span></div>
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<div class="line"><a name="l00098"></a><span class="lineno"> 98</span> <span class="preprocessor">#define NVMCTRL_CTRLA_CACHEDIS1 (_U_(0x1) << NVMCTRL_CTRLA_CACHEDIS1_Pos)</span></div>
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<div class="line"><a name="l00099"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a59f02a3ccafaec97563b7369c88d548c"> 99</a></span> <span class="preprocessor">#define NVMCTRL_CTRLA_MASK _U_(0xFFFC) </span></div>
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<div class="line"><a name="l00101"></a><span class="lineno"> 101</span> <span class="preprocessor"></span><span class="comment">/* -------- NVMCTRL_CTRLB : (NVMCTRL Offset: 0x04) ( /W 16) Control B -------- */</span><span class="preprocessor"></span></div>
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<div class="line"><a name="l00102"></a><span class="lineno"> 102</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
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<div class="line"><a name="l00103"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLB__Type.html"> 103</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
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<div class="line"><a name="l00104"></a><span class="lineno"> 104</span>  <span class="keyword">struct </span>{</div>
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<div class="line"><a name="l00105"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLB__Type.html#aaecd1479721fa1867507ce56625f5fcd"> 105</a></span>  uint16_t <a class="code" href="unionNVMCTRL__CTRLB__Type.html#aaecd1479721fa1867507ce56625f5fcd">CMD</a>:7; </div>
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<div class="line"><a name="l00106"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLB__Type.html#a541bdd8987472abfd42692c388b1aec7"> 106</a></span>  uint16_t :1; </div>
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<div class="line"><a name="l00107"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLB__Type.html#ab8c908cb79b7f76453eeb8d8274c1e78"> 107</a></span>  uint16_t <a class="code" href="unionNVMCTRL__CTRLB__Type.html#ab8c908cb79b7f76453eeb8d8274c1e78">CMDEX</a>:8; </div>
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<div class="line"><a name="l00108"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLB__Type.html#acfb4580d9bb7f23453318dbb5cecdd52"> 108</a></span>  } bit; </div>
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<div class="line"><a name="l00109"></a><span class="lineno"><a class="line" href="unionNVMCTRL__CTRLB__Type.html#a1632d370d1a889790f59cd1e1167f07b"> 109</a></span>  uint16_t <a class="code" href="unionNVMCTRL__CTRLB__Type.html#a1632d370d1a889790f59cd1e1167f07b">reg</a>; </div>
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<div class="line"><a name="l00110"></a><span class="lineno"> 110</span> } <a class="code" href="unionNVMCTRL__CTRLB__Type.html">NVMCTRL_CTRLB_Type</a>;</div>
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<div class="line"><a name="l00111"></a><span class="lineno"> 111</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
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<div class="line"><a name="l00112"></a><span class="lineno"> 112</span>  </div>
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<div class="line"><a name="l00113"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a96b31df212035cedc4f6a370222e5b67"> 113</a></span> <span class="preprocessor">#define NVMCTRL_CTRLB_OFFSET 0x04 </span></div>
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<div class="line"><a name="l00114"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ac0a835cf0ee617133dc445147d2af448"> 114</a></span> <span class="preprocessor">#define NVMCTRL_CTRLB_RESETVALUE _U_(0x0000) </span></div>
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<div class="line"><a name="l00116"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ab5ece0aea3c767970b7e9a36d8ff5b09"> 116</a></span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_Pos 0 </span></div>
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<div class="line"><a name="l00117"></a><span class="lineno"> 117</span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_Msk (_U_(0x7F) << NVMCTRL_CTRLB_CMD_Pos)</span></div>
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<div class="line"><a name="l00118"></a><span class="lineno"> 118</span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD(value) (NVMCTRL_CTRLB_CMD_Msk & ((value) << NVMCTRL_CTRLB_CMD_Pos))</span></div>
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<div class="line"><a name="l00119"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#adf1f5d8474585fee271f0962685af28d"> 119</a></span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_EP_Val _U_(0x0) </span></div>
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<div class="line"><a name="l00120"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a0ed209557388aeb8be92cf517c864dcb"> 120</a></span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_EB_Val _U_(0x1) </span></div>
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<div class="line"><a name="l00121"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a5d327d2e6f86cb3fbd2b6b4fd7cdd68e"> 121</a></span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_WP_Val _U_(0x3) </span></div>
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<div class="line"><a name="l00122"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#af34525bef09fb504163897eef0150037"> 122</a></span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_WQW_Val _U_(0x4) </span></div>
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<div class="line"><a name="l00123"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a6c2019650a4cd908d3ea5a338beb6ff4"> 123</a></span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_SWRST_Val _U_(0x10) </span></div>
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<div class="line"><a name="l00124"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aac904813b0b4baaf6bc705eba9492484"> 124</a></span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_LR_Val _U_(0x11) </span></div>
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<div class="line"><a name="l00125"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a6ace8977becb3c48a551ab660ce60304"> 125</a></span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_UR_Val _U_(0x12) </span></div>
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<div class="line"><a name="l00126"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ab6548cf96c5a7fd1b260f9be53ed6ced"> 126</a></span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_SPRM_Val _U_(0x13) </span></div>
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<div class="line"><a name="l00127"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ac190c581f785840caad085267458456e"> 127</a></span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_CPRM_Val _U_(0x14) </span></div>
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<div class="line"><a name="l00128"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ab61f899ee1eb9d625ec3f4d2a17c9474"> 128</a></span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_PBC_Val _U_(0x15) </span></div>
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<div class="line"><a name="l00129"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aadf20f72205d9c9fd72880936f9ee01f"> 129</a></span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_SSB_Val _U_(0x16) </span></div>
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<div class="line"><a name="l00130"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a6f03386bf7b354fda9387d2c52db86d1"> 130</a></span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_BKSWRST_Val _U_(0x17) </span></div>
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<div class="line"><a name="l00131"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a09c93870736f457ba8987109ae500640"> 131</a></span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_CELCK_Val _U_(0x18) </span></div>
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<div class="line"><a name="l00132"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ab97117cbba584df4bf0620b6a40ef844"> 132</a></span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_CEULCK_Val _U_(0x19) </span></div>
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<div class="line"><a name="l00133"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a0b282c1f3bd4b7133f583caf095bd557"> 133</a></span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_SBPDIS_Val _U_(0x1A) </span></div>
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<div class="line"><a name="l00134"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a5a999f4f70c43b441a20c76c5ca8cc5c"> 134</a></span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_CBPDIS_Val _U_(0x1B) </span></div>
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<div class="line"><a name="l00135"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a026140326eacb0754ddca2c6cb722081"> 135</a></span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_ASEES0_Val _U_(0x30) </span></div>
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<div class="line"><a name="l00136"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a4f80ee71f9e77eec26ae1185aefaada2"> 136</a></span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_ASEES1_Val _U_(0x31) </span></div>
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<div class="line"><a name="l00137"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#af7e06bd5d2cfb32c1840887fd46748c1"> 137</a></span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_SEERALOC_Val _U_(0x32) </span></div>
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<div class="line"><a name="l00138"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ae3721546ed0ce85d258030640db36cdf"> 138</a></span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_SEEFLUSH_Val _U_(0x33) </span></div>
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<div class="line"><a name="l00139"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a8b5bfcf07c93cafca14275059bae1063"> 139</a></span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_LSEE_Val _U_(0x34) </span></div>
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<div class="line"><a name="l00140"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#af2c5cda4f74dd820709364d368d94d2e"> 140</a></span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_USEE_Val _U_(0x35) </span></div>
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<div class="line"><a name="l00141"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a424082dbd173d10a016ce39edf650ac4"> 141</a></span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_LSEER_Val _U_(0x36) </span></div>
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<div class="line"><a name="l00142"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ac63d1fd2efbde3aebed27b21eb0c16e8"> 142</a></span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_USEER_Val _U_(0x37) </span></div>
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<div class="line"><a name="l00143"></a><span class="lineno"> 143</span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_EP (NVMCTRL_CTRLB_CMD_EP_Val << NVMCTRL_CTRLB_CMD_Pos)</span></div>
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<div class="line"><a name="l00144"></a><span class="lineno"> 144</span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_EB (NVMCTRL_CTRLB_CMD_EB_Val << NVMCTRL_CTRLB_CMD_Pos)</span></div>
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<div class="line"><a name="l00145"></a><span class="lineno"> 145</span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_WP (NVMCTRL_CTRLB_CMD_WP_Val << NVMCTRL_CTRLB_CMD_Pos)</span></div>
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<div class="line"><a name="l00146"></a><span class="lineno"> 146</span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_WQW (NVMCTRL_CTRLB_CMD_WQW_Val << NVMCTRL_CTRLB_CMD_Pos)</span></div>
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<div class="line"><a name="l00147"></a><span class="lineno"> 147</span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_SWRST (NVMCTRL_CTRLB_CMD_SWRST_Val << NVMCTRL_CTRLB_CMD_Pos)</span></div>
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<div class="line"><a name="l00148"></a><span class="lineno"> 148</span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_LR (NVMCTRL_CTRLB_CMD_LR_Val << NVMCTRL_CTRLB_CMD_Pos)</span></div>
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<div class="line"><a name="l00149"></a><span class="lineno"> 149</span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_UR (NVMCTRL_CTRLB_CMD_UR_Val << NVMCTRL_CTRLB_CMD_Pos)</span></div>
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<div class="line"><a name="l00150"></a><span class="lineno"> 150</span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_SPRM (NVMCTRL_CTRLB_CMD_SPRM_Val << NVMCTRL_CTRLB_CMD_Pos)</span></div>
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<div class="line"><a name="l00151"></a><span class="lineno"> 151</span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_CPRM (NVMCTRL_CTRLB_CMD_CPRM_Val << NVMCTRL_CTRLB_CMD_Pos)</span></div>
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<div class="line"><a name="l00152"></a><span class="lineno"> 152</span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_PBC (NVMCTRL_CTRLB_CMD_PBC_Val << NVMCTRL_CTRLB_CMD_Pos)</span></div>
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<div class="line"><a name="l00153"></a><span class="lineno"> 153</span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_SSB (NVMCTRL_CTRLB_CMD_SSB_Val << NVMCTRL_CTRLB_CMD_Pos)</span></div>
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<div class="line"><a name="l00154"></a><span class="lineno"> 154</span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_BKSWRST (NVMCTRL_CTRLB_CMD_BKSWRST_Val << NVMCTRL_CTRLB_CMD_Pos)</span></div>
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<div class="line"><a name="l00155"></a><span class="lineno"> 155</span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_CELCK (NVMCTRL_CTRLB_CMD_CELCK_Val << NVMCTRL_CTRLB_CMD_Pos)</span></div>
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<div class="line"><a name="l00156"></a><span class="lineno"> 156</span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_CEULCK (NVMCTRL_CTRLB_CMD_CEULCK_Val << NVMCTRL_CTRLB_CMD_Pos)</span></div>
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<div class="line"><a name="l00157"></a><span class="lineno"> 157</span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_SBPDIS (NVMCTRL_CTRLB_CMD_SBPDIS_Val << NVMCTRL_CTRLB_CMD_Pos)</span></div>
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<div class="line"><a name="l00158"></a><span class="lineno"> 158</span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_CBPDIS (NVMCTRL_CTRLB_CMD_CBPDIS_Val << NVMCTRL_CTRLB_CMD_Pos)</span></div>
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<div class="line"><a name="l00159"></a><span class="lineno"> 159</span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_ASEES0 (NVMCTRL_CTRLB_CMD_ASEES0_Val << NVMCTRL_CTRLB_CMD_Pos)</span></div>
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<div class="line"><a name="l00160"></a><span class="lineno"> 160</span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_ASEES1 (NVMCTRL_CTRLB_CMD_ASEES1_Val << NVMCTRL_CTRLB_CMD_Pos)</span></div>
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<div class="line"><a name="l00161"></a><span class="lineno"> 161</span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_SEERALOC (NVMCTRL_CTRLB_CMD_SEERALOC_Val << NVMCTRL_CTRLB_CMD_Pos)</span></div>
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<div class="line"><a name="l00162"></a><span class="lineno"> 162</span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_SEEFLUSH (NVMCTRL_CTRLB_CMD_SEEFLUSH_Val << NVMCTRL_CTRLB_CMD_Pos)</span></div>
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<div class="line"><a name="l00163"></a><span class="lineno"> 163</span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_LSEE (NVMCTRL_CTRLB_CMD_LSEE_Val << NVMCTRL_CTRLB_CMD_Pos)</span></div>
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<div class="line"><a name="l00164"></a><span class="lineno"> 164</span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_USEE (NVMCTRL_CTRLB_CMD_USEE_Val << NVMCTRL_CTRLB_CMD_Pos)</span></div>
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<div class="line"><a name="l00165"></a><span class="lineno"> 165</span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_LSEER (NVMCTRL_CTRLB_CMD_LSEER_Val << NVMCTRL_CTRLB_CMD_Pos)</span></div>
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<div class="line"><a name="l00166"></a><span class="lineno"> 166</span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMD_USEER (NVMCTRL_CTRLB_CMD_USEER_Val << NVMCTRL_CTRLB_CMD_Pos)</span></div>
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<div class="line"><a name="l00167"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aeea03491d70dfffbc8667e69e5aabca6"> 167</a></span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMDEX_Pos 8 </span></div>
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<div class="line"><a name="l00168"></a><span class="lineno"> 168</span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMDEX_Msk (_U_(0xFF) << NVMCTRL_CTRLB_CMDEX_Pos)</span></div>
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<div class="line"><a name="l00169"></a><span class="lineno"> 169</span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMDEX(value) (NVMCTRL_CTRLB_CMDEX_Msk & ((value) << NVMCTRL_CTRLB_CMDEX_Pos))</span></div>
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<div class="line"><a name="l00170"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ab22f4e79b9b7373890149b2fe0966192"> 170</a></span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMDEX_KEY_Val _U_(0xA5) </span></div>
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<div class="line"><a name="l00171"></a><span class="lineno"> 171</span> <span class="preprocessor">#define NVMCTRL_CTRLB_CMDEX_KEY (NVMCTRL_CTRLB_CMDEX_KEY_Val << NVMCTRL_CTRLB_CMDEX_Pos)</span></div>
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<div class="line"><a name="l00172"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aaf2272ac3ee696dfe0d222a87bc7cbe1"> 172</a></span> <span class="preprocessor">#define NVMCTRL_CTRLB_MASK _U_(0xFF7F) </span></div>
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<div class="line"><a name="l00174"></a><span class="lineno"> 174</span> <span class="preprocessor"></span><span class="comment">/* -------- NVMCTRL_PARAM : (NVMCTRL Offset: 0x08) (R/ 32) NVM Parameter -------- */</span><span class="preprocessor"></span></div>
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<div class="line"><a name="l00175"></a><span class="lineno"> 175</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
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<div class="line"><a name="l00176"></a><span class="lineno"><a class="line" href="unionNVMCTRL__PARAM__Type.html"> 176</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
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<div class="line"><a name="l00177"></a><span class="lineno"> 177</span>  <span class="keyword">struct </span>{</div>
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<div class="line"><a name="l00178"></a><span class="lineno"><a class="line" href="unionNVMCTRL__PARAM__Type.html#ab027731ea54fbc5dc42c1f1eb988a498"> 178</a></span>  uint32_t <a class="code" href="unionNVMCTRL__PARAM__Type.html#ab027731ea54fbc5dc42c1f1eb988a498">NVMP</a>:16; </div>
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<div class="line"><a name="l00179"></a><span class="lineno"><a class="line" href="unionNVMCTRL__PARAM__Type.html#a1614279db2de41ec8c6b19e2b60c873c"> 179</a></span>  uint32_t <a class="code" href="unionNVMCTRL__PARAM__Type.html#a1614279db2de41ec8c6b19e2b60c873c">PSZ</a>:3; </div>
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<div class="line"><a name="l00180"></a><span class="lineno"><a class="line" href="unionNVMCTRL__PARAM__Type.html#ae35882817f7518d6e3581b5bf6ce12d0"> 180</a></span>  uint32_t :12; </div>
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<div class="line"><a name="l00181"></a><span class="lineno"><a class="line" href="unionNVMCTRL__PARAM__Type.html#ac83f36a3d86a5e6dd9514bd4568a3a92"> 181</a></span>  uint32_t <a class="code" href="unionNVMCTRL__PARAM__Type.html#ac83f36a3d86a5e6dd9514bd4568a3a92">SEE</a>:1; </div>
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<div class="line"><a name="l00182"></a><span class="lineno"><a class="line" href="unionNVMCTRL__PARAM__Type.html#aa007e1ecf23c1be2bf9845f1380b491d"> 182</a></span>  } bit; </div>
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<div class="line"><a name="l00183"></a><span class="lineno"><a class="line" href="unionNVMCTRL__PARAM__Type.html#a06e3104745c4aa4dc7c65a7b876b3cfd"> 183</a></span>  uint32_t <a class="code" href="unionNVMCTRL__PARAM__Type.html#a06e3104745c4aa4dc7c65a7b876b3cfd">reg</a>; </div>
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<div class="line"><a name="l00184"></a><span class="lineno"> 184</span> } <a class="code" href="unionNVMCTRL__PARAM__Type.html">NVMCTRL_PARAM_Type</a>;</div>
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<div class="line"><a name="l00185"></a><span class="lineno"> 185</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
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<div class="line"><a name="l00186"></a><span class="lineno"> 186</span>  </div>
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<div class="line"><a name="l00187"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a6624597605fc956079a9818778a34abe"> 187</a></span> <span class="preprocessor">#define NVMCTRL_PARAM_OFFSET 0x08 </span></div>
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<div class="line"><a name="l00188"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a70c3c90bcb2318bb472cc9565751ff04"> 188</a></span> <span class="preprocessor">#define NVMCTRL_PARAM_RESETVALUE _U_(0x00060000) </span></div>
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<div class="line"><a name="l00190"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a08f9f5de86a6c44ce2d6ecdb9f995443"> 190</a></span> <span class="preprocessor">#define NVMCTRL_PARAM_NVMP_Pos 0 </span></div>
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<div class="line"><a name="l00191"></a><span class="lineno"> 191</span> <span class="preprocessor">#define NVMCTRL_PARAM_NVMP_Msk (_U_(0xFFFF) << NVMCTRL_PARAM_NVMP_Pos)</span></div>
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<div class="line"><a name="l00192"></a><span class="lineno"> 192</span> <span class="preprocessor">#define NVMCTRL_PARAM_NVMP(value) (NVMCTRL_PARAM_NVMP_Msk & ((value) << NVMCTRL_PARAM_NVMP_Pos))</span></div>
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<div class="line"><a name="l00193"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#abec5624158a60a0f0d0b8a62afe18af8"> 193</a></span> <span class="preprocessor">#define NVMCTRL_PARAM_PSZ_Pos 16 </span></div>
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<div class="line"><a name="l00194"></a><span class="lineno"> 194</span> <span class="preprocessor">#define NVMCTRL_PARAM_PSZ_Msk (_U_(0x7) << NVMCTRL_PARAM_PSZ_Pos)</span></div>
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<div class="line"><a name="l00195"></a><span class="lineno"> 195</span> <span class="preprocessor">#define NVMCTRL_PARAM_PSZ(value) (NVMCTRL_PARAM_PSZ_Msk & ((value) << NVMCTRL_PARAM_PSZ_Pos))</span></div>
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<div class="line"><a name="l00196"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a9a83c6574dc48ac1c69701673922d2f3"> 196</a></span> <span class="preprocessor">#define NVMCTRL_PARAM_PSZ_8_Val _U_(0x0) </span></div>
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<div class="line"><a name="l00197"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a10b4a62c2bab14a45967ee663cfbdd10"> 197</a></span> <span class="preprocessor">#define NVMCTRL_PARAM_PSZ_16_Val _U_(0x1) </span></div>
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<div class="line"><a name="l00198"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ae80b28e70177db78d7d5a0d748809192"> 198</a></span> <span class="preprocessor">#define NVMCTRL_PARAM_PSZ_32_Val _U_(0x2) </span></div>
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<div class="line"><a name="l00199"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a464e20508682489f9283f535148c27b1"> 199</a></span> <span class="preprocessor">#define NVMCTRL_PARAM_PSZ_64_Val _U_(0x3) </span></div>
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<div class="line"><a name="l00200"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ac8f620598445b047b44dfc8081439744"> 200</a></span> <span class="preprocessor">#define NVMCTRL_PARAM_PSZ_128_Val _U_(0x4) </span></div>
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<div class="line"><a name="l00201"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a7f53d9c6161bf83ef35275e90438e9e2"> 201</a></span> <span class="preprocessor">#define NVMCTRL_PARAM_PSZ_256_Val _U_(0x5) </span></div>
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<div class="line"><a name="l00202"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ac19388a03c011b81e82b35dfd7da69b1"> 202</a></span> <span class="preprocessor">#define NVMCTRL_PARAM_PSZ_512_Val _U_(0x6) </span></div>
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<div class="line"><a name="l00203"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a7bffb82ccc9a71552882baabdfa97b13"> 203</a></span> <span class="preprocessor">#define NVMCTRL_PARAM_PSZ_1024_Val _U_(0x7) </span></div>
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<div class="line"><a name="l00204"></a><span class="lineno"> 204</span> <span class="preprocessor">#define NVMCTRL_PARAM_PSZ_8 (NVMCTRL_PARAM_PSZ_8_Val << NVMCTRL_PARAM_PSZ_Pos)</span></div>
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<div class="line"><a name="l00205"></a><span class="lineno"> 205</span> <span class="preprocessor">#define NVMCTRL_PARAM_PSZ_16 (NVMCTRL_PARAM_PSZ_16_Val << NVMCTRL_PARAM_PSZ_Pos)</span></div>
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<div class="line"><a name="l00206"></a><span class="lineno"> 206</span> <span class="preprocessor">#define NVMCTRL_PARAM_PSZ_32 (NVMCTRL_PARAM_PSZ_32_Val << NVMCTRL_PARAM_PSZ_Pos)</span></div>
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<div class="line"><a name="l00207"></a><span class="lineno"> 207</span> <span class="preprocessor">#define NVMCTRL_PARAM_PSZ_64 (NVMCTRL_PARAM_PSZ_64_Val << NVMCTRL_PARAM_PSZ_Pos)</span></div>
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<div class="line"><a name="l00208"></a><span class="lineno"> 208</span> <span class="preprocessor">#define NVMCTRL_PARAM_PSZ_128 (NVMCTRL_PARAM_PSZ_128_Val << NVMCTRL_PARAM_PSZ_Pos)</span></div>
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<div class="line"><a name="l00209"></a><span class="lineno"> 209</span> <span class="preprocessor">#define NVMCTRL_PARAM_PSZ_256 (NVMCTRL_PARAM_PSZ_256_Val << NVMCTRL_PARAM_PSZ_Pos)</span></div>
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<div class="line"><a name="l00210"></a><span class="lineno"> 210</span> <span class="preprocessor">#define NVMCTRL_PARAM_PSZ_512 (NVMCTRL_PARAM_PSZ_512_Val << NVMCTRL_PARAM_PSZ_Pos)</span></div>
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<div class="line"><a name="l00211"></a><span class="lineno"> 211</span> <span class="preprocessor">#define NVMCTRL_PARAM_PSZ_1024 (NVMCTRL_PARAM_PSZ_1024_Val << NVMCTRL_PARAM_PSZ_Pos)</span></div>
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<div class="line"><a name="l00212"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ae0b8f7fc4e55aa43cca20f4c373aa876"> 212</a></span> <span class="preprocessor">#define NVMCTRL_PARAM_SEE_Pos 31 </span></div>
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<div class="line"><a name="l00213"></a><span class="lineno"> 213</span> <span class="preprocessor">#define NVMCTRL_PARAM_SEE (_U_(0x1) << NVMCTRL_PARAM_SEE_Pos)</span></div>
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<div class="line"><a name="l00214"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aadfbc70cd6cbb088b215b8e6322c4295"> 214</a></span> <span class="preprocessor">#define NVMCTRL_PARAM_MASK _U_(0x8007FFFF) </span></div>
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<div class="line"><a name="l00216"></a><span class="lineno"> 216</span> <span class="preprocessor"></span><span class="comment">/* -------- NVMCTRL_INTENCLR : (NVMCTRL Offset: 0x0C) (R/W 16) Interrupt Enable Clear -------- */</span><span class="preprocessor"></span></div>
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<div class="line"><a name="l00217"></a><span class="lineno"> 217</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
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<div class="line"><a name="l00218"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENCLR__Type.html"> 218</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
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<div class="line"><a name="l00219"></a><span class="lineno"> 219</span>  <span class="keyword">struct </span>{</div>
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<div class="line"><a name="l00220"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENCLR__Type.html#a8b41fdb24d215b802cd106422eb57615"> 220</a></span>  uint16_t <a class="code" href="unionNVMCTRL__INTENCLR__Type.html#a8b41fdb24d215b802cd106422eb57615">DONE</a>:1; </div>
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<div class="line"><a name="l00221"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENCLR__Type.html#a2cfa4ba94c13f8960beaf5459555d1d5"> 221</a></span>  uint16_t <a class="code" href="unionNVMCTRL__INTENCLR__Type.html#a2cfa4ba94c13f8960beaf5459555d1d5">ADDRE</a>:1; </div>
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<div class="line"><a name="l00222"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENCLR__Type.html#aed69c41dc59031c87a1df89d327ea2be"> 222</a></span>  uint16_t <a class="code" href="unionNVMCTRL__INTENCLR__Type.html#aed69c41dc59031c87a1df89d327ea2be">PROGE</a>:1; </div>
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<div class="line"><a name="l00223"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENCLR__Type.html#ad93e68e0100ba0b239128b23b3eab541"> 223</a></span>  uint16_t <a class="code" href="unionNVMCTRL__INTENCLR__Type.html#ad93e68e0100ba0b239128b23b3eab541">LOCKE</a>:1; </div>
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<div class="line"><a name="l00224"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENCLR__Type.html#a7310a69bb013cea08fac7c568d16bc53"> 224</a></span>  uint16_t <a class="code" href="unionNVMCTRL__INTENCLR__Type.html#a7310a69bb013cea08fac7c568d16bc53">ECCSE</a>:1; </div>
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<div class="line"><a name="l00225"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENCLR__Type.html#a8a2e5f922dcdf2760d124075e33c71b7"> 225</a></span>  uint16_t <a class="code" href="unionNVMCTRL__INTENCLR__Type.html#a8a2e5f922dcdf2760d124075e33c71b7">ECCDE</a>:1; </div>
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<div class="line"><a name="l00226"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENCLR__Type.html#ad8f42a0e30a1faa286a7ca808a63a7c0"> 226</a></span>  uint16_t <a class="code" href="unionNVMCTRL__INTENCLR__Type.html#ad8f42a0e30a1faa286a7ca808a63a7c0">NVME</a>:1; </div>
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<div class="line"><a name="l00227"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENCLR__Type.html#af25cfd3180fc6f4f819cbd4fa257e771"> 227</a></span>  uint16_t <a class="code" href="unionNVMCTRL__INTENCLR__Type.html#af25cfd3180fc6f4f819cbd4fa257e771">SUSP</a>:1; </div>
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<div class="line"><a name="l00228"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENCLR__Type.html#a575d7ed5e8b871be73fc81559a5fb9da"> 228</a></span>  uint16_t <a class="code" href="unionNVMCTRL__INTENCLR__Type.html#a575d7ed5e8b871be73fc81559a5fb9da">SEESFULL</a>:1; </div>
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<div class="line"><a name="l00229"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENCLR__Type.html#a1329af6b22aba94dbf2995040f43f081"> 229</a></span>  uint16_t <a class="code" href="unionNVMCTRL__INTENCLR__Type.html#a1329af6b22aba94dbf2995040f43f081">SEESOVF</a>:1; </div>
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<div class="line"><a name="l00230"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENCLR__Type.html#a9dab229444ed5f2d906a99473b04b9ae"> 230</a></span>  uint16_t <a class="code" href="unionNVMCTRL__INTENCLR__Type.html#a9dab229444ed5f2d906a99473b04b9ae">SEEWRC</a>:1; </div>
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<div class="line"><a name="l00231"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENCLR__Type.html#a28266ba0962ea2300d50b611c6e88c8b"> 231</a></span>  uint16_t :5; </div>
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<div class="line"><a name="l00232"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENCLR__Type.html#a52d8f93238f099846734e29aa9847594"> 232</a></span>  } bit; </div>
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<div class="line"><a name="l00233"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENCLR__Type.html#aba1d27ddfc21e516560e8a2dc3d88161"> 233</a></span>  uint16_t <a class="code" href="unionNVMCTRL__INTENCLR__Type.html#aba1d27ddfc21e516560e8a2dc3d88161">reg</a>; </div>
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<div class="line"><a name="l00234"></a><span class="lineno"> 234</span> } <a class="code" href="unionNVMCTRL__INTENCLR__Type.html">NVMCTRL_INTENCLR_Type</a>;</div>
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<div class="line"><a name="l00235"></a><span class="lineno"> 235</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
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<div class="line"><a name="l00236"></a><span class="lineno"> 236</span>  </div>
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<div class="line"><a name="l00237"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#af69e18ecea21ffbf47dc28f66161a768"> 237</a></span> <span class="preprocessor">#define NVMCTRL_INTENCLR_OFFSET 0x0C </span></div>
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<div class="line"><a name="l00238"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#acc5d7dab614b1d4e05402a8c97de3954"> 238</a></span> <span class="preprocessor">#define NVMCTRL_INTENCLR_RESETVALUE _U_(0x0000) </span></div>
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<div class="line"><a name="l00240"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ab303d4dd896628711c798a2d81c243e9"> 240</a></span> <span class="preprocessor">#define NVMCTRL_INTENCLR_DONE_Pos 0 </span></div>
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<div class="line"><a name="l00241"></a><span class="lineno"> 241</span> <span class="preprocessor">#define NVMCTRL_INTENCLR_DONE (_U_(0x1) << NVMCTRL_INTENCLR_DONE_Pos)</span></div>
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<div class="line"><a name="l00242"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a008fce13f42375fa0ec8dfa8ee6e25ad"> 242</a></span> <span class="preprocessor">#define NVMCTRL_INTENCLR_ADDRE_Pos 1 </span></div>
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<div class="line"><a name="l00243"></a><span class="lineno"> 243</span> <span class="preprocessor">#define NVMCTRL_INTENCLR_ADDRE (_U_(0x1) << NVMCTRL_INTENCLR_ADDRE_Pos)</span></div>
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<div class="line"><a name="l00244"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a52b68cb512c19b5711f09698f6b93493"> 244</a></span> <span class="preprocessor">#define NVMCTRL_INTENCLR_PROGE_Pos 2 </span></div>
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<div class="line"><a name="l00245"></a><span class="lineno"> 245</span> <span class="preprocessor">#define NVMCTRL_INTENCLR_PROGE (_U_(0x1) << NVMCTRL_INTENCLR_PROGE_Pos)</span></div>
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<div class="line"><a name="l00246"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ac1fa728d12605ea718efcc90936647d0"> 246</a></span> <span class="preprocessor">#define NVMCTRL_INTENCLR_LOCKE_Pos 3 </span></div>
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<div class="line"><a name="l00247"></a><span class="lineno"> 247</span> <span class="preprocessor">#define NVMCTRL_INTENCLR_LOCKE (_U_(0x1) << NVMCTRL_INTENCLR_LOCKE_Pos)</span></div>
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<div class="line"><a name="l00248"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a86ceb9ac83904784c8ad062991023a48"> 248</a></span> <span class="preprocessor">#define NVMCTRL_INTENCLR_ECCSE_Pos 4 </span></div>
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<div class="line"><a name="l00249"></a><span class="lineno"> 249</span> <span class="preprocessor">#define NVMCTRL_INTENCLR_ECCSE (_U_(0x1) << NVMCTRL_INTENCLR_ECCSE_Pos)</span></div>
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<div class="line"><a name="l00250"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a014cf0f8bd9d879896f26f9aa95b1d5f"> 250</a></span> <span class="preprocessor">#define NVMCTRL_INTENCLR_ECCDE_Pos 5 </span></div>
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<div class="line"><a name="l00251"></a><span class="lineno"> 251</span> <span class="preprocessor">#define NVMCTRL_INTENCLR_ECCDE (_U_(0x1) << NVMCTRL_INTENCLR_ECCDE_Pos)</span></div>
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<div class="line"><a name="l00252"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#af50b2e19d9eafcb99eb73dc8e63236d9"> 252</a></span> <span class="preprocessor">#define NVMCTRL_INTENCLR_NVME_Pos 6 </span></div>
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<div class="line"><a name="l00253"></a><span class="lineno"> 253</span> <span class="preprocessor">#define NVMCTRL_INTENCLR_NVME (_U_(0x1) << NVMCTRL_INTENCLR_NVME_Pos)</span></div>
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<div class="line"><a name="l00254"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a8c0417f3d672b2fd21a2864eb416d1f8"> 254</a></span> <span class="preprocessor">#define NVMCTRL_INTENCLR_SUSP_Pos 7 </span></div>
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<div class="line"><a name="l00255"></a><span class="lineno"> 255</span> <span class="preprocessor">#define NVMCTRL_INTENCLR_SUSP (_U_(0x1) << NVMCTRL_INTENCLR_SUSP_Pos)</span></div>
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<div class="line"><a name="l00256"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a1790fb571650fdddf88e6901335be515"> 256</a></span> <span class="preprocessor">#define NVMCTRL_INTENCLR_SEESFULL_Pos 8 </span></div>
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<div class="line"><a name="l00257"></a><span class="lineno"> 257</span> <span class="preprocessor">#define NVMCTRL_INTENCLR_SEESFULL (_U_(0x1) << NVMCTRL_INTENCLR_SEESFULL_Pos)</span></div>
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<div class="line"><a name="l00258"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a743129233f8516c29b12e381951077dd"> 258</a></span> <span class="preprocessor">#define NVMCTRL_INTENCLR_SEESOVF_Pos 9 </span></div>
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<div class="line"><a name="l00259"></a><span class="lineno"> 259</span> <span class="preprocessor">#define NVMCTRL_INTENCLR_SEESOVF (_U_(0x1) << NVMCTRL_INTENCLR_SEESOVF_Pos)</span></div>
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<div class="line"><a name="l00260"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#af2ac2b08e506101132051821be8847c2"> 260</a></span> <span class="preprocessor">#define NVMCTRL_INTENCLR_SEEWRC_Pos 10 </span></div>
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<div class="line"><a name="l00261"></a><span class="lineno"> 261</span> <span class="preprocessor">#define NVMCTRL_INTENCLR_SEEWRC (_U_(0x1) << NVMCTRL_INTENCLR_SEEWRC_Pos)</span></div>
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<div class="line"><a name="l00262"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a399cac515ae8b6bfd864314732defbe9"> 262</a></span> <span class="preprocessor">#define NVMCTRL_INTENCLR_MASK _U_(0x07FF) </span></div>
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<div class="line"><a name="l00264"></a><span class="lineno"> 264</span> <span class="preprocessor"></span><span class="comment">/* -------- NVMCTRL_INTENSET : (NVMCTRL Offset: 0x0E) (R/W 16) Interrupt Enable Set -------- */</span><span class="preprocessor"></span></div>
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<div class="line"><a name="l00265"></a><span class="lineno"> 265</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
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<div class="line"><a name="l00266"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENSET__Type.html"> 266</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
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<div class="line"><a name="l00267"></a><span class="lineno"> 267</span>  <span class="keyword">struct </span>{</div>
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<div class="line"><a name="l00268"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENSET__Type.html#a7e11e9831f0d712a0570fc5b8e157a80"> 268</a></span>  uint16_t <a class="code" href="unionNVMCTRL__INTENSET__Type.html#a7e11e9831f0d712a0570fc5b8e157a80">DONE</a>:1; </div>
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<div class="line"><a name="l00269"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENSET__Type.html#aad10b082b6189e41f108d5c40141f90f"> 269</a></span>  uint16_t <a class="code" href="unionNVMCTRL__INTENSET__Type.html#aad10b082b6189e41f108d5c40141f90f">ADDRE</a>:1; </div>
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<div class="line"><a name="l00270"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENSET__Type.html#a9b285721f768f3be959b53ecfc8e29e3"> 270</a></span>  uint16_t <a class="code" href="unionNVMCTRL__INTENSET__Type.html#a9b285721f768f3be959b53ecfc8e29e3">PROGE</a>:1; </div>
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<div class="line"><a name="l00271"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENSET__Type.html#a7a3225bbceed8f691b9d2815e3cead70"> 271</a></span>  uint16_t <a class="code" href="unionNVMCTRL__INTENSET__Type.html#a7a3225bbceed8f691b9d2815e3cead70">LOCKE</a>:1; </div>
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<div class="line"><a name="l00272"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENSET__Type.html#a2f4b33b3e2534635fc995f490084b8f2"> 272</a></span>  uint16_t <a class="code" href="unionNVMCTRL__INTENSET__Type.html#a2f4b33b3e2534635fc995f490084b8f2">ECCSE</a>:1; </div>
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<div class="line"><a name="l00273"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENSET__Type.html#a677dfd10acf0011a22ee327a89a9363b"> 273</a></span>  uint16_t <a class="code" href="unionNVMCTRL__INTENSET__Type.html#a677dfd10acf0011a22ee327a89a9363b">ECCDE</a>:1; </div>
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<div class="line"><a name="l00274"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENSET__Type.html#a3453ea9b60b5aab08ac77b077050d18c"> 274</a></span>  uint16_t <a class="code" href="unionNVMCTRL__INTENSET__Type.html#a3453ea9b60b5aab08ac77b077050d18c">NVME</a>:1; </div>
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<div class="line"><a name="l00275"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENSET__Type.html#a367a53f996895c84cc7772398c60d03b"> 275</a></span>  uint16_t <a class="code" href="unionNVMCTRL__INTENSET__Type.html#a367a53f996895c84cc7772398c60d03b">SUSP</a>:1; </div>
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<div class="line"><a name="l00276"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENSET__Type.html#a0d4f7db8fe0470fd5642e4d0b284f8b4"> 276</a></span>  uint16_t <a class="code" href="unionNVMCTRL__INTENSET__Type.html#a0d4f7db8fe0470fd5642e4d0b284f8b4">SEESFULL</a>:1; </div>
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<div class="line"><a name="l00277"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENSET__Type.html#abf97f6c7c80d31d7a6d1b2f513166dad"> 277</a></span>  uint16_t <a class="code" href="unionNVMCTRL__INTENSET__Type.html#abf97f6c7c80d31d7a6d1b2f513166dad">SEESOVF</a>:1; </div>
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<div class="line"><a name="l00278"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENSET__Type.html#a9ac58004be432a1220e42351e8e081aa"> 278</a></span>  uint16_t <a class="code" href="unionNVMCTRL__INTENSET__Type.html#a9ac58004be432a1220e42351e8e081aa">SEEWRC</a>:1; </div>
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<div class="line"><a name="l00279"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENSET__Type.html#ae0c7109506ed899029818ba4515b26c9"> 279</a></span>  uint16_t :5; </div>
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<div class="line"><a name="l00280"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENSET__Type.html#a8d477a4d482e43ce20935ea549558da8"> 280</a></span>  } bit; </div>
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<div class="line"><a name="l00281"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTENSET__Type.html#afd3d225c78e3421a2006e6b9ff886d46"> 281</a></span>  uint16_t <a class="code" href="unionNVMCTRL__INTENSET__Type.html#afd3d225c78e3421a2006e6b9ff886d46">reg</a>; </div>
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<div class="line"><a name="l00282"></a><span class="lineno"> 282</span> } <a class="code" href="unionNVMCTRL__INTENSET__Type.html">NVMCTRL_INTENSET_Type</a>;</div>
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<div class="line"><a name="l00283"></a><span class="lineno"> 283</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
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<div class="line"><a name="l00284"></a><span class="lineno"> 284</span>  </div>
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<div class="line"><a name="l00285"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#acbc15881a076ca6d111540304e571a20"> 285</a></span> <span class="preprocessor">#define NVMCTRL_INTENSET_OFFSET 0x0E </span></div>
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<div class="line"><a name="l00286"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ad48eea420ef04c6f0c75a074991ad6d6"> 286</a></span> <span class="preprocessor">#define NVMCTRL_INTENSET_RESETVALUE _U_(0x0000) </span></div>
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<div class="line"><a name="l00288"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a0a8101c9e2b9d16bc4a8a1edbb3ff97a"> 288</a></span> <span class="preprocessor">#define NVMCTRL_INTENSET_DONE_Pos 0 </span></div>
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<div class="line"><a name="l00289"></a><span class="lineno"> 289</span> <span class="preprocessor">#define NVMCTRL_INTENSET_DONE (_U_(0x1) << NVMCTRL_INTENSET_DONE_Pos)</span></div>
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<div class="line"><a name="l00290"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a7ce68e10f261102ba48b958d85fa3e97"> 290</a></span> <span class="preprocessor">#define NVMCTRL_INTENSET_ADDRE_Pos 1 </span></div>
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<div class="line"><a name="l00291"></a><span class="lineno"> 291</span> <span class="preprocessor">#define NVMCTRL_INTENSET_ADDRE (_U_(0x1) << NVMCTRL_INTENSET_ADDRE_Pos)</span></div>
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<div class="line"><a name="l00292"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ab0e7649e23ebb619b9f3cba68aa1650e"> 292</a></span> <span class="preprocessor">#define NVMCTRL_INTENSET_PROGE_Pos 2 </span></div>
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<div class="line"><a name="l00293"></a><span class="lineno"> 293</span> <span class="preprocessor">#define NVMCTRL_INTENSET_PROGE (_U_(0x1) << NVMCTRL_INTENSET_PROGE_Pos)</span></div>
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<div class="line"><a name="l00294"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a83f6cb52007a64ba21de6b059c78a530"> 294</a></span> <span class="preprocessor">#define NVMCTRL_INTENSET_LOCKE_Pos 3 </span></div>
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<div class="line"><a name="l00295"></a><span class="lineno"> 295</span> <span class="preprocessor">#define NVMCTRL_INTENSET_LOCKE (_U_(0x1) << NVMCTRL_INTENSET_LOCKE_Pos)</span></div>
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<div class="line"><a name="l00296"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ae004bc06eb8e11c5a364b0de5edf369f"> 296</a></span> <span class="preprocessor">#define NVMCTRL_INTENSET_ECCSE_Pos 4 </span></div>
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<div class="line"><a name="l00297"></a><span class="lineno"> 297</span> <span class="preprocessor">#define NVMCTRL_INTENSET_ECCSE (_U_(0x1) << NVMCTRL_INTENSET_ECCSE_Pos)</span></div>
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<div class="line"><a name="l00298"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aaf23d6f9f57daf3723ba6c3bf85a1ffd"> 298</a></span> <span class="preprocessor">#define NVMCTRL_INTENSET_ECCDE_Pos 5 </span></div>
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<div class="line"><a name="l00299"></a><span class="lineno"> 299</span> <span class="preprocessor">#define NVMCTRL_INTENSET_ECCDE (_U_(0x1) << NVMCTRL_INTENSET_ECCDE_Pos)</span></div>
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<div class="line"><a name="l00300"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a05655c435fcc534d5b7aee5f88809a70"> 300</a></span> <span class="preprocessor">#define NVMCTRL_INTENSET_NVME_Pos 6 </span></div>
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<div class="line"><a name="l00301"></a><span class="lineno"> 301</span> <span class="preprocessor">#define NVMCTRL_INTENSET_NVME (_U_(0x1) << NVMCTRL_INTENSET_NVME_Pos)</span></div>
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<div class="line"><a name="l00302"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a59b343b6ae84f68d8b6e2230f88fbd0d"> 302</a></span> <span class="preprocessor">#define NVMCTRL_INTENSET_SUSP_Pos 7 </span></div>
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<div class="line"><a name="l00303"></a><span class="lineno"> 303</span> <span class="preprocessor">#define NVMCTRL_INTENSET_SUSP (_U_(0x1) << NVMCTRL_INTENSET_SUSP_Pos)</span></div>
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<div class="line"><a name="l00304"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a7114d359880d3c94e97b543c6e6ea9cf"> 304</a></span> <span class="preprocessor">#define NVMCTRL_INTENSET_SEESFULL_Pos 8 </span></div>
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<div class="line"><a name="l00305"></a><span class="lineno"> 305</span> <span class="preprocessor">#define NVMCTRL_INTENSET_SEESFULL (_U_(0x1) << NVMCTRL_INTENSET_SEESFULL_Pos)</span></div>
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<div class="line"><a name="l00306"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a98a8f6fcee8a62386dbc640ad5e1979e"> 306</a></span> <span class="preprocessor">#define NVMCTRL_INTENSET_SEESOVF_Pos 9 </span></div>
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<div class="line"><a name="l00307"></a><span class="lineno"> 307</span> <span class="preprocessor">#define NVMCTRL_INTENSET_SEESOVF (_U_(0x1) << NVMCTRL_INTENSET_SEESOVF_Pos)</span></div>
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<div class="line"><a name="l00308"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#af1c59aa0745e03430697b51742b6c2ba"> 308</a></span> <span class="preprocessor">#define NVMCTRL_INTENSET_SEEWRC_Pos 10 </span></div>
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<div class="line"><a name="l00309"></a><span class="lineno"> 309</span> <span class="preprocessor">#define NVMCTRL_INTENSET_SEEWRC (_U_(0x1) << NVMCTRL_INTENSET_SEEWRC_Pos)</span></div>
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<div class="line"><a name="l00310"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ac49294b6f689477f53cabe7aba8a4975"> 310</a></span> <span class="preprocessor">#define NVMCTRL_INTENSET_MASK _U_(0x07FF) </span></div>
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<div class="line"><a name="l00312"></a><span class="lineno"> 312</span> <span class="preprocessor"></span><span class="comment">/* -------- NVMCTRL_INTFLAG : (NVMCTRL Offset: 0x10) (R/W 16) Interrupt Flag Status and Clear -------- */</span><span class="preprocessor"></span></div>
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<div class="line"><a name="l00313"></a><span class="lineno"> 313</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
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<div class="line"><a name="l00314"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTFLAG__Type.html"> 314</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{ <span class="comment">// __I to avoid read-modify-write on write-to-clear register</span></div>
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<div class="line"><a name="l00315"></a><span class="lineno"> 315</span>  <span class="keyword">struct </span>{</div>
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<div class="line"><a name="l00316"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTFLAG__Type.html#a48c18d7fcb2b36e3f944962d2c26d17f"> 316</a></span>  __I uint16_t <a class="code" href="unionNVMCTRL__INTFLAG__Type.html#a48c18d7fcb2b36e3f944962d2c26d17f">DONE</a>:1; </div>
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<div class="line"><a name="l00317"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTFLAG__Type.html#a188f8921aa82b38489c488cfb99d23f0"> 317</a></span>  __I uint16_t <a class="code" href="unionNVMCTRL__INTFLAG__Type.html#a188f8921aa82b38489c488cfb99d23f0">ADDRE</a>:1; </div>
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<div class="line"><a name="l00318"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTFLAG__Type.html#ae67c4f1da3c4d05980e4bfa83b9e93a6"> 318</a></span>  __I uint16_t <a class="code" href="unionNVMCTRL__INTFLAG__Type.html#ae67c4f1da3c4d05980e4bfa83b9e93a6">PROGE</a>:1; </div>
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<div class="line"><a name="l00319"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTFLAG__Type.html#a5a443103568d0046dc08455295d84a97"> 319</a></span>  __I uint16_t <a class="code" href="unionNVMCTRL__INTFLAG__Type.html#a5a443103568d0046dc08455295d84a97">LOCKE</a>:1; </div>
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<div class="line"><a name="l00320"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTFLAG__Type.html#a0d371834ecd67b4fb96be92170e7f224"> 320</a></span>  __I uint16_t <a class="code" href="unionNVMCTRL__INTFLAG__Type.html#a0d371834ecd67b4fb96be92170e7f224">ECCSE</a>:1; </div>
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<div class="line"><a name="l00321"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTFLAG__Type.html#a92db228f6b2718ed73777e16b3d3cd77"> 321</a></span>  __I uint16_t <a class="code" href="unionNVMCTRL__INTFLAG__Type.html#a92db228f6b2718ed73777e16b3d3cd77">ECCDE</a>:1; </div>
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<div class="line"><a name="l00322"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTFLAG__Type.html#a3c01595f7b8459a0a7abd00360e82415"> 322</a></span>  __I uint16_t <a class="code" href="unionNVMCTRL__INTFLAG__Type.html#a3c01595f7b8459a0a7abd00360e82415">NVME</a>:1; </div>
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<div class="line"><a name="l00323"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTFLAG__Type.html#a76ef563bd656f0edc99b3957cb49161f"> 323</a></span>  __I uint16_t <a class="code" href="unionNVMCTRL__INTFLAG__Type.html#a76ef563bd656f0edc99b3957cb49161f">SUSP</a>:1; </div>
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<div class="line"><a name="l00324"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTFLAG__Type.html#a32367491ed93c4ae3e6d3ceea8a42dc1"> 324</a></span>  __I uint16_t <a class="code" href="unionNVMCTRL__INTFLAG__Type.html#a32367491ed93c4ae3e6d3ceea8a42dc1">SEESFULL</a>:1; </div>
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<div class="line"><a name="l00325"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTFLAG__Type.html#ad003775067789cc5ad149fc566d26f20"> 325</a></span>  __I uint16_t <a class="code" href="unionNVMCTRL__INTFLAG__Type.html#ad003775067789cc5ad149fc566d26f20">SEESOVF</a>:1; </div>
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<div class="line"><a name="l00326"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTFLAG__Type.html#a27460c6fb274bc39d76ed2b04bef2c71"> 326</a></span>  __I uint16_t <a class="code" href="unionNVMCTRL__INTFLAG__Type.html#a27460c6fb274bc39d76ed2b04bef2c71">SEEWRC</a>:1; </div>
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<div class="line"><a name="l00327"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTFLAG__Type.html#a2068f7322f5e7cd6a878a080cbb3a821"> 327</a></span>  __I <a class="code" href="unionNVMCTRL__INTFLAG__Type.html#a2068f7322f5e7cd6a878a080cbb3a821">uint16_t</a> :5; </div>
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<div class="line"><a name="l00328"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTFLAG__Type.html#a71d001e05a3746ced49c3ff426717c79"> 328</a></span>  } bit; </div>
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<div class="line"><a name="l00329"></a><span class="lineno"><a class="line" href="unionNVMCTRL__INTFLAG__Type.html#a38a533c4983dfddb4d193687550e384f"> 329</a></span>  uint16_t <a class="code" href="unionNVMCTRL__INTFLAG__Type.html#a38a533c4983dfddb4d193687550e384f">reg</a>; </div>
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<div class="line"><a name="l00330"></a><span class="lineno"> 330</span> } <a class="code" href="unionNVMCTRL__INTFLAG__Type.html">NVMCTRL_INTFLAG_Type</a>;</div>
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<div class="line"><a name="l00331"></a><span class="lineno"> 331</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
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<div class="line"><a name="l00332"></a><span class="lineno"> 332</span>  </div>
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<div class="line"><a name="l00333"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a28bff79f1cf058fa8a6c7072f5913862"> 333</a></span> <span class="preprocessor">#define NVMCTRL_INTFLAG_OFFSET 0x10 </span></div>
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<div class="line"><a name="l00334"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a2d7e54384a5f6445cc9b9769ddf32ac2"> 334</a></span> <span class="preprocessor">#define NVMCTRL_INTFLAG_RESETVALUE _U_(0x0000) </span></div>
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<div class="line"><a name="l00336"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a22999317a65e0e9d3222617351fc58d1"> 336</a></span> <span class="preprocessor">#define NVMCTRL_INTFLAG_DONE_Pos 0 </span></div>
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<div class="line"><a name="l00337"></a><span class="lineno"> 337</span> <span class="preprocessor">#define NVMCTRL_INTFLAG_DONE (_U_(0x1) << NVMCTRL_INTFLAG_DONE_Pos)</span></div>
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<div class="line"><a name="l00338"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a108e21dc370bd9b52bd26614cdf00631"> 338</a></span> <span class="preprocessor">#define NVMCTRL_INTFLAG_ADDRE_Pos 1 </span></div>
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<div class="line"><a name="l00339"></a><span class="lineno"> 339</span> <span class="preprocessor">#define NVMCTRL_INTFLAG_ADDRE (_U_(0x1) << NVMCTRL_INTFLAG_ADDRE_Pos)</span></div>
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<div class="line"><a name="l00340"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a07cf1320b7671fcff3ed627f6ebb852f"> 340</a></span> <span class="preprocessor">#define NVMCTRL_INTFLAG_PROGE_Pos 2 </span></div>
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<div class="line"><a name="l00341"></a><span class="lineno"> 341</span> <span class="preprocessor">#define NVMCTRL_INTFLAG_PROGE (_U_(0x1) << NVMCTRL_INTFLAG_PROGE_Pos)</span></div>
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<div class="line"><a name="l00342"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a46d0a99797eecef352c91b78662af79b"> 342</a></span> <span class="preprocessor">#define NVMCTRL_INTFLAG_LOCKE_Pos 3 </span></div>
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<div class="line"><a name="l00343"></a><span class="lineno"> 343</span> <span class="preprocessor">#define NVMCTRL_INTFLAG_LOCKE (_U_(0x1) << NVMCTRL_INTFLAG_LOCKE_Pos)</span></div>
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<div class="line"><a name="l00344"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aff9c4e86b71922736f8e53c1cd89eb9f"> 344</a></span> <span class="preprocessor">#define NVMCTRL_INTFLAG_ECCSE_Pos 4 </span></div>
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<div class="line"><a name="l00345"></a><span class="lineno"> 345</span> <span class="preprocessor">#define NVMCTRL_INTFLAG_ECCSE (_U_(0x1) << NVMCTRL_INTFLAG_ECCSE_Pos)</span></div>
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<div class="line"><a name="l00346"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a9080bb2d763386195ec46a250d7a2089"> 346</a></span> <span class="preprocessor">#define NVMCTRL_INTFLAG_ECCDE_Pos 5 </span></div>
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<div class="line"><a name="l00347"></a><span class="lineno"> 347</span> <span class="preprocessor">#define NVMCTRL_INTFLAG_ECCDE (_U_(0x1) << NVMCTRL_INTFLAG_ECCDE_Pos)</span></div>
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<div class="line"><a name="l00348"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aa646db9f5e0c170cbd083c99061dab17"> 348</a></span> <span class="preprocessor">#define NVMCTRL_INTFLAG_NVME_Pos 6 </span></div>
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<div class="line"><a name="l00349"></a><span class="lineno"> 349</span> <span class="preprocessor">#define NVMCTRL_INTFLAG_NVME (_U_(0x1) << NVMCTRL_INTFLAG_NVME_Pos)</span></div>
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<div class="line"><a name="l00350"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a17ec7a0341ec9fb5fee40c713c541340"> 350</a></span> <span class="preprocessor">#define NVMCTRL_INTFLAG_SUSP_Pos 7 </span></div>
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<div class="line"><a name="l00351"></a><span class="lineno"> 351</span> <span class="preprocessor">#define NVMCTRL_INTFLAG_SUSP (_U_(0x1) << NVMCTRL_INTFLAG_SUSP_Pos)</span></div>
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<div class="line"><a name="l00352"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a760882172efec65a277f3e50784f37ca"> 352</a></span> <span class="preprocessor">#define NVMCTRL_INTFLAG_SEESFULL_Pos 8 </span></div>
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<div class="line"><a name="l00353"></a><span class="lineno"> 353</span> <span class="preprocessor">#define NVMCTRL_INTFLAG_SEESFULL (_U_(0x1) << NVMCTRL_INTFLAG_SEESFULL_Pos)</span></div>
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<div class="line"><a name="l00354"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a1afdc393e53f834691319e75098b3fef"> 354</a></span> <span class="preprocessor">#define NVMCTRL_INTFLAG_SEESOVF_Pos 9 </span></div>
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<div class="line"><a name="l00355"></a><span class="lineno"> 355</span> <span class="preprocessor">#define NVMCTRL_INTFLAG_SEESOVF (_U_(0x1) << NVMCTRL_INTFLAG_SEESOVF_Pos)</span></div>
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<div class="line"><a name="l00356"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ad9fa2489bdc30ba3b9d5eef8c50551a6"> 356</a></span> <span class="preprocessor">#define NVMCTRL_INTFLAG_SEEWRC_Pos 10 </span></div>
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<div class="line"><a name="l00357"></a><span class="lineno"> 357</span> <span class="preprocessor">#define NVMCTRL_INTFLAG_SEEWRC (_U_(0x1) << NVMCTRL_INTFLAG_SEEWRC_Pos)</span></div>
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<div class="line"><a name="l00358"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a77cb82e875b1988ba35455d842df74c5"> 358</a></span> <span class="preprocessor">#define NVMCTRL_INTFLAG_MASK _U_(0x07FF) </span></div>
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<div class="line"><a name="l00360"></a><span class="lineno"> 360</span> <span class="preprocessor"></span><span class="comment">/* -------- NVMCTRL_STATUS : (NVMCTRL Offset: 0x12) (R/ 16) Status -------- */</span><span class="preprocessor"></span></div>
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<div class="line"><a name="l00361"></a><span class="lineno"> 361</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
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<div class="line"><a name="l00362"></a><span class="lineno"><a class="line" href="unionNVMCTRL__STATUS__Type.html"> 362</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
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<div class="line"><a name="l00363"></a><span class="lineno"> 363</span>  <span class="keyword">struct </span>{</div>
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<div class="line"><a name="l00364"></a><span class="lineno"><a class="line" href="unionNVMCTRL__STATUS__Type.html#a66acfd78762a55db4016c1e9fbf0202a"> 364</a></span>  uint16_t <a class="code" href="unionNVMCTRL__STATUS__Type.html#a66acfd78762a55db4016c1e9fbf0202a">READY</a>:1; </div>
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<div class="line"><a name="l00365"></a><span class="lineno"><a class="line" href="unionNVMCTRL__STATUS__Type.html#ad39e4a3b2f9024bf91b70d5eafe0e89e"> 365</a></span>  uint16_t <a class="code" href="unionNVMCTRL__STATUS__Type.html#ad39e4a3b2f9024bf91b70d5eafe0e89e">PRM</a>:1; </div>
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<div class="line"><a name="l00366"></a><span class="lineno"><a class="line" href="unionNVMCTRL__STATUS__Type.html#adafdfedd11c1fb246fa0642d6c125578"> 366</a></span>  uint16_t <a class="code" href="unionNVMCTRL__STATUS__Type.html#adafdfedd11c1fb246fa0642d6c125578">LOAD</a>:1; </div>
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<div class="line"><a name="l00367"></a><span class="lineno"><a class="line" href="unionNVMCTRL__STATUS__Type.html#a11050531ff42aa856c76f8d3b13085f5"> 367</a></span>  uint16_t <a class="code" href="unionNVMCTRL__STATUS__Type.html#a11050531ff42aa856c76f8d3b13085f5">SUSP</a>:1; </div>
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<div class="line"><a name="l00368"></a><span class="lineno"><a class="line" href="unionNVMCTRL__STATUS__Type.html#a0009e30c81ab96efe592d8ef9162d222"> 368</a></span>  uint16_t <a class="code" href="unionNVMCTRL__STATUS__Type.html#a0009e30c81ab96efe592d8ef9162d222">AFIRST</a>:1; </div>
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<div class="line"><a name="l00369"></a><span class="lineno"><a class="line" href="unionNVMCTRL__STATUS__Type.html#a2547800604ca06aaca17fb314cc49617"> 369</a></span>  uint16_t <a class="code" href="unionNVMCTRL__STATUS__Type.html#a2547800604ca06aaca17fb314cc49617">BPDIS</a>:1; </div>
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<div class="line"><a name="l00370"></a><span class="lineno"><a class="line" href="unionNVMCTRL__STATUS__Type.html#af5c1d28d38e931800eec41e645064480"> 370</a></span>  uint16_t :2; </div>
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<div class="line"><a name="l00371"></a><span class="lineno"><a class="line" href="unionNVMCTRL__STATUS__Type.html#ac07c84bc4802900526d4433e00e8f472"> 371</a></span>  uint16_t <a class="code" href="unionNVMCTRL__STATUS__Type.html#ac07c84bc4802900526d4433e00e8f472">BOOTPROT</a>:4; </div>
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<div class="line"><a name="l00372"></a><span class="lineno"><a class="line" href="unionNVMCTRL__STATUS__Type.html#aafbdd9b58eeed6a60c17b2b6a8f664a3"> 372</a></span>  uint16_t :4; </div>
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<div class="line"><a name="l00373"></a><span class="lineno"><a class="line" href="unionNVMCTRL__STATUS__Type.html#a2d4c494756cf7d62cd9703967394eb7f"> 373</a></span>  } bit; </div>
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<div class="line"><a name="l00374"></a><span class="lineno"><a class="line" href="unionNVMCTRL__STATUS__Type.html#a2468e44fa0ad23c3c9f3105774e3c77d"> 374</a></span>  uint16_t <a class="code" href="unionNVMCTRL__STATUS__Type.html#a2468e44fa0ad23c3c9f3105774e3c77d">reg</a>; </div>
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<div class="line"><a name="l00375"></a><span class="lineno"> 375</span> } <a class="code" href="unionNVMCTRL__STATUS__Type.html">NVMCTRL_STATUS_Type</a>;</div>
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<div class="line"><a name="l00376"></a><span class="lineno"> 376</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
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<div class="line"><a name="l00377"></a><span class="lineno"> 377</span>  </div>
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<div class="line"><a name="l00378"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aa210cb991451778d9df1a804b189799a"> 378</a></span> <span class="preprocessor">#define NVMCTRL_STATUS_OFFSET 0x12 </span></div>
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<div class="line"><a name="l00379"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ac30e36e00c486c218383a4d318fe59c8"> 379</a></span> <span class="preprocessor">#define NVMCTRL_STATUS_RESETVALUE _U_(0x0000) </span></div>
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<div class="line"><a name="l00381"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a6a3182ad9c4d093efbe119b510b43c39"> 381</a></span> <span class="preprocessor">#define NVMCTRL_STATUS_READY_Pos 0 </span></div>
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<div class="line"><a name="l00382"></a><span class="lineno"> 382</span> <span class="preprocessor">#define NVMCTRL_STATUS_READY (_U_(0x1) << NVMCTRL_STATUS_READY_Pos)</span></div>
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<div class="line"><a name="l00383"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ab7f1c04b15d3c4fc8c9ab4bfbfd0731c"> 383</a></span> <span class="preprocessor">#define NVMCTRL_STATUS_PRM_Pos 1 </span></div>
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<div class="line"><a name="l00384"></a><span class="lineno"> 384</span> <span class="preprocessor">#define NVMCTRL_STATUS_PRM (_U_(0x1) << NVMCTRL_STATUS_PRM_Pos)</span></div>
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<div class="line"><a name="l00385"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#af65957fca966956aebcb205a480376cf"> 385</a></span> <span class="preprocessor">#define NVMCTRL_STATUS_LOAD_Pos 2 </span></div>
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<div class="line"><a name="l00386"></a><span class="lineno"> 386</span> <span class="preprocessor">#define NVMCTRL_STATUS_LOAD (_U_(0x1) << NVMCTRL_STATUS_LOAD_Pos)</span></div>
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<div class="line"><a name="l00387"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a204d7eb1505d3f46301eb0f829b977bd"> 387</a></span> <span class="preprocessor">#define NVMCTRL_STATUS_SUSP_Pos 3 </span></div>
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<div class="line"><a name="l00388"></a><span class="lineno"> 388</span> <span class="preprocessor">#define NVMCTRL_STATUS_SUSP (_U_(0x1) << NVMCTRL_STATUS_SUSP_Pos)</span></div>
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<div class="line"><a name="l00389"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a8f50070babdcab2c53fdc877caad306f"> 389</a></span> <span class="preprocessor">#define NVMCTRL_STATUS_AFIRST_Pos 4 </span></div>
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<div class="line"><a name="l00390"></a><span class="lineno"> 390</span> <span class="preprocessor">#define NVMCTRL_STATUS_AFIRST (_U_(0x1) << NVMCTRL_STATUS_AFIRST_Pos)</span></div>
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<div class="line"><a name="l00391"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a3e0feac79940a9612ff3509d5b30e8c6"> 391</a></span> <span class="preprocessor">#define NVMCTRL_STATUS_BPDIS_Pos 5 </span></div>
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<div class="line"><a name="l00392"></a><span class="lineno"> 392</span> <span class="preprocessor">#define NVMCTRL_STATUS_BPDIS (_U_(0x1) << NVMCTRL_STATUS_BPDIS_Pos)</span></div>
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<div class="line"><a name="l00393"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a67bf7afdc8e516723f0115349cf1c9ed"> 393</a></span> <span class="preprocessor">#define NVMCTRL_STATUS_BOOTPROT_Pos 8 </span></div>
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<div class="line"><a name="l00394"></a><span class="lineno"> 394</span> <span class="preprocessor">#define NVMCTRL_STATUS_BOOTPROT_Msk (_U_(0xF) << NVMCTRL_STATUS_BOOTPROT_Pos)</span></div>
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<div class="line"><a name="l00395"></a><span class="lineno"> 395</span> <span class="preprocessor">#define NVMCTRL_STATUS_BOOTPROT(value) (NVMCTRL_STATUS_BOOTPROT_Msk & ((value) << NVMCTRL_STATUS_BOOTPROT_Pos))</span></div>
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<div class="line"><a name="l00396"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#acb0fa540b3def00184ee02da753f171e"> 396</a></span> <span class="preprocessor">#define NVMCTRL_STATUS_MASK _U_(0x0F3F) </span></div>
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<div class="line"><a name="l00398"></a><span class="lineno"> 398</span> <span class="preprocessor"></span><span class="comment">/* -------- NVMCTRL_ADDR : (NVMCTRL Offset: 0x14) (R/W 32) Address -------- */</span><span class="preprocessor"></span></div>
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<div class="line"><a name="l00399"></a><span class="lineno"> 399</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
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<div class="line"><a name="l00400"></a><span class="lineno"><a class="line" href="unionNVMCTRL__ADDR__Type.html"> 400</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
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<div class="line"><a name="l00401"></a><span class="lineno"> 401</span>  <span class="keyword">struct </span>{</div>
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<div class="line"><a name="l00402"></a><span class="lineno"><a class="line" href="unionNVMCTRL__ADDR__Type.html#a3662864e181ff1d20570379bcf0a25da"> 402</a></span>  uint32_t <a class="code" href="unionNVMCTRL__ADDR__Type.html#a3662864e181ff1d20570379bcf0a25da">ADDR</a>:24; </div>
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<div class="line"><a name="l00403"></a><span class="lineno"><a class="line" href="unionNVMCTRL__ADDR__Type.html#a105683ed86fb7517c52cd181f164be45"> 403</a></span>  uint32_t :8; </div>
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<div class="line"><a name="l00404"></a><span class="lineno"><a class="line" href="unionNVMCTRL__ADDR__Type.html#aa52cc7952015756214b6a9a8bd13a04a"> 404</a></span>  } bit; </div>
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<div class="line"><a name="l00405"></a><span class="lineno"><a class="line" href="unionNVMCTRL__ADDR__Type.html#a483be20a4f5e7bc08fd4439dfd5e5b1f"> 405</a></span>  uint32_t <a class="code" href="unionNVMCTRL__ADDR__Type.html#a483be20a4f5e7bc08fd4439dfd5e5b1f">reg</a>; </div>
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<div class="line"><a name="l00406"></a><span class="lineno"> 406</span> } <a class="code" href="unionNVMCTRL__ADDR__Type.html">NVMCTRL_ADDR_Type</a>;</div>
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<div class="line"><a name="l00407"></a><span class="lineno"> 407</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
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<div class="line"><a name="l00408"></a><span class="lineno"> 408</span>  </div>
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<div class="line"><a name="l00409"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a2540268cdeb3644aa722cb8cce5546c8"> 409</a></span> <span class="preprocessor">#define NVMCTRL_ADDR_OFFSET 0x14 </span></div>
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<div class="line"><a name="l00410"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a150652b364483d20d947140a67e2fe25"> 410</a></span> <span class="preprocessor">#define NVMCTRL_ADDR_RESETVALUE _U_(0x00000000) </span></div>
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<div class="line"><a name="l00412"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a7af974b171527d13bf216b3d5ef5650b"> 412</a></span> <span class="preprocessor">#define NVMCTRL_ADDR_ADDR_Pos 0 </span></div>
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<div class="line"><a name="l00413"></a><span class="lineno"> 413</span> <span class="preprocessor">#define NVMCTRL_ADDR_ADDR_Msk (_U_(0xFFFFFF) << NVMCTRL_ADDR_ADDR_Pos)</span></div>
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<div class="line"><a name="l00414"></a><span class="lineno"> 414</span> <span class="preprocessor">#define NVMCTRL_ADDR_ADDR(value) (NVMCTRL_ADDR_ADDR_Msk & ((value) << NVMCTRL_ADDR_ADDR_Pos))</span></div>
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<div class="line"><a name="l00415"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ab7e62000f793147227a50fa0217a0efd"> 415</a></span> <span class="preprocessor">#define NVMCTRL_ADDR_MASK _U_(0x00FFFFFF) </span></div>
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<div class="line"><a name="l00417"></a><span class="lineno"> 417</span> <span class="preprocessor"></span><span class="comment">/* -------- NVMCTRL_RUNLOCK : (NVMCTRL Offset: 0x18) (R/ 32) Lock Section -------- */</span><span class="preprocessor"></span></div>
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<div class="line"><a name="l00418"></a><span class="lineno"> 418</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
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<div class="line"><a name="l00419"></a><span class="lineno"><a class="line" href="unionNVMCTRL__RUNLOCK__Type.html"> 419</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
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<div class="line"><a name="l00420"></a><span class="lineno"> 420</span>  <span class="keyword">struct </span>{</div>
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<div class="line"><a name="l00421"></a><span class="lineno"><a class="line" href="unionNVMCTRL__RUNLOCK__Type.html#a5ae1b23fc98934b9d720c4cb77892613"> 421</a></span>  uint32_t <a class="code" href="unionNVMCTRL__RUNLOCK__Type.html#a5ae1b23fc98934b9d720c4cb77892613">RUNLOCK</a>:32; </div>
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<div class="line"><a name="l00422"></a><span class="lineno"><a class="line" href="unionNVMCTRL__RUNLOCK__Type.html#aa29fcf24ab622479548f320780982c3e"> 422</a></span>  } bit; </div>
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<div class="line"><a name="l00423"></a><span class="lineno"><a class="line" href="unionNVMCTRL__RUNLOCK__Type.html#a4cfe6faa11b6c850ceffcf765863394f"> 423</a></span>  uint32_t <a class="code" href="unionNVMCTRL__RUNLOCK__Type.html#a4cfe6faa11b6c850ceffcf765863394f">reg</a>; </div>
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<div class="line"><a name="l00424"></a><span class="lineno"> 424</span> } <a class="code" href="unionNVMCTRL__RUNLOCK__Type.html">NVMCTRL_RUNLOCK_Type</a>;</div>
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<div class="line"><a name="l00425"></a><span class="lineno"> 425</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
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<div class="line"><a name="l00426"></a><span class="lineno"> 426</span>  </div>
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<div class="line"><a name="l00427"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a346dcd28aad5d36105d096721dfd91e1"> 427</a></span> <span class="preprocessor">#define NVMCTRL_RUNLOCK_OFFSET 0x18 </span></div>
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<div class="line"><a name="l00428"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a8e6268896b6157a54f2d2d3436803364"> 428</a></span> <span class="preprocessor">#define NVMCTRL_RUNLOCK_RESETVALUE _U_(0x00000000) </span></div>
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<div class="line"><a name="l00430"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a4780bf981f03993af92e7eb985332369"> 430</a></span> <span class="preprocessor">#define NVMCTRL_RUNLOCK_RUNLOCK_Pos 0 </span></div>
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<div class="line"><a name="l00431"></a><span class="lineno"> 431</span> <span class="preprocessor">#define NVMCTRL_RUNLOCK_RUNLOCK_Msk (_U_(0xFFFFFFFF) << NVMCTRL_RUNLOCK_RUNLOCK_Pos)</span></div>
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<div class="line"><a name="l00432"></a><span class="lineno"> 432</span> <span class="preprocessor">#define NVMCTRL_RUNLOCK_RUNLOCK(value) (NVMCTRL_RUNLOCK_RUNLOCK_Msk & ((value) << NVMCTRL_RUNLOCK_RUNLOCK_Pos))</span></div>
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<div class="line"><a name="l00433"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a765a44b584c77fcc4955ba5945d40f79"> 433</a></span> <span class="preprocessor">#define NVMCTRL_RUNLOCK_MASK _U_(0xFFFFFFFF) </span></div>
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<div class="line"><a name="l00435"></a><span class="lineno"> 435</span> <span class="preprocessor"></span><span class="comment">/* -------- NVMCTRL_PBLDATA : (NVMCTRL Offset: 0x1C) (R/ 32) Page Buffer Load Data x -------- */</span><span class="preprocessor"></span></div>
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<div class="line"><a name="l00436"></a><span class="lineno"> 436</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
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<div class="line"><a name="l00437"></a><span class="lineno"><a class="line" href="unionNVMCTRL__PBLDATA__Type.html"> 437</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
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<div class="line"><a name="l00438"></a><span class="lineno"> 438</span>  <span class="keyword">struct </span>{</div>
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<div class="line"><a name="l00439"></a><span class="lineno"><a class="line" href="unionNVMCTRL__PBLDATA__Type.html#a14c7b23bc6263884f3451ff9930343aa"> 439</a></span>  uint32_t <a class="code" href="unionNVMCTRL__PBLDATA__Type.html#a14c7b23bc6263884f3451ff9930343aa">DATA</a>:32; </div>
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<div class="line"><a name="l00440"></a><span class="lineno"><a class="line" href="unionNVMCTRL__PBLDATA__Type.html#a13e795ce0d76601a149ace199af67057"> 440</a></span>  } bit; </div>
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<div class="line"><a name="l00441"></a><span class="lineno"><a class="line" href="unionNVMCTRL__PBLDATA__Type.html#a5d2ff39bbfcd35809ac1ee48daff5685"> 441</a></span>  uint32_t <a class="code" href="unionNVMCTRL__PBLDATA__Type.html#a5d2ff39bbfcd35809ac1ee48daff5685">reg</a>; </div>
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<div class="line"><a name="l00442"></a><span class="lineno"> 442</span> } <a class="code" href="unionNVMCTRL__PBLDATA__Type.html">NVMCTRL_PBLDATA_Type</a>;</div>
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<div class="line"><a name="l00443"></a><span class="lineno"> 443</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
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<div class="line"><a name="l00444"></a><span class="lineno"> 444</span>  </div>
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<div class="line"><a name="l00445"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a20335c5e4f98ea6f04cbfea8e216f424"> 445</a></span> <span class="preprocessor">#define NVMCTRL_PBLDATA_OFFSET 0x1C </span></div>
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<div class="line"><a name="l00446"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a9453ad641763f2a598293f34c408f72e"> 446</a></span> <span class="preprocessor">#define NVMCTRL_PBLDATA_RESETVALUE _U_(0xFFFFFFFF) </span></div>
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<div class="line"><a name="l00448"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#adb49fcf33ccbd90ef286c0840bb0b4ae"> 448</a></span> <span class="preprocessor">#define NVMCTRL_PBLDATA_DATA_Pos 0 </span></div>
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<div class="line"><a name="l00449"></a><span class="lineno"> 449</span> <span class="preprocessor">#define NVMCTRL_PBLDATA_DATA_Msk (_U_(0xFFFFFFFF) << NVMCTRL_PBLDATA_DATA_Pos)</span></div>
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<div class="line"><a name="l00450"></a><span class="lineno"> 450</span> <span class="preprocessor">#define NVMCTRL_PBLDATA_DATA(value) (NVMCTRL_PBLDATA_DATA_Msk & ((value) << NVMCTRL_PBLDATA_DATA_Pos))</span></div>
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<div class="line"><a name="l00451"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ad9d596008c4ae456d6aa37524ba3c4b9"> 451</a></span> <span class="preprocessor">#define NVMCTRL_PBLDATA_MASK _U_(0xFFFFFFFF) </span></div>
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<div class="line"><a name="l00453"></a><span class="lineno"> 453</span> <span class="preprocessor"></span><span class="comment">/* -------- NVMCTRL_ECCERR : (NVMCTRL Offset: 0x24) (R/ 32) ECC Error Status Register -------- */</span><span class="preprocessor"></span></div>
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<div class="line"><a name="l00454"></a><span class="lineno"> 454</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
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<div class="line"><a name="l00455"></a><span class="lineno"><a class="line" href="unionNVMCTRL__ECCERR__Type.html"> 455</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
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<div class="line"><a name="l00456"></a><span class="lineno"> 456</span>  <span class="keyword">struct </span>{</div>
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<div class="line"><a name="l00457"></a><span class="lineno"><a class="line" href="unionNVMCTRL__ECCERR__Type.html#a5f72176f3db39db4e6a3fc06caa698d4"> 457</a></span>  uint32_t <a class="code" href="unionNVMCTRL__ECCERR__Type.html#a5f72176f3db39db4e6a3fc06caa698d4">ADDR</a>:24; </div>
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<div class="line"><a name="l00458"></a><span class="lineno"><a class="line" href="unionNVMCTRL__ECCERR__Type.html#a4742d3f13514c5fc5909444b6d737b59"> 458</a></span>  uint32_t :4; </div>
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<div class="line"><a name="l00459"></a><span class="lineno"><a class="line" href="unionNVMCTRL__ECCERR__Type.html#a3780a783ed8ee823f0a90daef5450019"> 459</a></span>  uint32_t <a class="code" href="unionNVMCTRL__ECCERR__Type.html#a3780a783ed8ee823f0a90daef5450019">TYPEL</a>:2; </div>
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<div class="line"><a name="l00460"></a><span class="lineno"><a class="line" href="unionNVMCTRL__ECCERR__Type.html#a5bfd3ea917171beaf77840f8cb16e7e4"> 460</a></span>  uint32_t <a class="code" href="unionNVMCTRL__ECCERR__Type.html#a5bfd3ea917171beaf77840f8cb16e7e4">TYPEH</a>:2; </div>
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<div class="line"><a name="l00461"></a><span class="lineno"><a class="line" href="unionNVMCTRL__ECCERR__Type.html#a6f1eb7b99b53d1b9746c8dafeda4283a"> 461</a></span>  } bit; </div>
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<div class="line"><a name="l00462"></a><span class="lineno"><a class="line" href="unionNVMCTRL__ECCERR__Type.html#a05802aadae129edae3b07df3c31d5389"> 462</a></span>  uint32_t <a class="code" href="unionNVMCTRL__ECCERR__Type.html#a05802aadae129edae3b07df3c31d5389">reg</a>; </div>
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<div class="line"><a name="l00463"></a><span class="lineno"> 463</span> } <a class="code" href="unionNVMCTRL__ECCERR__Type.html">NVMCTRL_ECCERR_Type</a>;</div>
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<div class="line"><a name="l00464"></a><span class="lineno"> 464</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
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<div class="line"><a name="l00465"></a><span class="lineno"> 465</span>  </div>
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<div class="line"><a name="l00466"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#abd3a5dd0cfe3b66f6386e4f74b8fa85b"> 466</a></span> <span class="preprocessor">#define NVMCTRL_ECCERR_OFFSET 0x24 </span></div>
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<div class="line"><a name="l00467"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ab797fb0ea4d59d05e33853bfdf7c1107"> 467</a></span> <span class="preprocessor">#define NVMCTRL_ECCERR_RESETVALUE _U_(0x00000000) </span></div>
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<div class="line"><a name="l00469"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a01bfc438608a32f2a18d81190a42b6b9"> 469</a></span> <span class="preprocessor">#define NVMCTRL_ECCERR_ADDR_Pos 0 </span></div>
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<div class="line"><a name="l00470"></a><span class="lineno"> 470</span> <span class="preprocessor">#define NVMCTRL_ECCERR_ADDR_Msk (_U_(0xFFFFFF) << NVMCTRL_ECCERR_ADDR_Pos)</span></div>
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<div class="line"><a name="l00471"></a><span class="lineno"> 471</span> <span class="preprocessor">#define NVMCTRL_ECCERR_ADDR(value) (NVMCTRL_ECCERR_ADDR_Msk & ((value) << NVMCTRL_ECCERR_ADDR_Pos))</span></div>
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<div class="line"><a name="l00472"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a773b71ff442b075e909c294c8b32df20"> 472</a></span> <span class="preprocessor">#define NVMCTRL_ECCERR_TYPEL_Pos 28 </span></div>
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<div class="line"><a name="l00473"></a><span class="lineno"> 473</span> <span class="preprocessor">#define NVMCTRL_ECCERR_TYPEL_Msk (_U_(0x3) << NVMCTRL_ECCERR_TYPEL_Pos)</span></div>
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<div class="line"><a name="l00474"></a><span class="lineno"> 474</span> <span class="preprocessor">#define NVMCTRL_ECCERR_TYPEL(value) (NVMCTRL_ECCERR_TYPEL_Msk & ((value) << NVMCTRL_ECCERR_TYPEL_Pos))</span></div>
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<div class="line"><a name="l00475"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ad6c760c325868b652ea8549160dbfdea"> 475</a></span> <span class="preprocessor">#define NVMCTRL_ECCERR_TYPEL_NONE_Val _U_(0x0) </span></div>
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<div class="line"><a name="l00476"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a7181020ba94941e46f81935a64ca66ad"> 476</a></span> <span class="preprocessor">#define NVMCTRL_ECCERR_TYPEL_SINGLE_Val _U_(0x1) </span></div>
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<div class="line"><a name="l00477"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a4db2a69ae48460249c3e8581e0fa2f27"> 477</a></span> <span class="preprocessor">#define NVMCTRL_ECCERR_TYPEL_DUAL_Val _U_(0x2) </span></div>
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<div class="line"><a name="l00478"></a><span class="lineno"> 478</span> <span class="preprocessor">#define NVMCTRL_ECCERR_TYPEL_NONE (NVMCTRL_ECCERR_TYPEL_NONE_Val << NVMCTRL_ECCERR_TYPEL_Pos)</span></div>
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<div class="line"><a name="l00479"></a><span class="lineno"> 479</span> <span class="preprocessor">#define NVMCTRL_ECCERR_TYPEL_SINGLE (NVMCTRL_ECCERR_TYPEL_SINGLE_Val << NVMCTRL_ECCERR_TYPEL_Pos)</span></div>
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<div class="line"><a name="l00480"></a><span class="lineno"> 480</span> <span class="preprocessor">#define NVMCTRL_ECCERR_TYPEL_DUAL (NVMCTRL_ECCERR_TYPEL_DUAL_Val << NVMCTRL_ECCERR_TYPEL_Pos)</span></div>
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<div class="line"><a name="l00481"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a0e34b7e5cff130c34ded4efec79fd9a1"> 481</a></span> <span class="preprocessor">#define NVMCTRL_ECCERR_TYPEH_Pos 30 </span></div>
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<div class="line"><a name="l00482"></a><span class="lineno"> 482</span> <span class="preprocessor">#define NVMCTRL_ECCERR_TYPEH_Msk (_U_(0x3) << NVMCTRL_ECCERR_TYPEH_Pos)</span></div>
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<div class="line"><a name="l00483"></a><span class="lineno"> 483</span> <span class="preprocessor">#define NVMCTRL_ECCERR_TYPEH(value) (NVMCTRL_ECCERR_TYPEH_Msk & ((value) << NVMCTRL_ECCERR_TYPEH_Pos))</span></div>
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<div class="line"><a name="l00484"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aca1b74f0878dd8da1e328b08cff5e814"> 484</a></span> <span class="preprocessor">#define NVMCTRL_ECCERR_TYPEH_NONE_Val _U_(0x0) </span></div>
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<div class="line"><a name="l00485"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a4f3f4387989bdb1fec66d5c8d38feb4e"> 485</a></span> <span class="preprocessor">#define NVMCTRL_ECCERR_TYPEH_SINGLE_Val _U_(0x1) </span></div>
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<div class="line"><a name="l00486"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a458bd93782ff9661b5f6642cae0d50df"> 486</a></span> <span class="preprocessor">#define NVMCTRL_ECCERR_TYPEH_DUAL_Val _U_(0x2) </span></div>
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<div class="line"><a name="l00487"></a><span class="lineno"> 487</span> <span class="preprocessor">#define NVMCTRL_ECCERR_TYPEH_NONE (NVMCTRL_ECCERR_TYPEH_NONE_Val << NVMCTRL_ECCERR_TYPEH_Pos)</span></div>
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<div class="line"><a name="l00488"></a><span class="lineno"> 488</span> <span class="preprocessor">#define NVMCTRL_ECCERR_TYPEH_SINGLE (NVMCTRL_ECCERR_TYPEH_SINGLE_Val << NVMCTRL_ECCERR_TYPEH_Pos)</span></div>
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<div class="line"><a name="l00489"></a><span class="lineno"> 489</span> <span class="preprocessor">#define NVMCTRL_ECCERR_TYPEH_DUAL (NVMCTRL_ECCERR_TYPEH_DUAL_Val << NVMCTRL_ECCERR_TYPEH_Pos)</span></div>
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<div class="line"><a name="l00490"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a2e98f8b8bdb2b318dcf8174add395063"> 490</a></span> <span class="preprocessor">#define NVMCTRL_ECCERR_MASK _U_(0xF0FFFFFF) </span></div>
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<div class="line"><a name="l00492"></a><span class="lineno"> 492</span> <span class="preprocessor"></span><span class="comment">/* -------- NVMCTRL_DBGCTRL : (NVMCTRL Offset: 0x28) (R/W 8) Debug Control -------- */</span><span class="preprocessor"></span></div>
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<div class="line"><a name="l00493"></a><span class="lineno"> 493</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
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<div class="line"><a name="l00494"></a><span class="lineno"><a class="line" href="unionNVMCTRL__DBGCTRL__Type.html"> 494</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
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<div class="line"><a name="l00495"></a><span class="lineno"> 495</span>  <span class="keyword">struct </span>{</div>
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<div class="line"><a name="l00496"></a><span class="lineno"><a class="line" href="unionNVMCTRL__DBGCTRL__Type.html#a58028d83730f1bc2004e646391aaff37"> 496</a></span>  uint8_t <a class="code" href="unionNVMCTRL__DBGCTRL__Type.html#a58028d83730f1bc2004e646391aaff37">ECCDIS</a>:1; </div>
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<div class="line"><a name="l00497"></a><span class="lineno"><a class="line" href="unionNVMCTRL__DBGCTRL__Type.html#a3d2d0e61e554ede5b97e8c7f55519a7d"> 497</a></span>  uint8_t <a class="code" href="unionNVMCTRL__DBGCTRL__Type.html#a3d2d0e61e554ede5b97e8c7f55519a7d">ECCELOG</a>:1; </div>
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<div class="line"><a name="l00498"></a><span class="lineno"><a class="line" href="unionNVMCTRL__DBGCTRL__Type.html#a9207a4f46fec35e71ec1d2dd62ee5b4a"> 498</a></span>  uint8_t :6; </div>
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<div class="line"><a name="l00499"></a><span class="lineno"><a class="line" href="unionNVMCTRL__DBGCTRL__Type.html#ae7bd87a5534d22f97e9862b40f577425"> 499</a></span>  } bit; </div>
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<div class="line"><a name="l00500"></a><span class="lineno"><a class="line" href="unionNVMCTRL__DBGCTRL__Type.html#a7a4abdf1ceb78b4146fa34eb40167510"> 500</a></span>  uint8_t <a class="code" href="unionNVMCTRL__DBGCTRL__Type.html#a7a4abdf1ceb78b4146fa34eb40167510">reg</a>; </div>
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<div class="line"><a name="l00501"></a><span class="lineno"> 501</span> } <a class="code" href="unionNVMCTRL__DBGCTRL__Type.html">NVMCTRL_DBGCTRL_Type</a>;</div>
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<div class="line"><a name="l00502"></a><span class="lineno"> 502</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
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<div class="line"><a name="l00503"></a><span class="lineno"> 503</span>  </div>
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<div class="line"><a name="l00504"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#abfc10a800250b88bc1aa6893d7f7807a"> 504</a></span> <span class="preprocessor">#define NVMCTRL_DBGCTRL_OFFSET 0x28 </span></div>
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<div class="line"><a name="l00505"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a3caa773b6cf8933d60f4e96611415cdc"> 505</a></span> <span class="preprocessor">#define NVMCTRL_DBGCTRL_RESETVALUE _U_(0x00) </span></div>
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<div class="line"><a name="l00507"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a4b0945afc4044065bbc12602111b7203"> 507</a></span> <span class="preprocessor">#define NVMCTRL_DBGCTRL_ECCDIS_Pos 0 </span></div>
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<div class="line"><a name="l00508"></a><span class="lineno"> 508</span> <span class="preprocessor">#define NVMCTRL_DBGCTRL_ECCDIS (_U_(0x1) << NVMCTRL_DBGCTRL_ECCDIS_Pos)</span></div>
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<div class="line"><a name="l00509"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aa58da7471715cdc607e846adaf1ec734"> 509</a></span> <span class="preprocessor">#define NVMCTRL_DBGCTRL_ECCELOG_Pos 1 </span></div>
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<div class="line"><a name="l00510"></a><span class="lineno"> 510</span> <span class="preprocessor">#define NVMCTRL_DBGCTRL_ECCELOG (_U_(0x1) << NVMCTRL_DBGCTRL_ECCELOG_Pos)</span></div>
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<div class="line"><a name="l00511"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a206ada9fc0b8e925dc51272da5dff233"> 511</a></span> <span class="preprocessor">#define NVMCTRL_DBGCTRL_MASK _U_(0x03) </span></div>
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<div class="line"><a name="l00513"></a><span class="lineno"> 513</span> <span class="preprocessor"></span><span class="comment">/* -------- NVMCTRL_SEECFG : (NVMCTRL Offset: 0x2A) (R/W 8) SmartEEPROM Configuration Register -------- */</span><span class="preprocessor"></span></div>
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<div class="line"><a name="l00514"></a><span class="lineno"> 514</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
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<div class="line"><a name="l00515"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEECFG__Type.html"> 515</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
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<div class="line"><a name="l00516"></a><span class="lineno"> 516</span>  <span class="keyword">struct </span>{</div>
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<div class="line"><a name="l00517"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEECFG__Type.html#a2bdfd7f8f93cec37052eeecbd82092a6"> 517</a></span>  uint8_t <a class="code" href="unionNVMCTRL__SEECFG__Type.html#a2bdfd7f8f93cec37052eeecbd82092a6">WMODE</a>:1; </div>
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|
<div class="line"><a name="l00518"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEECFG__Type.html#a342c8b2e3693e6196d58e1d50f0bf48d"> 518</a></span>  uint8_t <a class="code" href="unionNVMCTRL__SEECFG__Type.html#a342c8b2e3693e6196d58e1d50f0bf48d">APRDIS</a>:1; </div>
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<div class="line"><a name="l00519"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEECFG__Type.html#a9a2b2fd97b104b46922f47b220897b29"> 519</a></span>  uint8_t :6; </div>
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|
<div class="line"><a name="l00520"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEECFG__Type.html#a14b679a2fd3135fffa0826e731b278e0"> 520</a></span>  } bit; </div>
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|
<div class="line"><a name="l00521"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEECFG__Type.html#a63f098bba99c740aa78c8bbea22b3af6"> 521</a></span>  uint8_t <a class="code" href="unionNVMCTRL__SEECFG__Type.html#a63f098bba99c740aa78c8bbea22b3af6">reg</a>; </div>
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<div class="line"><a name="l00522"></a><span class="lineno"> 522</span> } <a class="code" href="unionNVMCTRL__SEECFG__Type.html">NVMCTRL_SEECFG_Type</a>;</div>
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<div class="line"><a name="l00523"></a><span class="lineno"> 523</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
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<div class="line"><a name="l00524"></a><span class="lineno"> 524</span>  </div>
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<div class="line"><a name="l00525"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a411992b91d9f9833e5ffbb39750859eb"> 525</a></span> <span class="preprocessor">#define NVMCTRL_SEECFG_OFFSET 0x2A </span></div>
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<div class="line"><a name="l00526"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ad064de9c2ca707bb0c511872eea0974c"> 526</a></span> <span class="preprocessor">#define NVMCTRL_SEECFG_RESETVALUE _U_(0x00) </span></div>
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<div class="line"><a name="l00528"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ad1519e6fd3d749d2bd87d33fa75dc09a"> 528</a></span> <span class="preprocessor">#define NVMCTRL_SEECFG_WMODE_Pos 0 </span></div>
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<div class="line"><a name="l00529"></a><span class="lineno"> 529</span> <span class="preprocessor">#define NVMCTRL_SEECFG_WMODE (_U_(0x1) << NVMCTRL_SEECFG_WMODE_Pos)</span></div>
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<div class="line"><a name="l00530"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#adfe1789e19f27c333770c1aa553ffe2e"> 530</a></span> <span class="preprocessor">#define NVMCTRL_SEECFG_WMODE_UNBUFFERED_Val _U_(0x0) </span></div>
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<div class="line"><a name="l00531"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aeaea90b7ce256254fce4312fefd06eae"> 531</a></span> <span class="preprocessor">#define NVMCTRL_SEECFG_WMODE_BUFFERED_Val _U_(0x1) </span></div>
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<div class="line"><a name="l00532"></a><span class="lineno"> 532</span> <span class="preprocessor">#define NVMCTRL_SEECFG_WMODE_UNBUFFERED (NVMCTRL_SEECFG_WMODE_UNBUFFERED_Val << NVMCTRL_SEECFG_WMODE_Pos)</span></div>
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<div class="line"><a name="l00533"></a><span class="lineno"> 533</span> <span class="preprocessor">#define NVMCTRL_SEECFG_WMODE_BUFFERED (NVMCTRL_SEECFG_WMODE_BUFFERED_Val << NVMCTRL_SEECFG_WMODE_Pos)</span></div>
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<div class="line"><a name="l00534"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a8495c34e37f84a9dd28292ba8138cfba"> 534</a></span> <span class="preprocessor">#define NVMCTRL_SEECFG_APRDIS_Pos 1 </span></div>
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<div class="line"><a name="l00535"></a><span class="lineno"> 535</span> <span class="preprocessor">#define NVMCTRL_SEECFG_APRDIS (_U_(0x1) << NVMCTRL_SEECFG_APRDIS_Pos)</span></div>
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<div class="line"><a name="l00536"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a32261b1b6bdab06eafe91ddc8ae9e7c1"> 536</a></span> <span class="preprocessor">#define NVMCTRL_SEECFG_MASK _U_(0x03) </span></div>
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<div class="line"><a name="l00538"></a><span class="lineno"> 538</span> <span class="preprocessor"></span><span class="comment">/* -------- NVMCTRL_SEESTAT : (NVMCTRL Offset: 0x2C) (R/ 32) SmartEEPROM Status Register -------- */</span><span class="preprocessor"></span></div>
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<div class="line"><a name="l00539"></a><span class="lineno"> 539</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
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<div class="line"><a name="l00540"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEESTAT__Type.html"> 540</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
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<div class="line"><a name="l00541"></a><span class="lineno"> 541</span>  <span class="keyword">struct </span>{</div>
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<div class="line"><a name="l00542"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEESTAT__Type.html#ac66c07b5e28103c80bc458fa5fb2ded6"> 542</a></span>  uint32_t <a class="code" href="unionNVMCTRL__SEESTAT__Type.html#ac66c07b5e28103c80bc458fa5fb2ded6">ASEES</a>:1; </div>
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<div class="line"><a name="l00543"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEESTAT__Type.html#a77b7c3a60a7e5826a52ced534b7c00eb"> 543</a></span>  uint32_t <a class="code" href="unionNVMCTRL__SEESTAT__Type.html#a77b7c3a60a7e5826a52ced534b7c00eb">LOAD</a>:1; </div>
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<div class="line"><a name="l00544"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEESTAT__Type.html#a903ea2c27b647efbd3e18c970fed944f"> 544</a></span>  uint32_t <a class="code" href="unionNVMCTRL__SEESTAT__Type.html#a903ea2c27b647efbd3e18c970fed944f">BUSY</a>:1; </div>
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<div class="line"><a name="l00545"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEESTAT__Type.html#a791378bb2119e491f523677789f61ae8"> 545</a></span>  uint32_t <a class="code" href="unionNVMCTRL__SEESTAT__Type.html#a791378bb2119e491f523677789f61ae8">LOCK</a>:1; </div>
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<div class="line"><a name="l00546"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEESTAT__Type.html#a74afbec5d238b02b7e76075695ca0f11"> 546</a></span>  uint32_t <a class="code" href="unionNVMCTRL__SEESTAT__Type.html#a74afbec5d238b02b7e76075695ca0f11">RLOCK</a>:1; </div>
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<div class="line"><a name="l00547"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEESTAT__Type.html#a83c4667ef90cac9881575d0f8d874d51"> 547</a></span>  uint32_t :3; </div>
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<div class="line"><a name="l00548"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEESTAT__Type.html#a6124fd33b572b188fcc4daf30f9f3b06"> 548</a></span>  uint32_t <a class="code" href="unionNVMCTRL__SEESTAT__Type.html#a6124fd33b572b188fcc4daf30f9f3b06">SBLK</a>:4; </div>
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<div class="line"><a name="l00549"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEESTAT__Type.html#ac30aff4ddecdaebc65d6783df0e58032"> 549</a></span>  uint32_t :4; </div>
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<div class="line"><a name="l00550"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEESTAT__Type.html#a93222de39a417e536cb0ac9b99f569f8"> 550</a></span>  uint32_t <a class="code" href="unionNVMCTRL__SEESTAT__Type.html#a93222de39a417e536cb0ac9b99f569f8">PSZ</a>:3; </div>
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<div class="line"><a name="l00551"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEESTAT__Type.html#a6d5ff14632d9c2bacd0c7f1f74a2daa3"> 551</a></span>  uint32_t :13; </div>
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<div class="line"><a name="l00552"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEESTAT__Type.html#aa4fdcc87d9011cf25387eb060425ba03"> 552</a></span>  } bit; </div>
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<div class="line"><a name="l00553"></a><span class="lineno"><a class="line" href="unionNVMCTRL__SEESTAT__Type.html#a2e1a67c20fea1e403a4ddee4e7d12716"> 553</a></span>  uint32_t <a class="code" href="unionNVMCTRL__SEESTAT__Type.html#a2e1a67c20fea1e403a4ddee4e7d12716">reg</a>; </div>
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<div class="line"><a name="l00554"></a><span class="lineno"> 554</span> } <a class="code" href="unionNVMCTRL__SEESTAT__Type.html">NVMCTRL_SEESTAT_Type</a>;</div>
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<div class="line"><a name="l00555"></a><span class="lineno"> 555</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
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<div class="line"><a name="l00556"></a><span class="lineno"> 556</span>  </div>
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<div class="line"><a name="l00557"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a9ef3bbd25a21be90dcbd24473b80d80b"> 557</a></span> <span class="preprocessor">#define NVMCTRL_SEESTAT_OFFSET 0x2C </span></div>
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<div class="line"><a name="l00558"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#acaa208a2a6ae678e37dc65e11aacca55"> 558</a></span> <span class="preprocessor">#define NVMCTRL_SEESTAT_RESETVALUE _U_(0x00000000) </span></div>
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<div class="line"><a name="l00560"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a192d45485cf0699ee172d46e7c4e008a"> 560</a></span> <span class="preprocessor">#define NVMCTRL_SEESTAT_ASEES_Pos 0 </span></div>
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<div class="line"><a name="l00561"></a><span class="lineno"> 561</span> <span class="preprocessor">#define NVMCTRL_SEESTAT_ASEES (_U_(0x1) << NVMCTRL_SEESTAT_ASEES_Pos)</span></div>
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<div class="line"><a name="l00562"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a5be1417f0473f1231f71d7577dca2424"> 562</a></span> <span class="preprocessor">#define NVMCTRL_SEESTAT_LOAD_Pos 1 </span></div>
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<div class="line"><a name="l00563"></a><span class="lineno"> 563</span> <span class="preprocessor">#define NVMCTRL_SEESTAT_LOAD (_U_(0x1) << NVMCTRL_SEESTAT_LOAD_Pos)</span></div>
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<div class="line"><a name="l00564"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a27b49bd5f280d800ea54a20a23f990de"> 564</a></span> <span class="preprocessor">#define NVMCTRL_SEESTAT_BUSY_Pos 2 </span></div>
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<div class="line"><a name="l00565"></a><span class="lineno"> 565</span> <span class="preprocessor">#define NVMCTRL_SEESTAT_BUSY (_U_(0x1) << NVMCTRL_SEESTAT_BUSY_Pos)</span></div>
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<div class="line"><a name="l00566"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a365448dd65e94a559ad712d01f25ff5a"> 566</a></span> <span class="preprocessor">#define NVMCTRL_SEESTAT_LOCK_Pos 3 </span></div>
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<div class="line"><a name="l00567"></a><span class="lineno"> 567</span> <span class="preprocessor">#define NVMCTRL_SEESTAT_LOCK (_U_(0x1) << NVMCTRL_SEESTAT_LOCK_Pos)</span></div>
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<div class="line"><a name="l00568"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a65208ac7825e71e3cfb915ef80ba3ed4"> 568</a></span> <span class="preprocessor">#define NVMCTRL_SEESTAT_RLOCK_Pos 4 </span></div>
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<div class="line"><a name="l00569"></a><span class="lineno"> 569</span> <span class="preprocessor">#define NVMCTRL_SEESTAT_RLOCK (_U_(0x1) << NVMCTRL_SEESTAT_RLOCK_Pos)</span></div>
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<div class="line"><a name="l00570"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a750e309549c3cd9c713c29f8a2a0d914"> 570</a></span> <span class="preprocessor">#define NVMCTRL_SEESTAT_SBLK_Pos 8 </span></div>
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<div class="line"><a name="l00571"></a><span class="lineno"> 571</span> <span class="preprocessor">#define NVMCTRL_SEESTAT_SBLK_Msk (_U_(0xF) << NVMCTRL_SEESTAT_SBLK_Pos)</span></div>
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<div class="line"><a name="l00572"></a><span class="lineno"> 572</span> <span class="preprocessor">#define NVMCTRL_SEESTAT_SBLK(value) (NVMCTRL_SEESTAT_SBLK_Msk & ((value) << NVMCTRL_SEESTAT_SBLK_Pos))</span></div>
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<div class="line"><a name="l00573"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a133e065f2ffafe19d26bb83bc68b321c"> 573</a></span> <span class="preprocessor">#define NVMCTRL_SEESTAT_PSZ_Pos 16 </span></div>
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<div class="line"><a name="l00574"></a><span class="lineno"> 574</span> <span class="preprocessor">#define NVMCTRL_SEESTAT_PSZ_Msk (_U_(0x7) << NVMCTRL_SEESTAT_PSZ_Pos)</span></div>
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<div class="line"><a name="l00575"></a><span class="lineno"> 575</span> <span class="preprocessor">#define NVMCTRL_SEESTAT_PSZ(value) (NVMCTRL_SEESTAT_PSZ_Msk & ((value) << NVMCTRL_SEESTAT_PSZ_Pos))</span></div>
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<div class="line"><a name="l00576"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a6a42524260ced78dff10eb90993694c9"> 576</a></span> <span class="preprocessor">#define NVMCTRL_SEESTAT_MASK _U_(0x00070F1F) </span></div>
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<div class="line"><a name="l00579"></a><span class="lineno"> 579</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
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<div class="line"><a name="l00580"></a><span class="lineno"><a class="line" href="structNvmctrl.html"> 580</a></span> <span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
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<div class="line"><a name="l00581"></a><span class="lineno"><a class="line" href="structNvmctrl.html#a7e8613746f6e54c152a3eb2405ab30ef"> 581</a></span>  __IO <a class="code" href="unionNVMCTRL__CTRLA__Type.html">NVMCTRL_CTRLA_Type</a> <a class="code" href="structNvmctrl.html#a7e8613746f6e54c152a3eb2405ab30ef">CTRLA</a>; </div>
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<div class="line"><a name="l00582"></a><span class="lineno"> 582</span>  <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved1[0x2];</div>
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<div class="line"><a name="l00583"></a><span class="lineno"><a class="line" href="structNvmctrl.html#aa229892d3c632b4304cbd8050d1cc439"> 583</a></span>  __O <a class="code" href="unionNVMCTRL__CTRLB__Type.html">NVMCTRL_CTRLB_Type</a> <a class="code" href="structNvmctrl.html#aa229892d3c632b4304cbd8050d1cc439">CTRLB</a>; </div>
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<div class="line"><a name="l00584"></a><span class="lineno"> 584</span>  <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved2[0x2];</div>
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<div class="line"><a name="l00585"></a><span class="lineno"><a class="line" href="structNvmctrl.html#a5ab09d2bf2f4d18b43b46cadf7d17657"> 585</a></span>  __I <a class="code" href="unionNVMCTRL__PARAM__Type.html">NVMCTRL_PARAM_Type</a> <a class="code" href="structNvmctrl.html#a5ab09d2bf2f4d18b43b46cadf7d17657">PARAM</a>; </div>
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<div class="line"><a name="l00586"></a><span class="lineno"><a class="line" href="structNvmctrl.html#a7c7db1c3ef2a8a290f214ae45db87a83"> 586</a></span>  __IO <a class="code" href="unionNVMCTRL__INTENCLR__Type.html">NVMCTRL_INTENCLR_Type</a> <a class="code" href="structNvmctrl.html#a7c7db1c3ef2a8a290f214ae45db87a83">INTENCLR</a>; </div>
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<div class="line"><a name="l00587"></a><span class="lineno"><a class="line" href="structNvmctrl.html#a47dd09a378257903197d6d6e47f8ff2e"> 587</a></span>  __IO <a class="code" href="unionNVMCTRL__INTENSET__Type.html">NVMCTRL_INTENSET_Type</a> <a class="code" href="structNvmctrl.html#a47dd09a378257903197d6d6e47f8ff2e">INTENSET</a>; </div>
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<div class="line"><a name="l00588"></a><span class="lineno"><a class="line" href="structNvmctrl.html#aa275ec3e71b3fd5455175d593b317548"> 588</a></span>  __IO <a class="code" href="unionNVMCTRL__INTFLAG__Type.html">NVMCTRL_INTFLAG_Type</a> <a class="code" href="structNvmctrl.html#aa275ec3e71b3fd5455175d593b317548">INTFLAG</a>; </div>
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<div class="line"><a name="l00589"></a><span class="lineno"><a class="line" href="structNvmctrl.html#a03025c297f9b114679d6f596715a7b78"> 589</a></span>  __I <a class="code" href="unionNVMCTRL__STATUS__Type.html">NVMCTRL_STATUS_Type</a> <a class="code" href="structNvmctrl.html#a03025c297f9b114679d6f596715a7b78">STATUS</a>; </div>
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<div class="line"><a name="l00590"></a><span class="lineno"><a class="line" href="structNvmctrl.html#a839fdde23536d0554617f373c57e702f"> 590</a></span>  __IO <a class="code" href="unionNVMCTRL__ADDR__Type.html">NVMCTRL_ADDR_Type</a> <a class="code" href="structNvmctrl.html#a839fdde23536d0554617f373c57e702f">ADDR</a>; </div>
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<div class="line"><a name="l00591"></a><span class="lineno"><a class="line" href="structNvmctrl.html#a4b833eeaf5a4707c0f6cbacada4c8138"> 591</a></span>  __I <a class="code" href="unionNVMCTRL__RUNLOCK__Type.html">NVMCTRL_RUNLOCK_Type</a> <a class="code" href="structNvmctrl.html#a4b833eeaf5a4707c0f6cbacada4c8138">RUNLOCK</a>; </div>
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<div class="line"><a name="l00592"></a><span class="lineno"><a class="line" href="structNvmctrl.html#acb849d52e34bcfee0ea43c39e06c7a64"> 592</a></span>  __I <a class="code" href="unionNVMCTRL__PBLDATA__Type.html">NVMCTRL_PBLDATA_Type</a> PBLDATA[2]; </div>
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<div class="line"><a name="l00593"></a><span class="lineno"><a class="line" href="structNvmctrl.html#a9012a764338f074e9a4a340fdc310614"> 593</a></span>  __I <a class="code" href="unionNVMCTRL__ECCERR__Type.html">NVMCTRL_ECCERR_Type</a> <a class="code" href="structNvmctrl.html#a9012a764338f074e9a4a340fdc310614">ECCERR</a>; </div>
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<div class="line"><a name="l00594"></a><span class="lineno"><a class="line" href="structNvmctrl.html#a0d34c72c814368719cb2266f4a4e4059"> 594</a></span>  __IO <a class="code" href="unionNVMCTRL__DBGCTRL__Type.html">NVMCTRL_DBGCTRL_Type</a> <a class="code" href="structNvmctrl.html#a0d34c72c814368719cb2266f4a4e4059">DBGCTRL</a>; </div>
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<div class="line"><a name="l00595"></a><span class="lineno"> 595</span>  <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved3[0x1];</div>
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<div class="line"><a name="l00596"></a><span class="lineno"><a class="line" href="structNvmctrl.html#a83918188239d1598f5abbcc3bc804110"> 596</a></span>  __IO <a class="code" href="unionNVMCTRL__SEECFG__Type.html">NVMCTRL_SEECFG_Type</a> <a class="code" href="structNvmctrl.html#a83918188239d1598f5abbcc3bc804110">SEECFG</a>; </div>
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<div class="line"><a name="l00597"></a><span class="lineno"> 597</span>  <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved4[0x1];</div>
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<div class="line"><a name="l00598"></a><span class="lineno"><a class="line" href="structNvmctrl.html#ac7ffb9869923d722cdbb8d5cf66778e2"> 598</a></span>  __I <a class="code" href="unionNVMCTRL__SEESTAT__Type.html">NVMCTRL_SEESTAT_Type</a> <a class="code" href="structNvmctrl.html#ac7ffb9869923d722cdbb8d5cf66778e2">SEESTAT</a>; </div>
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<div class="line"><a name="l00599"></a><span class="lineno"> 599</span> } <a class="code" href="structNvmctrl.html">Nvmctrl</a>;</div>
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<div class="line"><a name="l00600"></a><span class="lineno"> 600</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
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<div class="line"><a name="l00601"></a><span class="lineno"> 601</span>  </div>
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<div class="line"><a name="l00602"></a><span class="lineno"> 602</span> <span class="preprocessor">#define SECTION_NVMCTRL_SW0</span></div>
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<div class="line"><a name="l00603"></a><span class="lineno"> 603</span> <span class="preprocessor">#define SECTION_NVMCTRL_TEMP_LOG</span></div>
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<div class="line"><a name="l00604"></a><span class="lineno"> 604</span> <span class="preprocessor">#define SECTION_NVMCTRL_USER</span></div>
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<div class="line"><a name="l00605"></a><span class="lineno"> 605</span>  </div>
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<div class="line"><a name="l00608"></a><span class="lineno"> 608</span> <span class="comment">/* ************************************************************************** */</span></div>
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<div class="line"><a name="l00610"></a><span class="lineno"> 610</span> <span class="comment">/* ************************************************************************** */</span></div>
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<div class="line"><a name="l00613"></a><span class="lineno"> 613</span>  </div>
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<div class="line"><a name="l00614"></a><span class="lineno"> 614</span>  </div>
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<div class="line"><a name="l00615"></a><span class="lineno"> 615</span> <span class="preprocessor">#define AC_FUSES_BIAS0_ADDR NVMCTRL_SW0</span></div>
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<div class="line"><a name="l00616"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a5966886514f72bc963ac96aa44f700ec"> 616</a></span> <span class="preprocessor">#define AC_FUSES_BIAS0_Pos 0 </span></div>
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<div class="line"><a name="l00617"></a><span class="lineno"> 617</span> <span class="preprocessor">#define AC_FUSES_BIAS0_Msk (_U_(0x3) << AC_FUSES_BIAS0_Pos)</span></div>
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<div class="line"><a name="l00618"></a><span class="lineno"> 618</span> <span class="preprocessor">#define AC_FUSES_BIAS0(value) (AC_FUSES_BIAS0_Msk & ((value) << AC_FUSES_BIAS0_Pos))</span></div>
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<div class="line"><a name="l00619"></a><span class="lineno"> 619</span>  </div>
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<div class="line"><a name="l00620"></a><span class="lineno"> 620</span> <span class="preprocessor">#define ADC0_FUSES_BIASCOMP_ADDR NVMCTRL_SW0</span></div>
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<div class="line"><a name="l00621"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a23f06473d98a6f1044ab03c3b205182f"> 621</a></span> <span class="preprocessor">#define ADC0_FUSES_BIASCOMP_Pos 2 </span></div>
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<div class="line"><a name="l00622"></a><span class="lineno"> 622</span> <span class="preprocessor">#define ADC0_FUSES_BIASCOMP_Msk (_U_(0x7) << ADC0_FUSES_BIASCOMP_Pos)</span></div>
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<div class="line"><a name="l00623"></a><span class="lineno"> 623</span> <span class="preprocessor">#define ADC0_FUSES_BIASCOMP(value) (ADC0_FUSES_BIASCOMP_Msk & ((value) << ADC0_FUSES_BIASCOMP_Pos))</span></div>
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<div class="line"><a name="l00624"></a><span class="lineno"> 624</span>  </div>
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<div class="line"><a name="l00625"></a><span class="lineno"> 625</span> <span class="preprocessor">#define ADC0_FUSES_BIASR2R_ADDR NVMCTRL_SW0</span></div>
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<div class="line"><a name="l00626"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a2d64b2e863cabe1d67537a6533a341d3"> 626</a></span> <span class="preprocessor">#define ADC0_FUSES_BIASR2R_Pos 8 </span></div>
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<div class="line"><a name="l00627"></a><span class="lineno"> 627</span> <span class="preprocessor">#define ADC0_FUSES_BIASR2R_Msk (_U_(0x7) << ADC0_FUSES_BIASR2R_Pos)</span></div>
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<div class="line"><a name="l00628"></a><span class="lineno"> 628</span> <span class="preprocessor">#define ADC0_FUSES_BIASR2R(value) (ADC0_FUSES_BIASR2R_Msk & ((value) << ADC0_FUSES_BIASR2R_Pos))</span></div>
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<div class="line"><a name="l00629"></a><span class="lineno"> 629</span>  </div>
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<div class="line"><a name="l00630"></a><span class="lineno"> 630</span> <span class="preprocessor">#define ADC0_FUSES_BIASREFBUF_ADDR NVMCTRL_SW0</span></div>
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<div class="line"><a name="l00631"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a632bce9230a48abd3a005a676c2eda03"> 631</a></span> <span class="preprocessor">#define ADC0_FUSES_BIASREFBUF_Pos 5 </span></div>
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<div class="line"><a name="l00632"></a><span class="lineno"> 632</span> <span class="preprocessor">#define ADC0_FUSES_BIASREFBUF_Msk (_U_(0x7) << ADC0_FUSES_BIASREFBUF_Pos)</span></div>
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<div class="line"><a name="l00633"></a><span class="lineno"> 633</span> <span class="preprocessor">#define ADC0_FUSES_BIASREFBUF(value) (ADC0_FUSES_BIASREFBUF_Msk & ((value) << ADC0_FUSES_BIASREFBUF_Pos))</span></div>
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<div class="line"><a name="l00634"></a><span class="lineno"> 634</span>  </div>
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<div class="line"><a name="l00635"></a><span class="lineno"> 635</span> <span class="preprocessor">#define ADC1_FUSES_BIASCOMP_ADDR NVMCTRL_SW0</span></div>
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<div class="line"><a name="l00636"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aa64e21a2c31684e928325e62c257ee9c"> 636</a></span> <span class="preprocessor">#define ADC1_FUSES_BIASCOMP_Pos 16 </span></div>
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<div class="line"><a name="l00637"></a><span class="lineno"> 637</span> <span class="preprocessor">#define ADC1_FUSES_BIASCOMP_Msk (_U_(0x7) << ADC1_FUSES_BIASCOMP_Pos)</span></div>
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<div class="line"><a name="l00638"></a><span class="lineno"> 638</span> <span class="preprocessor">#define ADC1_FUSES_BIASCOMP(value) (ADC1_FUSES_BIASCOMP_Msk & ((value) << ADC1_FUSES_BIASCOMP_Pos))</span></div>
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<div class="line"><a name="l00639"></a><span class="lineno"> 639</span>  </div>
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<div class="line"><a name="l00640"></a><span class="lineno"> 640</span> <span class="preprocessor">#define ADC1_FUSES_BIASR2R_ADDR NVMCTRL_SW0</span></div>
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<div class="line"><a name="l00641"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ab3bb39abdafff084802ff74a381f48cb"> 641</a></span> <span class="preprocessor">#define ADC1_FUSES_BIASR2R_Pos 22 </span></div>
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<div class="line"><a name="l00642"></a><span class="lineno"> 642</span> <span class="preprocessor">#define ADC1_FUSES_BIASR2R_Msk (_U_(0x7) << ADC1_FUSES_BIASR2R_Pos)</span></div>
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<div class="line"><a name="l00643"></a><span class="lineno"> 643</span> <span class="preprocessor">#define ADC1_FUSES_BIASR2R(value) (ADC1_FUSES_BIASR2R_Msk & ((value) << ADC1_FUSES_BIASR2R_Pos))</span></div>
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<div class="line"><a name="l00644"></a><span class="lineno"> 644</span>  </div>
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<div class="line"><a name="l00645"></a><span class="lineno"> 645</span> <span class="preprocessor">#define ADC1_FUSES_BIASREFBUF_ADDR NVMCTRL_SW0</span></div>
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<div class="line"><a name="l00646"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a78e01af139e070f4415e1827575a3c45"> 646</a></span> <span class="preprocessor">#define ADC1_FUSES_BIASREFBUF_Pos 19 </span></div>
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<div class="line"><a name="l00647"></a><span class="lineno"> 647</span> <span class="preprocessor">#define ADC1_FUSES_BIASREFBUF_Msk (_U_(0x7) << ADC1_FUSES_BIASREFBUF_Pos)</span></div>
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<div class="line"><a name="l00648"></a><span class="lineno"> 648</span> <span class="preprocessor">#define ADC1_FUSES_BIASREFBUF(value) (ADC1_FUSES_BIASREFBUF_Msk & ((value) << ADC1_FUSES_BIASREFBUF_Pos))</span></div>
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<div class="line"><a name="l00649"></a><span class="lineno"> 649</span>  </div>
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<div class="line"><a name="l00650"></a><span class="lineno"> 650</span> <span class="preprocessor">#define FUSES_BOD33USERLEVEL_ADDR NVMCTRL_USER</span></div>
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<div class="line"><a name="l00651"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a9e8109cd0996312419933645a2f2a089"> 651</a></span> <span class="preprocessor">#define FUSES_BOD33USERLEVEL_Pos 1 </span></div>
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<div class="line"><a name="l00652"></a><span class="lineno"> 652</span> <span class="preprocessor">#define FUSES_BOD33USERLEVEL_Msk (_U_(0xFF) << FUSES_BOD33USERLEVEL_Pos)</span></div>
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<div class="line"><a name="l00653"></a><span class="lineno"> 653</span> <span class="preprocessor">#define FUSES_BOD33USERLEVEL(value) (FUSES_BOD33USERLEVEL_Msk & ((value) << FUSES_BOD33USERLEVEL_Pos))</span></div>
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<div class="line"><a name="l00654"></a><span class="lineno"> 654</span>  </div>
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<div class="line"><a name="l00655"></a><span class="lineno"> 655</span> <span class="preprocessor">#define FUSES_BOD33_ACTION_ADDR NVMCTRL_USER</span></div>
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<div class="line"><a name="l00656"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aac742323e1fa3072afa8ce20817c58f3"> 656</a></span> <span class="preprocessor">#define FUSES_BOD33_ACTION_Pos 9 </span></div>
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<div class="line"><a name="l00657"></a><span class="lineno"> 657</span> <span class="preprocessor">#define FUSES_BOD33_ACTION_Msk (_U_(0x3) << FUSES_BOD33_ACTION_Pos)</span></div>
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<div class="line"><a name="l00658"></a><span class="lineno"> 658</span> <span class="preprocessor">#define FUSES_BOD33_ACTION(value) (FUSES_BOD33_ACTION_Msk & ((value) << FUSES_BOD33_ACTION_Pos))</span></div>
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<div class="line"><a name="l00659"></a><span class="lineno"> 659</span>  </div>
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<div class="line"><a name="l00660"></a><span class="lineno"> 660</span> <span class="preprocessor">#define FUSES_BOD33_DIS_ADDR NVMCTRL_USER</span></div>
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<div class="line"><a name="l00661"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a72a0920038e8fd5892ae9e4d91ae0ac3"> 661</a></span> <span class="preprocessor">#define FUSES_BOD33_DIS_Pos 0 </span></div>
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<div class="line"><a name="l00662"></a><span class="lineno"> 662</span> <span class="preprocessor">#define FUSES_BOD33_DIS_Msk (_U_(0x1) << FUSES_BOD33_DIS_Pos)</span></div>
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<div class="line"><a name="l00663"></a><span class="lineno"> 663</span>  </div>
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<div class="line"><a name="l00664"></a><span class="lineno"> 664</span> <span class="preprocessor">#define FUSES_BOD33_HYST_ADDR NVMCTRL_USER</span></div>
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<div class="line"><a name="l00665"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a5ab9b1d814cf783918e8b12a908295ef"> 665</a></span> <span class="preprocessor">#define FUSES_BOD33_HYST_Pos 11 </span></div>
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<div class="line"><a name="l00666"></a><span class="lineno"> 666</span> <span class="preprocessor">#define FUSES_BOD33_HYST_Msk (_U_(0xF) << FUSES_BOD33_HYST_Pos)</span></div>
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<div class="line"><a name="l00667"></a><span class="lineno"> 667</span> <span class="preprocessor">#define FUSES_BOD33_HYST(value) (FUSES_BOD33_HYST_Msk & ((value) << FUSES_BOD33_HYST_Pos))</span></div>
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<div class="line"><a name="l00668"></a><span class="lineno"> 668</span>  </div>
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<div class="line"><a name="l00669"></a><span class="lineno"> 669</span> <span class="preprocessor">#define FUSES_HOT_ADC_VAL_CTAT_ADDR (NVMCTRL_TEMP_LOG + 8)</span></div>
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<div class="line"><a name="l00670"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#abb81d457f6232e78ff61d0e80f925706"> 670</a></span> <span class="preprocessor">#define FUSES_HOT_ADC_VAL_CTAT_Pos 12 </span></div>
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<div class="line"><a name="l00671"></a><span class="lineno"> 671</span> <span class="preprocessor">#define FUSES_HOT_ADC_VAL_CTAT_Msk (_U_(0xFFF) << FUSES_HOT_ADC_VAL_CTAT_Pos)</span></div>
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<div class="line"><a name="l00672"></a><span class="lineno"> 672</span> <span class="preprocessor">#define FUSES_HOT_ADC_VAL_CTAT(value) (FUSES_HOT_ADC_VAL_CTAT_Msk & ((value) << FUSES_HOT_ADC_VAL_CTAT_Pos))</span></div>
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<div class="line"><a name="l00673"></a><span class="lineno"> 673</span>  </div>
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<div class="line"><a name="l00674"></a><span class="lineno"> 674</span> <span class="preprocessor">#define FUSES_HOT_ADC_VAL_PTAT_ADDR (NVMCTRL_TEMP_LOG + 4)</span></div>
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<div class="line"><a name="l00675"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a1101fa251c80578d13dd58fb49ba1a47"> 675</a></span> <span class="preprocessor">#define FUSES_HOT_ADC_VAL_PTAT_Pos 20 </span></div>
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<div class="line"><a name="l00676"></a><span class="lineno"> 676</span> <span class="preprocessor">#define FUSES_HOT_ADC_VAL_PTAT_Msk (_U_(0xFFF) << FUSES_HOT_ADC_VAL_PTAT_Pos)</span></div>
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<div class="line"><a name="l00677"></a><span class="lineno"> 677</span> <span class="preprocessor">#define FUSES_HOT_ADC_VAL_PTAT(value) (FUSES_HOT_ADC_VAL_PTAT_Msk & ((value) << FUSES_HOT_ADC_VAL_PTAT_Pos))</span></div>
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<div class="line"><a name="l00678"></a><span class="lineno"> 678</span>  </div>
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<div class="line"><a name="l00679"></a><span class="lineno"> 679</span> <span class="preprocessor">#define FUSES_HOT_INT1V_VAL_ADDR (NVMCTRL_TEMP_LOG + 4)</span></div>
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<div class="line"><a name="l00680"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a8b14f5897dd4c958cde93e08ee14ae2a"> 680</a></span> <span class="preprocessor">#define FUSES_HOT_INT1V_VAL_Pos 0 </span></div>
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<div class="line"><a name="l00681"></a><span class="lineno"> 681</span> <span class="preprocessor">#define FUSES_HOT_INT1V_VAL_Msk (_U_(0xFF) << FUSES_HOT_INT1V_VAL_Pos)</span></div>
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<div class="line"><a name="l00682"></a><span class="lineno"> 682</span> <span class="preprocessor">#define FUSES_HOT_INT1V_VAL(value) (FUSES_HOT_INT1V_VAL_Msk & ((value) << FUSES_HOT_INT1V_VAL_Pos))</span></div>
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<div class="line"><a name="l00683"></a><span class="lineno"> 683</span>  </div>
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<div class="line"><a name="l00684"></a><span class="lineno"> 684</span> <span class="preprocessor">#define FUSES_HOT_TEMP_VAL_DEC_ADDR NVMCTRL_TEMP_LOG</span></div>
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<div class="line"><a name="l00685"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#afc1b6bd9fd9cdb5f0a1e89d14bb6f100"> 685</a></span> <span class="preprocessor">#define FUSES_HOT_TEMP_VAL_DEC_Pos 20 </span></div>
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<div class="line"><a name="l00686"></a><span class="lineno"> 686</span> <span class="preprocessor">#define FUSES_HOT_TEMP_VAL_DEC_Msk (_U_(0xF) << FUSES_HOT_TEMP_VAL_DEC_Pos)</span></div>
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<div class="line"><a name="l00687"></a><span class="lineno"> 687</span> <span class="preprocessor">#define FUSES_HOT_TEMP_VAL_DEC(value) (FUSES_HOT_TEMP_VAL_DEC_Msk & ((value) << FUSES_HOT_TEMP_VAL_DEC_Pos))</span></div>
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<div class="line"><a name="l00688"></a><span class="lineno"> 688</span>  </div>
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<div class="line"><a name="l00689"></a><span class="lineno"> 689</span> <span class="preprocessor">#define FUSES_HOT_TEMP_VAL_INT_ADDR NVMCTRL_TEMP_LOG</span></div>
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<div class="line"><a name="l00690"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a3c7e8d3e46d03e0b6424b34762295643"> 690</a></span> <span class="preprocessor">#define FUSES_HOT_TEMP_VAL_INT_Pos 12 </span></div>
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<div class="line"><a name="l00691"></a><span class="lineno"> 691</span> <span class="preprocessor">#define FUSES_HOT_TEMP_VAL_INT_Msk (_U_(0xFF) << FUSES_HOT_TEMP_VAL_INT_Pos)</span></div>
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<div class="line"><a name="l00692"></a><span class="lineno"> 692</span> <span class="preprocessor">#define FUSES_HOT_TEMP_VAL_INT(value) (FUSES_HOT_TEMP_VAL_INT_Msk & ((value) << FUSES_HOT_TEMP_VAL_INT_Pos))</span></div>
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<div class="line"><a name="l00693"></a><span class="lineno"> 693</span>  </div>
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<div class="line"><a name="l00694"></a><span class="lineno"> 694</span> <span class="preprocessor">#define FUSES_ROOM_ADC_VAL_CTAT_ADDR (NVMCTRL_TEMP_LOG + 8)</span></div>
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<div class="line"><a name="l00695"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a27ddb7402e2867d17c8892a802136fd7"> 695</a></span> <span class="preprocessor">#define FUSES_ROOM_ADC_VAL_CTAT_Pos 0 </span></div>
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<div class="line"><a name="l00696"></a><span class="lineno"> 696</span> <span class="preprocessor">#define FUSES_ROOM_ADC_VAL_CTAT_Msk (_U_(0xFFF) << FUSES_ROOM_ADC_VAL_CTAT_Pos)</span></div>
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<div class="line"><a name="l00697"></a><span class="lineno"> 697</span> <span class="preprocessor">#define FUSES_ROOM_ADC_VAL_CTAT(value) (FUSES_ROOM_ADC_VAL_CTAT_Msk & ((value) << FUSES_ROOM_ADC_VAL_CTAT_Pos))</span></div>
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<div class="line"><a name="l00698"></a><span class="lineno"> 698</span>  </div>
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<div class="line"><a name="l00699"></a><span class="lineno"> 699</span> <span class="preprocessor">#define FUSES_ROOM_ADC_VAL_PTAT_ADDR (NVMCTRL_TEMP_LOG + 4)</span></div>
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<div class="line"><a name="l00700"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aefb2f458ba54047a124fdbe10212791e"> 700</a></span> <span class="preprocessor">#define FUSES_ROOM_ADC_VAL_PTAT_Pos 8 </span></div>
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<div class="line"><a name="l00701"></a><span class="lineno"> 701</span> <span class="preprocessor">#define FUSES_ROOM_ADC_VAL_PTAT_Msk (_U_(0xFFF) << FUSES_ROOM_ADC_VAL_PTAT_Pos)</span></div>
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<div class="line"><a name="l00702"></a><span class="lineno"> 702</span> <span class="preprocessor">#define FUSES_ROOM_ADC_VAL_PTAT(value) (FUSES_ROOM_ADC_VAL_PTAT_Msk & ((value) << FUSES_ROOM_ADC_VAL_PTAT_Pos))</span></div>
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<div class="line"><a name="l00703"></a><span class="lineno"> 703</span>  </div>
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<div class="line"><a name="l00704"></a><span class="lineno"> 704</span> <span class="preprocessor">#define FUSES_ROOM_INT1V_VAL_ADDR NVMCTRL_TEMP_LOG</span></div>
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<div class="line"><a name="l00705"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aac3dee19f6ada7e3e76edabd527b521d"> 705</a></span> <span class="preprocessor">#define FUSES_ROOM_INT1V_VAL_Pos 24 </span></div>
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<div class="line"><a name="l00706"></a><span class="lineno"> 706</span> <span class="preprocessor">#define FUSES_ROOM_INT1V_VAL_Msk (_U_(0xFF) << FUSES_ROOM_INT1V_VAL_Pos)</span></div>
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<div class="line"><a name="l00707"></a><span class="lineno"> 707</span> <span class="preprocessor">#define FUSES_ROOM_INT1V_VAL(value) (FUSES_ROOM_INT1V_VAL_Msk & ((value) << FUSES_ROOM_INT1V_VAL_Pos))</span></div>
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<div class="line"><a name="l00708"></a><span class="lineno"> 708</span>  </div>
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<div class="line"><a name="l00709"></a><span class="lineno"> 709</span> <span class="preprocessor">#define FUSES_ROOM_TEMP_VAL_DEC_ADDR NVMCTRL_TEMP_LOG</span></div>
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<div class="line"><a name="l00710"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aac2a02c5ab8d7fd6e6be94f6657558a6"> 710</a></span> <span class="preprocessor">#define FUSES_ROOM_TEMP_VAL_DEC_Pos 8 </span></div>
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<div class="line"><a name="l00711"></a><span class="lineno"> 711</span> <span class="preprocessor">#define FUSES_ROOM_TEMP_VAL_DEC_Msk (_U_(0xF) << FUSES_ROOM_TEMP_VAL_DEC_Pos)</span></div>
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<div class="line"><a name="l00712"></a><span class="lineno"> 712</span> <span class="preprocessor">#define FUSES_ROOM_TEMP_VAL_DEC(value) (FUSES_ROOM_TEMP_VAL_DEC_Msk & ((value) << FUSES_ROOM_TEMP_VAL_DEC_Pos))</span></div>
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<div class="line"><a name="l00713"></a><span class="lineno"> 713</span>  </div>
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<div class="line"><a name="l00714"></a><span class="lineno"> 714</span> <span class="preprocessor">#define FUSES_ROOM_TEMP_VAL_INT_ADDR NVMCTRL_TEMP_LOG</span></div>
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<div class="line"><a name="l00715"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a614f00b6390a26716abbcbbd6e7d7b7d"> 715</a></span> <span class="preprocessor">#define FUSES_ROOM_TEMP_VAL_INT_Pos 0 </span></div>
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<div class="line"><a name="l00716"></a><span class="lineno"> 716</span> <span class="preprocessor">#define FUSES_ROOM_TEMP_VAL_INT_Msk (_U_(0xFF) << FUSES_ROOM_TEMP_VAL_INT_Pos)</span></div>
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<div class="line"><a name="l00717"></a><span class="lineno"> 717</span> <span class="preprocessor">#define FUSES_ROOM_TEMP_VAL_INT(value) (FUSES_ROOM_TEMP_VAL_INT_Msk & ((value) << FUSES_ROOM_TEMP_VAL_INT_Pos))</span></div>
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<div class="line"><a name="l00718"></a><span class="lineno"> 718</span>  </div>
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<div class="line"><a name="l00719"></a><span class="lineno"> 719</span> <span class="preprocessor">#define NVMCTRL_FUSES_BOOTPROT_ADDR NVMCTRL_USER</span></div>
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<div class="line"><a name="l00720"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ac2867e0c1d1fc1b327991134a24983ca"> 720</a></span> <span class="preprocessor">#define NVMCTRL_FUSES_BOOTPROT_Pos 26 </span></div>
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<div class="line"><a name="l00721"></a><span class="lineno"> 721</span> <span class="preprocessor">#define NVMCTRL_FUSES_BOOTPROT_Msk (_U_(0xF) << NVMCTRL_FUSES_BOOTPROT_Pos)</span></div>
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<div class="line"><a name="l00722"></a><span class="lineno"> 722</span> <span class="preprocessor">#define NVMCTRL_FUSES_BOOTPROT(value) (NVMCTRL_FUSES_BOOTPROT_Msk & ((value) << NVMCTRL_FUSES_BOOTPROT_Pos))</span></div>
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<div class="line"><a name="l00723"></a><span class="lineno"> 723</span>  </div>
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<div class="line"><a name="l00724"></a><span class="lineno"> 724</span> <span class="preprocessor">#define NVMCTRL_FUSES_REGION_LOCKS_ADDR (NVMCTRL_USER + 8)</span></div>
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<div class="line"><a name="l00725"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a553b4d761e65080381c6af440abee0f0"> 725</a></span> <span class="preprocessor">#define NVMCTRL_FUSES_REGION_LOCKS_Pos 0 </span></div>
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<div class="line"><a name="l00726"></a><span class="lineno"> 726</span> <span class="preprocessor">#define NVMCTRL_FUSES_REGION_LOCKS_Msk (_U_(0xFFFFFFFF) << NVMCTRL_FUSES_REGION_LOCKS_Pos)</span></div>
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<div class="line"><a name="l00727"></a><span class="lineno"> 727</span> <span class="preprocessor">#define NVMCTRL_FUSES_REGION_LOCKS(value) (NVMCTRL_FUSES_REGION_LOCKS_Msk & ((value) << NVMCTRL_FUSES_REGION_LOCKS_Pos))</span></div>
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<div class="line"><a name="l00728"></a><span class="lineno"> 728</span>  </div>
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<div class="line"><a name="l00729"></a><span class="lineno"> 729</span> <span class="preprocessor">#define NVMCTRL_FUSES_SEEPSZ_ADDR (NVMCTRL_USER + 4)</span></div>
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<div class="line"><a name="l00730"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ad8edf28ff4e7b8bb4fe9ffacbd1050a0"> 730</a></span> <span class="preprocessor">#define NVMCTRL_FUSES_SEEPSZ_Pos 4 </span></div>
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<div class="line"><a name="l00731"></a><span class="lineno"> 731</span> <span class="preprocessor">#define NVMCTRL_FUSES_SEEPSZ_Msk (_U_(0x7) << NVMCTRL_FUSES_SEEPSZ_Pos)</span></div>
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<div class="line"><a name="l00732"></a><span class="lineno"> 732</span> <span class="preprocessor">#define NVMCTRL_FUSES_SEEPSZ(value) (NVMCTRL_FUSES_SEEPSZ_Msk & ((value) << NVMCTRL_FUSES_SEEPSZ_Pos))</span></div>
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<div class="line"><a name="l00733"></a><span class="lineno"> 733</span>  </div>
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<div class="line"><a name="l00734"></a><span class="lineno"> 734</span> <span class="preprocessor">#define NVMCTRL_FUSES_SEESBLK_ADDR (NVMCTRL_USER + 4)</span></div>
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<div class="line"><a name="l00735"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a57166c3b4b4ee40c95300889a7c0ebd8"> 735</a></span> <span class="preprocessor">#define NVMCTRL_FUSES_SEESBLK_Pos 0 </span></div>
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<div class="line"><a name="l00736"></a><span class="lineno"> 736</span> <span class="preprocessor">#define NVMCTRL_FUSES_SEESBLK_Msk (_U_(0xF) << NVMCTRL_FUSES_SEESBLK_Pos)</span></div>
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<div class="line"><a name="l00737"></a><span class="lineno"> 737</span> <span class="preprocessor">#define NVMCTRL_FUSES_SEESBLK(value) (NVMCTRL_FUSES_SEESBLK_Msk & ((value) << NVMCTRL_FUSES_SEESBLK_Pos))</span></div>
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<div class="line"><a name="l00738"></a><span class="lineno"> 738</span>  </div>
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<div class="line"><a name="l00739"></a><span class="lineno"> 739</span> <span class="preprocessor">#define RAMECC_FUSES_ECCDIS_ADDR (NVMCTRL_USER + 4)</span></div>
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<div class="line"><a name="l00740"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a3511cbfd7973757c32444feacbf43b51"> 740</a></span> <span class="preprocessor">#define RAMECC_FUSES_ECCDIS_Pos 7 </span></div>
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<div class="line"><a name="l00741"></a><span class="lineno"> 741</span> <span class="preprocessor">#define RAMECC_FUSES_ECCDIS_Msk (_U_(0x1) << RAMECC_FUSES_ECCDIS_Pos)</span></div>
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<div class="line"><a name="l00742"></a><span class="lineno"> 742</span>  </div>
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<div class="line"><a name="l00743"></a><span class="lineno"> 743</span> <span class="preprocessor">#define USB_FUSES_TRANSN_ADDR (NVMCTRL_SW0 + 4)</span></div>
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<div class="line"><a name="l00744"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ab0e7f93b7c247b3159128648a749719f"> 744</a></span> <span class="preprocessor">#define USB_FUSES_TRANSN_Pos 0 </span></div>
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<div class="line"><a name="l00745"></a><span class="lineno"> 745</span> <span class="preprocessor">#define USB_FUSES_TRANSN_Msk (_U_(0x1F) << USB_FUSES_TRANSN_Pos)</span></div>
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<div class="line"><a name="l00746"></a><span class="lineno"> 746</span> <span class="preprocessor">#define USB_FUSES_TRANSN(value) (USB_FUSES_TRANSN_Msk & ((value) << USB_FUSES_TRANSN_Pos))</span></div>
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<div class="line"><a name="l00747"></a><span class="lineno"> 747</span>  </div>
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<div class="line"><a name="l00748"></a><span class="lineno"> 748</span> <span class="preprocessor">#define USB_FUSES_TRANSP_ADDR (NVMCTRL_SW0 + 4)</span></div>
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<div class="line"><a name="l00749"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aa2619428e9443f013405e7411b2f36ec"> 749</a></span> <span class="preprocessor">#define USB_FUSES_TRANSP_Pos 5 </span></div>
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<div class="line"><a name="l00750"></a><span class="lineno"> 750</span> <span class="preprocessor">#define USB_FUSES_TRANSP_Msk (_U_(0x1F) << USB_FUSES_TRANSP_Pos)</span></div>
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<div class="line"><a name="l00751"></a><span class="lineno"> 751</span> <span class="preprocessor">#define USB_FUSES_TRANSP(value) (USB_FUSES_TRANSP_Msk & ((value) << USB_FUSES_TRANSP_Pos))</span></div>
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<div class="line"><a name="l00752"></a><span class="lineno"> 752</span>  </div>
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<div class="line"><a name="l00753"></a><span class="lineno"> 753</span> <span class="preprocessor">#define USB_FUSES_TRIM_ADDR (NVMCTRL_SW0 + 4)</span></div>
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<div class="line"><a name="l00754"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a699a137d838370a9163b858b8eecccaf"> 754</a></span> <span class="preprocessor">#define USB_FUSES_TRIM_Pos 10 </span></div>
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<div class="line"><a name="l00755"></a><span class="lineno"> 755</span> <span class="preprocessor">#define USB_FUSES_TRIM_Msk (_U_(0x7) << USB_FUSES_TRIM_Pos)</span></div>
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<div class="line"><a name="l00756"></a><span class="lineno"> 756</span> <span class="preprocessor">#define USB_FUSES_TRIM(value) (USB_FUSES_TRIM_Msk & ((value) << USB_FUSES_TRIM_Pos))</span></div>
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<div class="line"><a name="l00757"></a><span class="lineno"> 757</span>  </div>
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<div class="line"><a name="l00758"></a><span class="lineno"> 758</span> <span class="preprocessor">#define WDT_FUSES_ALWAYSON_ADDR (NVMCTRL_USER + 4)</span></div>
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<div class="line"><a name="l00759"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#aad4f4fec9a3339faea07db386174b75e"> 759</a></span> <span class="preprocessor">#define WDT_FUSES_ALWAYSON_Pos 17 </span></div>
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<div class="line"><a name="l00760"></a><span class="lineno"> 760</span> <span class="preprocessor">#define WDT_FUSES_ALWAYSON_Msk (_U_(0x1) << WDT_FUSES_ALWAYSON_Pos)</span></div>
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<div class="line"><a name="l00761"></a><span class="lineno"> 761</span>  </div>
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<div class="line"><a name="l00762"></a><span class="lineno"> 762</span> <span class="preprocessor">#define WDT_FUSES_ENABLE_ADDR (NVMCTRL_USER + 4)</span></div>
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<div class="line"><a name="l00763"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a3e49258fa52a7aededcc7b3e54533ef5"> 763</a></span> <span class="preprocessor">#define WDT_FUSES_ENABLE_Pos 16 </span></div>
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<div class="line"><a name="l00764"></a><span class="lineno"> 764</span> <span class="preprocessor">#define WDT_FUSES_ENABLE_Msk (_U_(0x1) << WDT_FUSES_ENABLE_Pos)</span></div>
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<div class="line"><a name="l00765"></a><span class="lineno"> 765</span>  </div>
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<div class="line"><a name="l00766"></a><span class="lineno"> 766</span> <span class="preprocessor">#define WDT_FUSES_EWOFFSET_ADDR (NVMCTRL_USER + 4)</span></div>
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<div class="line"><a name="l00767"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#ae2f89f15eabc293811402651af74d059"> 767</a></span> <span class="preprocessor">#define WDT_FUSES_EWOFFSET_Pos 26 </span></div>
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<div class="line"><a name="l00768"></a><span class="lineno"> 768</span> <span class="preprocessor">#define WDT_FUSES_EWOFFSET_Msk (_U_(0xF) << WDT_FUSES_EWOFFSET_Pos)</span></div>
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<div class="line"><a name="l00769"></a><span class="lineno"> 769</span> <span class="preprocessor">#define WDT_FUSES_EWOFFSET(value) (WDT_FUSES_EWOFFSET_Msk & ((value) << WDT_FUSES_EWOFFSET_Pos))</span></div>
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<div class="line"><a name="l00770"></a><span class="lineno"> 770</span>  </div>
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<div class="line"><a name="l00771"></a><span class="lineno"> 771</span> <span class="preprocessor">#define WDT_FUSES_PER_ADDR (NVMCTRL_USER + 4)</span></div>
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<div class="line"><a name="l00772"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a87db8b2566c9dd04e5c0cb3838175952"> 772</a></span> <span class="preprocessor">#define WDT_FUSES_PER_Pos 18 </span></div>
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<div class="line"><a name="l00773"></a><span class="lineno"> 773</span> <span class="preprocessor">#define WDT_FUSES_PER_Msk (_U_(0xF) << WDT_FUSES_PER_Pos)</span></div>
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<div class="line"><a name="l00774"></a><span class="lineno"> 774</span> <span class="preprocessor">#define WDT_FUSES_PER(value) (WDT_FUSES_PER_Msk & ((value) << WDT_FUSES_PER_Pos))</span></div>
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<div class="line"><a name="l00775"></a><span class="lineno"> 775</span>  </div>
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<div class="line"><a name="l00776"></a><span class="lineno"> 776</span> <span class="preprocessor">#define WDT_FUSES_WEN_ADDR (NVMCTRL_USER + 4)</span></div>
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<div class="line"><a name="l00777"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a87c9e50a26f5095b90217f854536d90f"> 777</a></span> <span class="preprocessor">#define WDT_FUSES_WEN_Pos 30 </span></div>
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<div class="line"><a name="l00778"></a><span class="lineno"> 778</span> <span class="preprocessor">#define WDT_FUSES_WEN_Msk (_U_(0x1) << WDT_FUSES_WEN_Pos)</span></div>
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<div class="line"><a name="l00779"></a><span class="lineno"> 779</span>  </div>
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<div class="line"><a name="l00780"></a><span class="lineno"> 780</span> <span class="preprocessor">#define WDT_FUSES_WINDOW_ADDR (NVMCTRL_USER + 4)</span></div>
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<div class="line"><a name="l00781"></a><span class="lineno"><a class="line" href="component_2nvmctrl_8h.html#a79ba176ad4ff912b404632c0d0f7541e"> 781</a></span> <span class="preprocessor">#define WDT_FUSES_WINDOW_Pos 22 </span></div>
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<div class="line"><a name="l00782"></a><span class="lineno"> 782</span> <span class="preprocessor">#define WDT_FUSES_WINDOW_Msk (_U_(0xF) << WDT_FUSES_WINDOW_Pos)</span></div>
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<div class="line"><a name="l00783"></a><span class="lineno"> 783</span> <span class="preprocessor">#define WDT_FUSES_WINDOW(value) (WDT_FUSES_WINDOW_Msk & ((value) << WDT_FUSES_WINDOW_Pos))</span></div>
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<div class="line"><a name="l00784"></a><span class="lineno"> 784</span>  </div>
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<div class="line"><a name="l00787"></a><span class="lineno"> 787</span> <span class="preprocessor">#endif </span><span class="comment">/* _SAME54_NVMCTRL_COMPONENT_ */</span><span class="preprocessor"></span></div>
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</div><!-- fragment --></div><!-- contents -->
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<div class="ttc" id="aunionNVMCTRL__PARAM__Type_html_ab027731ea54fbc5dc42c1f1eb988a498"><div class="ttname"><a href="unionNVMCTRL__PARAM__Type.html#ab027731ea54fbc5dc42c1f1eb988a498">NVMCTRL_PARAM_Type::NVMP</a></div><div class="ttdeci">uint32_t NVMP</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00178">nvmctrl.h:178</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__SEESTAT__Type_html_a77b7c3a60a7e5826a52ced534b7c00eb"><div class="ttname"><a href="unionNVMCTRL__SEESTAT__Type.html#a77b7c3a60a7e5826a52ced534b7c00eb">NVMCTRL_SEESTAT_Type::LOAD</a></div><div class="ttdeci">uint32_t LOAD</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00543">nvmctrl.h:543</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTENCLR__Type_html_a8b41fdb24d215b802cd106422eb57615"><div class="ttname"><a href="unionNVMCTRL__INTENCLR__Type.html#a8b41fdb24d215b802cd106422eb57615">NVMCTRL_INTENCLR_Type::DONE</a></div><div class="ttdeci">uint16_t DONE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00220">nvmctrl.h:220</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTENCLR__Type_html"><div class="ttname"><a href="unionNVMCTRL__INTENCLR__Type.html">NVMCTRL_INTENCLR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00218">nvmctrl.h:218</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__PARAM__Type_html"><div class="ttname"><a href="unionNVMCTRL__PARAM__Type.html">NVMCTRL_PARAM_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00176">nvmctrl.h:176</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTENSET__Type_html_a3453ea9b60b5aab08ac77b077050d18c"><div class="ttname"><a href="unionNVMCTRL__INTENSET__Type.html#a3453ea9b60b5aab08ac77b077050d18c">NVMCTRL_INTENSET_Type::NVME</a></div><div class="ttdeci">uint16_t NVME</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00274">nvmctrl.h:274</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTFLAG__Type_html_a5a443103568d0046dc08455295d84a97"><div class="ttname"><a href="unionNVMCTRL__INTFLAG__Type.html#a5a443103568d0046dc08455295d84a97">NVMCTRL_INTFLAG_Type::LOCKE</a></div><div class="ttdeci">__I uint16_t LOCKE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00319">nvmctrl.h:319</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__CTRLA__Type_html_a514f4360f729f5cd90e5421293f620ee"><div class="ttname"><a href="unionNVMCTRL__CTRLA__Type.html#a514f4360f729f5cd90e5421293f620ee">NVMCTRL_CTRLA_Type::AHBNS1</a></div><div class="ttdeci">uint16_t AHBNS1</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00053">nvmctrl.h:53</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTENSET__Type_html_a677dfd10acf0011a22ee327a89a9363b"><div class="ttname"><a href="unionNVMCTRL__INTENSET__Type.html#a677dfd10acf0011a22ee327a89a9363b">NVMCTRL_INTENSET_Type::ECCDE</a></div><div class="ttdeci">uint16_t ECCDE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00273">nvmctrl.h:273</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTENCLR__Type_html_a1329af6b22aba94dbf2995040f43f081"><div class="ttname"><a href="unionNVMCTRL__INTENCLR__Type.html#a1329af6b22aba94dbf2995040f43f081">NVMCTRL_INTENCLR_Type::SEESOVF</a></div><div class="ttdeci">uint16_t SEESOVF</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00229">nvmctrl.h:229</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTFLAG__Type_html_a2068f7322f5e7cd6a878a080cbb3a821"><div class="ttname"><a href="unionNVMCTRL__INTFLAG__Type.html#a2068f7322f5e7cd6a878a080cbb3a821">NVMCTRL_INTFLAG_Type::uint16_t</a></div><div class="ttdeci">__I uint16_t</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00327">nvmctrl.h:327</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__DBGCTRL__Type_html"><div class="ttname"><a href="unionNVMCTRL__DBGCTRL__Type.html">NVMCTRL_DBGCTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00494">nvmctrl.h:494</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__SEESTAT__Type_html_a791378bb2119e491f523677789f61ae8"><div class="ttname"><a href="unionNVMCTRL__SEESTAT__Type.html#a791378bb2119e491f523677789f61ae8">NVMCTRL_SEESTAT_Type::LOCK</a></div><div class="ttdeci">uint32_t LOCK</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00545">nvmctrl.h:545</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__CTRLB__Type_html"><div class="ttname"><a href="unionNVMCTRL__CTRLB__Type.html">NVMCTRL_CTRLB_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00103">nvmctrl.h:103</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__ECCERR__Type_html_a3780a783ed8ee823f0a90daef5450019"><div class="ttname"><a href="unionNVMCTRL__ECCERR__Type.html#a3780a783ed8ee823f0a90daef5450019">NVMCTRL_ECCERR_Type::TYPEL</a></div><div class="ttdeci">uint32_t TYPEL</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00459">nvmctrl.h:459</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__RUNLOCK__Type_html_a4cfe6faa11b6c850ceffcf765863394f"><div class="ttname"><a href="unionNVMCTRL__RUNLOCK__Type.html#a4cfe6faa11b6c850ceffcf765863394f">NVMCTRL_RUNLOCK_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00423">nvmctrl.h:423</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__PARAM__Type_html_a06e3104745c4aa4dc7c65a7b876b3cfd"><div class="ttname"><a href="unionNVMCTRL__PARAM__Type.html#a06e3104745c4aa4dc7c65a7b876b3cfd">NVMCTRL_PARAM_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00183">nvmctrl.h:183</a></div></div>
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<div class="ttc" id="astructNvmctrl_html_aa275ec3e71b3fd5455175d593b317548"><div class="ttname"><a href="structNvmctrl.html#aa275ec3e71b3fd5455175d593b317548">Nvmctrl::INTFLAG</a></div><div class="ttdeci">__IO NVMCTRL_INTFLAG_Type INTFLAG</div><div class="ttdoc">Offset: 0x10 (R/W 16) Interrupt Flag Status and Clear.</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00588">nvmctrl.h:588</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__ECCERR__Type_html"><div class="ttname"><a href="unionNVMCTRL__ECCERR__Type.html">NVMCTRL_ECCERR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00455">nvmctrl.h:455</a></div></div>
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<div class="ttc" id="astructNvmctrl_html_aa229892d3c632b4304cbd8050d1cc439"><div class="ttname"><a href="structNvmctrl.html#aa229892d3c632b4304cbd8050d1cc439">Nvmctrl::CTRLB</a></div><div class="ttdeci">__O NVMCTRL_CTRLB_Type CTRLB</div><div class="ttdoc">Offset: 0x04 ( /W 16) Control B.</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00583">nvmctrl.h:583</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__STATUS__Type_html_ad39e4a3b2f9024bf91b70d5eafe0e89e"><div class="ttname"><a href="unionNVMCTRL__STATUS__Type.html#ad39e4a3b2f9024bf91b70d5eafe0e89e">NVMCTRL_STATUS_Type::PRM</a></div><div class="ttdeci">uint16_t PRM</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00365">nvmctrl.h:365</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__CTRLB__Type_html_aaecd1479721fa1867507ce56625f5fcd"><div class="ttname"><a href="unionNVMCTRL__CTRLB__Type.html#aaecd1479721fa1867507ce56625f5fcd">NVMCTRL_CTRLB_Type::CMD</a></div><div class="ttdeci">uint16_t CMD</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00105">nvmctrl.h:105</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__CTRLA__Type_html"><div class="ttname"><a href="unionNVMCTRL__CTRLA__Type.html">NVMCTRL_CTRLA_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00044">nvmctrl.h:44</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTFLAG__Type_html_a92db228f6b2718ed73777e16b3d3cd77"><div class="ttname"><a href="unionNVMCTRL__INTFLAG__Type.html#a92db228f6b2718ed73777e16b3d3cd77">NVMCTRL_INTFLAG_Type::ECCDE</a></div><div class="ttdeci">__I uint16_t ECCDE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00321">nvmctrl.h:321</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTENCLR__Type_html_ad8f42a0e30a1faa286a7ca808a63a7c0"><div class="ttname"><a href="unionNVMCTRL__INTENCLR__Type.html#ad8f42a0e30a1faa286a7ca808a63a7c0">NVMCTRL_INTENCLR_Type::NVME</a></div><div class="ttdeci">uint16_t NVME</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00226">nvmctrl.h:226</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__DBGCTRL__Type_html_a7a4abdf1ceb78b4146fa34eb40167510"><div class="ttname"><a href="unionNVMCTRL__DBGCTRL__Type.html#a7a4abdf1ceb78b4146fa34eb40167510">NVMCTRL_DBGCTRL_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00500">nvmctrl.h:500</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__CTRLA__Type_html_a675bd7dd11996723b783028b20c0c280"><div class="ttname"><a href="unionNVMCTRL__CTRLA__Type.html#a675bd7dd11996723b783028b20c0c280">NVMCTRL_CTRLA_Type::reg</a></div><div class="ttdeci">uint16_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00057">nvmctrl.h:57</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTENCLR__Type_html_aba1d27ddfc21e516560e8a2dc3d88161"><div class="ttname"><a href="unionNVMCTRL__INTENCLR__Type.html#aba1d27ddfc21e516560e8a2dc3d88161">NVMCTRL_INTENCLR_Type::reg</a></div><div class="ttdeci">uint16_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00233">nvmctrl.h:233</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTENSET__Type_html_aad10b082b6189e41f108d5c40141f90f"><div class="ttname"><a href="unionNVMCTRL__INTENSET__Type.html#aad10b082b6189e41f108d5c40141f90f">NVMCTRL_INTENSET_Type::ADDRE</a></div><div class="ttdeci">uint16_t ADDRE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00269">nvmctrl.h:269</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__STATUS__Type_html_a66acfd78762a55db4016c1e9fbf0202a"><div class="ttname"><a href="unionNVMCTRL__STATUS__Type.html#a66acfd78762a55db4016c1e9fbf0202a">NVMCTRL_STATUS_Type::READY</a></div><div class="ttdeci">uint16_t READY</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00364">nvmctrl.h:364</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__SEESTAT__Type_html_a74afbec5d238b02b7e76075695ca0f11"><div class="ttname"><a href="unionNVMCTRL__SEESTAT__Type.html#a74afbec5d238b02b7e76075695ca0f11">NVMCTRL_SEESTAT_Type::RLOCK</a></div><div class="ttdeci">uint32_t RLOCK</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00546">nvmctrl.h:546</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTFLAG__Type_html_a38a533c4983dfddb4d193687550e384f"><div class="ttname"><a href="unionNVMCTRL__INTFLAG__Type.html#a38a533c4983dfddb4d193687550e384f">NVMCTRL_INTFLAG_Type::reg</a></div><div class="ttdeci">uint16_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00329">nvmctrl.h:329</a></div></div>
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<div class="ttc" id="astructNvmctrl_html_a0d34c72c814368719cb2266f4a4e4059"><div class="ttname"><a href="structNvmctrl.html#a0d34c72c814368719cb2266f4a4e4059">Nvmctrl::DBGCTRL</a></div><div class="ttdeci">__IO NVMCTRL_DBGCTRL_Type DBGCTRL</div><div class="ttdoc">Offset: 0x28 (R/W 8) Debug Control.</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00594">nvmctrl.h:594</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__ADDR__Type_html_a3662864e181ff1d20570379bcf0a25da"><div class="ttname"><a href="unionNVMCTRL__ADDR__Type.html#a3662864e181ff1d20570379bcf0a25da">NVMCTRL_ADDR_Type::ADDR</a></div><div class="ttdeci">uint32_t ADDR</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00402">nvmctrl.h:402</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__ADDR__Type_html_a483be20a4f5e7bc08fd4439dfd5e5b1f"><div class="ttname"><a href="unionNVMCTRL__ADDR__Type.html#a483be20a4f5e7bc08fd4439dfd5e5b1f">NVMCTRL_ADDR_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00405">nvmctrl.h:405</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__CTRLA__Type_html_ae906ccf75cdbcbe61cb732d71b205aaa"><div class="ttname"><a href="unionNVMCTRL__CTRLA__Type.html#ae906ccf75cdbcbe61cb732d71b205aaa">NVMCTRL_CTRLA_Type::CACHEDIS1</a></div><div class="ttdeci">uint16_t CACHEDIS1</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00055">nvmctrl.h:55</a></div></div>
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<div class="ttc" id="astructNvmctrl_html_a4b833eeaf5a4707c0f6cbacada4c8138"><div class="ttname"><a href="structNvmctrl.html#a4b833eeaf5a4707c0f6cbacada4c8138">Nvmctrl::RUNLOCK</a></div><div class="ttdeci">__I NVMCTRL_RUNLOCK_Type RUNLOCK</div><div class="ttdoc">Offset: 0x18 (R/ 32) Lock Section.</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00591">nvmctrl.h:591</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTFLAG__Type_html_a3c01595f7b8459a0a7abd00360e82415"><div class="ttname"><a href="unionNVMCTRL__INTFLAG__Type.html#a3c01595f7b8459a0a7abd00360e82415">NVMCTRL_INTFLAG_Type::NVME</a></div><div class="ttdeci">__I uint16_t NVME</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00322">nvmctrl.h:322</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__CTRLA__Type_html_a3bbab66b83056fd662612f08a715ae30"><div class="ttname"><a href="unionNVMCTRL__CTRLA__Type.html#a3bbab66b83056fd662612f08a715ae30">NVMCTRL_CTRLA_Type::SUSPEN</a></div><div class="ttdeci">uint16_t SUSPEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00048">nvmctrl.h:48</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTENSET__Type_html_a2f4b33b3e2534635fc995f490084b8f2"><div class="ttname"><a href="unionNVMCTRL__INTENSET__Type.html#a2f4b33b3e2534635fc995f490084b8f2">NVMCTRL_INTENSET_Type::ECCSE</a></div><div class="ttdeci">uint16_t ECCSE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00272">nvmctrl.h:272</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTFLAG__Type_html"><div class="ttname"><a href="unionNVMCTRL__INTFLAG__Type.html">NVMCTRL_INTFLAG_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00314">nvmctrl.h:314</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTENSET__Type_html_a0d4f7db8fe0470fd5642e4d0b284f8b4"><div class="ttname"><a href="unionNVMCTRL__INTENSET__Type.html#a0d4f7db8fe0470fd5642e4d0b284f8b4">NVMCTRL_INTENSET_Type::SEESFULL</a></div><div class="ttdeci">uint16_t SEESFULL</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00276">nvmctrl.h:276</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__STATUS__Type_html_adafdfedd11c1fb246fa0642d6c125578"><div class="ttname"><a href="unionNVMCTRL__STATUS__Type.html#adafdfedd11c1fb246fa0642d6c125578">NVMCTRL_STATUS_Type::LOAD</a></div><div class="ttdeci">uint16_t LOAD</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00366">nvmctrl.h:366</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__PBLDATA__Type_html_a14c7b23bc6263884f3451ff9930343aa"><div class="ttname"><a href="unionNVMCTRL__PBLDATA__Type.html#a14c7b23bc6263884f3451ff9930343aa">NVMCTRL_PBLDATA_Type::DATA</a></div><div class="ttdeci">uint32_t DATA</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00439">nvmctrl.h:439</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTENCLR__Type_html_a8a2e5f922dcdf2760d124075e33c71b7"><div class="ttname"><a href="unionNVMCTRL__INTENCLR__Type.html#a8a2e5f922dcdf2760d124075e33c71b7">NVMCTRL_INTENCLR_Type::ECCDE</a></div><div class="ttdeci">uint16_t ECCDE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00225">nvmctrl.h:225</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__SEECFG__Type_html"><div class="ttname"><a href="unionNVMCTRL__SEECFG__Type.html">NVMCTRL_SEECFG_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00515">nvmctrl.h:515</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__SEECFG__Type_html_a2bdfd7f8f93cec37052eeecbd82092a6"><div class="ttname"><a href="unionNVMCTRL__SEECFG__Type.html#a2bdfd7f8f93cec37052eeecbd82092a6">NVMCTRL_SEECFG_Type::WMODE</a></div><div class="ttdeci">uint8_t WMODE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00517">nvmctrl.h:517</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__ECCERR__Type_html_a05802aadae129edae3b07df3c31d5389"><div class="ttname"><a href="unionNVMCTRL__ECCERR__Type.html#a05802aadae129edae3b07df3c31d5389">NVMCTRL_ECCERR_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00462">nvmctrl.h:462</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTENSET__Type_html_afd3d225c78e3421a2006e6b9ff886d46"><div class="ttname"><a href="unionNVMCTRL__INTENSET__Type.html#afd3d225c78e3421a2006e6b9ff886d46">NVMCTRL_INTENSET_Type::reg</a></div><div class="ttdeci">uint16_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00281">nvmctrl.h:281</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__CTRLA__Type_html_a681489c8c6abf9104a2fab49f0b7f6fe"><div class="ttname"><a href="unionNVMCTRL__CTRLA__Type.html#a681489c8c6abf9104a2fab49f0b7f6fe">NVMCTRL_CTRLA_Type::AUTOWS</a></div><div class="ttdeci">uint16_t AUTOWS</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00047">nvmctrl.h:47</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__CTRLA__Type_html_a326ec917cd719be68c60f3dba461e529"><div class="ttname"><a href="unionNVMCTRL__CTRLA__Type.html#a326ec917cd719be68c60f3dba461e529">NVMCTRL_CTRLA_Type::CACHEDIS0</a></div><div class="ttdeci">uint16_t CACHEDIS0</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00054">nvmctrl.h:54</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTFLAG__Type_html_a32367491ed93c4ae3e6d3ceea8a42dc1"><div class="ttname"><a href="unionNVMCTRL__INTFLAG__Type.html#a32367491ed93c4ae3e6d3ceea8a42dc1">NVMCTRL_INTFLAG_Type::SEESFULL</a></div><div class="ttdeci">__I uint16_t SEESFULL</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00324">nvmctrl.h:324</a></div></div>
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<div class="ttc" id="astructNvmctrl_html_a839fdde23536d0554617f373c57e702f"><div class="ttname"><a href="structNvmctrl.html#a839fdde23536d0554617f373c57e702f">Nvmctrl::ADDR</a></div><div class="ttdeci">__IO NVMCTRL_ADDR_Type ADDR</div><div class="ttdoc">Offset: 0x14 (R/W 32) Address.</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00590">nvmctrl.h:590</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__RUNLOCK__Type_html"><div class="ttname"><a href="unionNVMCTRL__RUNLOCK__Type.html">NVMCTRL_RUNLOCK_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00419">nvmctrl.h:419</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__CTRLA__Type_html_ac25be3eb6ef2954bb84c10da7659e4fd"><div class="ttname"><a href="unionNVMCTRL__CTRLA__Type.html#ac25be3eb6ef2954bb84c10da7659e4fd">NVMCTRL_CTRLA_Type::RWS</a></div><div class="ttdeci">uint16_t RWS</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00051">nvmctrl.h:51</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTFLAG__Type_html_a48c18d7fcb2b36e3f944962d2c26d17f"><div class="ttname"><a href="unionNVMCTRL__INTFLAG__Type.html#a48c18d7fcb2b36e3f944962d2c26d17f">NVMCTRL_INTFLAG_Type::DONE</a></div><div class="ttdeci">__I uint16_t DONE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00316">nvmctrl.h:316</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__CTRLA__Type_html_a07cb354a8474052820dddae6fb60b601"><div class="ttname"><a href="unionNVMCTRL__CTRLA__Type.html#a07cb354a8474052820dddae6fb60b601">NVMCTRL_CTRLA_Type::PRM</a></div><div class="ttdeci">uint16_t PRM</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00050">nvmctrl.h:50</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__STATUS__Type_html_a2468e44fa0ad23c3c9f3105774e3c77d"><div class="ttname"><a href="unionNVMCTRL__STATUS__Type.html#a2468e44fa0ad23c3c9f3105774e3c77d">NVMCTRL_STATUS_Type::reg</a></div><div class="ttdeci">uint16_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00374">nvmctrl.h:374</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTENSET__Type_html_a9ac58004be432a1220e42351e8e081aa"><div class="ttname"><a href="unionNVMCTRL__INTENSET__Type.html#a9ac58004be432a1220e42351e8e081aa">NVMCTRL_INTENSET_Type::SEEWRC</a></div><div class="ttdeci">uint16_t SEEWRC</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00278">nvmctrl.h:278</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__SEESTAT__Type_html"><div class="ttname"><a href="unionNVMCTRL__SEESTAT__Type.html">NVMCTRL_SEESTAT_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00540">nvmctrl.h:540</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTENSET__Type_html_a9b285721f768f3be959b53ecfc8e29e3"><div class="ttname"><a href="unionNVMCTRL__INTENSET__Type.html#a9b285721f768f3be959b53ecfc8e29e3">NVMCTRL_INTENSET_Type::PROGE</a></div><div class="ttdeci">uint16_t PROGE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00270">nvmctrl.h:270</a></div></div>
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<div class="ttc" id="astructNvmctrl_html_a83918188239d1598f5abbcc3bc804110"><div class="ttname"><a href="structNvmctrl.html#a83918188239d1598f5abbcc3bc804110">Nvmctrl::SEECFG</a></div><div class="ttdeci">__IO NVMCTRL_SEECFG_Type SEECFG</div><div class="ttdoc">Offset: 0x2A (R/W 8) SmartEEPROM Configuration Register.</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00596">nvmctrl.h:596</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__STATUS__Type_html"><div class="ttname"><a href="unionNVMCTRL__STATUS__Type.html">NVMCTRL_STATUS_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00362">nvmctrl.h:362</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__STATUS__Type_html_ac07c84bc4802900526d4433e00e8f472"><div class="ttname"><a href="unionNVMCTRL__STATUS__Type.html#ac07c84bc4802900526d4433e00e8f472">NVMCTRL_STATUS_Type::BOOTPROT</a></div><div class="ttdeci">uint16_t BOOTPROT</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00371">nvmctrl.h:371</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTENCLR__Type_html_af25cfd3180fc6f4f819cbd4fa257e771"><div class="ttname"><a href="unionNVMCTRL__INTENCLR__Type.html#af25cfd3180fc6f4f819cbd4fa257e771">NVMCTRL_INTENCLR_Type::SUSP</a></div><div class="ttdeci">uint16_t SUSP</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00227">nvmctrl.h:227</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__SEESTAT__Type_html_a2e1a67c20fea1e403a4ddee4e7d12716"><div class="ttname"><a href="unionNVMCTRL__SEESTAT__Type.html#a2e1a67c20fea1e403a4ddee4e7d12716">NVMCTRL_SEESTAT_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00553">nvmctrl.h:553</a></div></div>
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<div class="ttc" id="astructNvmctrl_html_a03025c297f9b114679d6f596715a7b78"><div class="ttname"><a href="structNvmctrl.html#a03025c297f9b114679d6f596715a7b78">Nvmctrl::STATUS</a></div><div class="ttdeci">__I NVMCTRL_STATUS_Type STATUS</div><div class="ttdoc">Offset: 0x12 (R/ 16) Status.</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00589">nvmctrl.h:589</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTENSET__Type_html_a7a3225bbceed8f691b9d2815e3cead70"><div class="ttname"><a href="unionNVMCTRL__INTENSET__Type.html#a7a3225bbceed8f691b9d2815e3cead70">NVMCTRL_INTENSET_Type::LOCKE</a></div><div class="ttdeci">uint16_t LOCKE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00271">nvmctrl.h:271</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__STATUS__Type_html_a11050531ff42aa856c76f8d3b13085f5"><div class="ttname"><a href="unionNVMCTRL__STATUS__Type.html#a11050531ff42aa856c76f8d3b13085f5">NVMCTRL_STATUS_Type::SUSP</a></div><div class="ttdeci">uint16_t SUSP</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00367">nvmctrl.h:367</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__CTRLA__Type_html_adbd3afd8e391e8c2f43182d8e68f78a4"><div class="ttname"><a href="unionNVMCTRL__CTRLA__Type.html#adbd3afd8e391e8c2f43182d8e68f78a4">NVMCTRL_CTRLA_Type::WMODE</a></div><div class="ttdeci">uint16_t WMODE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00049">nvmctrl.h:49</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__SEECFG__Type_html_a63f098bba99c740aa78c8bbea22b3af6"><div class="ttname"><a href="unionNVMCTRL__SEECFG__Type.html#a63f098bba99c740aa78c8bbea22b3af6">NVMCTRL_SEECFG_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00521">nvmctrl.h:521</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTENCLR__Type_html_a9dab229444ed5f2d906a99473b04b9ae"><div class="ttname"><a href="unionNVMCTRL__INTENCLR__Type.html#a9dab229444ed5f2d906a99473b04b9ae">NVMCTRL_INTENCLR_Type::SEEWRC</a></div><div class="ttdeci">uint16_t SEEWRC</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00230">nvmctrl.h:230</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTFLAG__Type_html_a0d371834ecd67b4fb96be92170e7f224"><div class="ttname"><a href="unionNVMCTRL__INTFLAG__Type.html#a0d371834ecd67b4fb96be92170e7f224">NVMCTRL_INTFLAG_Type::ECCSE</a></div><div class="ttdeci">__I uint16_t ECCSE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00320">nvmctrl.h:320</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__STATUS__Type_html_a2547800604ca06aaca17fb314cc49617"><div class="ttname"><a href="unionNVMCTRL__STATUS__Type.html#a2547800604ca06aaca17fb314cc49617">NVMCTRL_STATUS_Type::BPDIS</a></div><div class="ttdeci">uint16_t BPDIS</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00369">nvmctrl.h:369</a></div></div>
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<div class="ttc" id="astructNvmctrl_html_a47dd09a378257903197d6d6e47f8ff2e"><div class="ttname"><a href="structNvmctrl.html#a47dd09a378257903197d6d6e47f8ff2e">Nvmctrl::INTENSET</a></div><div class="ttdeci">__IO NVMCTRL_INTENSET_Type INTENSET</div><div class="ttdoc">Offset: 0x0E (R/W 16) Interrupt Enable Set.</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00587">nvmctrl.h:587</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__STATUS__Type_html_a0009e30c81ab96efe592d8ef9162d222"><div class="ttname"><a href="unionNVMCTRL__STATUS__Type.html#a0009e30c81ab96efe592d8ef9162d222">NVMCTRL_STATUS_Type::AFIRST</a></div><div class="ttdeci">uint16_t AFIRST</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00368">nvmctrl.h:368</a></div></div>
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<div class="ttc" id="astructNvmctrl_html_a9012a764338f074e9a4a340fdc310614"><div class="ttname"><a href="structNvmctrl.html#a9012a764338f074e9a4a340fdc310614">Nvmctrl::ECCERR</a></div><div class="ttdeci">__I NVMCTRL_ECCERR_Type ECCERR</div><div class="ttdoc">Offset: 0x24 (R/ 32) ECC Error Status Register.</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00593">nvmctrl.h:593</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__SEESTAT__Type_html_a903ea2c27b647efbd3e18c970fed944f"><div class="ttname"><a href="unionNVMCTRL__SEESTAT__Type.html#a903ea2c27b647efbd3e18c970fed944f">NVMCTRL_SEESTAT_Type::BUSY</a></div><div class="ttdeci">uint32_t BUSY</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00544">nvmctrl.h:544</a></div></div>
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<div class="ttc" id="astructNvmctrl_html_a5ab09d2bf2f4d18b43b46cadf7d17657"><div class="ttname"><a href="structNvmctrl.html#a5ab09d2bf2f4d18b43b46cadf7d17657">Nvmctrl::PARAM</a></div><div class="ttdeci">__I NVMCTRL_PARAM_Type PARAM</div><div class="ttdoc">Offset: 0x08 (R/ 32) NVM Parameter.</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00585">nvmctrl.h:585</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTENCLR__Type_html_ad93e68e0100ba0b239128b23b3eab541"><div class="ttname"><a href="unionNVMCTRL__INTENCLR__Type.html#ad93e68e0100ba0b239128b23b3eab541">NVMCTRL_INTENCLR_Type::LOCKE</a></div><div class="ttdeci">uint16_t LOCKE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00223">nvmctrl.h:223</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__PARAM__Type_html_a1614279db2de41ec8c6b19e2b60c873c"><div class="ttname"><a href="unionNVMCTRL__PARAM__Type.html#a1614279db2de41ec8c6b19e2b60c873c">NVMCTRL_PARAM_Type::PSZ</a></div><div class="ttdeci">uint32_t PSZ</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00179">nvmctrl.h:179</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTENCLR__Type_html_a7310a69bb013cea08fac7c568d16bc53"><div class="ttname"><a href="unionNVMCTRL__INTENCLR__Type.html#a7310a69bb013cea08fac7c568d16bc53">NVMCTRL_INTENCLR_Type::ECCSE</a></div><div class="ttdeci">uint16_t ECCSE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00224">nvmctrl.h:224</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__SEECFG__Type_html_a342c8b2e3693e6196d58e1d50f0bf48d"><div class="ttname"><a href="unionNVMCTRL__SEECFG__Type.html#a342c8b2e3693e6196d58e1d50f0bf48d">NVMCTRL_SEECFG_Type::APRDIS</a></div><div class="ttdeci">uint8_t APRDIS</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00518">nvmctrl.h:518</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__PARAM__Type_html_ac83f36a3d86a5e6dd9514bd4568a3a92"><div class="ttname"><a href="unionNVMCTRL__PARAM__Type.html#ac83f36a3d86a5e6dd9514bd4568a3a92">NVMCTRL_PARAM_Type::SEE</a></div><div class="ttdeci">uint32_t SEE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00181">nvmctrl.h:181</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTFLAG__Type_html_a76ef563bd656f0edc99b3957cb49161f"><div class="ttname"><a href="unionNVMCTRL__INTFLAG__Type.html#a76ef563bd656f0edc99b3957cb49161f">NVMCTRL_INTFLAG_Type::SUSP</a></div><div class="ttdeci">__I uint16_t SUSP</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00323">nvmctrl.h:323</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__ECCERR__Type_html_a5bfd3ea917171beaf77840f8cb16e7e4"><div class="ttname"><a href="unionNVMCTRL__ECCERR__Type.html#a5bfd3ea917171beaf77840f8cb16e7e4">NVMCTRL_ECCERR_Type::TYPEH</a></div><div class="ttdeci">uint32_t TYPEH</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00460">nvmctrl.h:460</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTENCLR__Type_html_a575d7ed5e8b871be73fc81559a5fb9da"><div class="ttname"><a href="unionNVMCTRL__INTENCLR__Type.html#a575d7ed5e8b871be73fc81559a5fb9da">NVMCTRL_INTENCLR_Type::SEESFULL</a></div><div class="ttdeci">uint16_t SEESFULL</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00228">nvmctrl.h:228</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__ECCERR__Type_html_a5f72176f3db39db4e6a3fc06caa698d4"><div class="ttname"><a href="unionNVMCTRL__ECCERR__Type.html#a5f72176f3db39db4e6a3fc06caa698d4">NVMCTRL_ECCERR_Type::ADDR</a></div><div class="ttdeci">uint32_t ADDR</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00457">nvmctrl.h:457</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__SEESTAT__Type_html_ac66c07b5e28103c80bc458fa5fb2ded6"><div class="ttname"><a href="unionNVMCTRL__SEESTAT__Type.html#ac66c07b5e28103c80bc458fa5fb2ded6">NVMCTRL_SEESTAT_Type::ASEES</a></div><div class="ttdeci">uint32_t ASEES</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00542">nvmctrl.h:542</a></div></div>
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<div class="ttc" id="astructNvmctrl_html"><div class="ttname"><a href="structNvmctrl.html">Nvmctrl</a></div><div class="ttdoc">NVMCTRL APB hardware registers.</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00580">nvmctrl.h:580</a></div></div>
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<div class="ttc" id="astructNvmctrl_html_a7e8613746f6e54c152a3eb2405ab30ef"><div class="ttname"><a href="structNvmctrl.html#a7e8613746f6e54c152a3eb2405ab30ef">Nvmctrl::CTRLA</a></div><div class="ttdeci">__IO NVMCTRL_CTRLA_Type CTRLA</div><div class="ttdoc">Offset: 0x00 (R/W 16) Control A.</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00581">nvmctrl.h:581</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTENSET__Type_html"><div class="ttname"><a href="unionNVMCTRL__INTENSET__Type.html">NVMCTRL_INTENSET_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00266">nvmctrl.h:266</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTENSET__Type_html_a367a53f996895c84cc7772398c60d03b"><div class="ttname"><a href="unionNVMCTRL__INTENSET__Type.html#a367a53f996895c84cc7772398c60d03b">NVMCTRL_INTENSET_Type::SUSP</a></div><div class="ttdeci">uint16_t SUSP</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00275">nvmctrl.h:275</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__PBLDATA__Type_html_a5d2ff39bbfcd35809ac1ee48daff5685"><div class="ttname"><a href="unionNVMCTRL__PBLDATA__Type.html#a5d2ff39bbfcd35809ac1ee48daff5685">NVMCTRL_PBLDATA_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00441">nvmctrl.h:441</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__ADDR__Type_html"><div class="ttname"><a href="unionNVMCTRL__ADDR__Type.html">NVMCTRL_ADDR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00400">nvmctrl.h:400</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__SEESTAT__Type_html_a93222de39a417e536cb0ac9b99f569f8"><div class="ttname"><a href="unionNVMCTRL__SEESTAT__Type.html#a93222de39a417e536cb0ac9b99f569f8">NVMCTRL_SEESTAT_Type::PSZ</a></div><div class="ttdeci">uint32_t PSZ</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00550">nvmctrl.h:550</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTFLAG__Type_html_ae67c4f1da3c4d05980e4bfa83b9e93a6"><div class="ttname"><a href="unionNVMCTRL__INTFLAG__Type.html#ae67c4f1da3c4d05980e4bfa83b9e93a6">NVMCTRL_INTFLAG_Type::PROGE</a></div><div class="ttdeci">__I uint16_t PROGE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00318">nvmctrl.h:318</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__DBGCTRL__Type_html_a58028d83730f1bc2004e646391aaff37"><div class="ttname"><a href="unionNVMCTRL__DBGCTRL__Type.html#a58028d83730f1bc2004e646391aaff37">NVMCTRL_DBGCTRL_Type::ECCDIS</a></div><div class="ttdeci">uint8_t ECCDIS</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00496">nvmctrl.h:496</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__SEESTAT__Type_html_a6124fd33b572b188fcc4daf30f9f3b06"><div class="ttname"><a href="unionNVMCTRL__SEESTAT__Type.html#a6124fd33b572b188fcc4daf30f9f3b06">NVMCTRL_SEESTAT_Type::SBLK</a></div><div class="ttdeci">uint32_t SBLK</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00548">nvmctrl.h:548</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__DBGCTRL__Type_html_a3d2d0e61e554ede5b97e8c7f55519a7d"><div class="ttname"><a href="unionNVMCTRL__DBGCTRL__Type.html#a3d2d0e61e554ede5b97e8c7f55519a7d">NVMCTRL_DBGCTRL_Type::ECCELOG</a></div><div class="ttdeci">uint8_t ECCELOG</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00497">nvmctrl.h:497</a></div></div>
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<div class="ttc" id="asame54n19a_8h_html_a0d957f1433aaf5d70e4dc2b68288442d"><div class="ttname"><a href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a></div><div class="ttdeci">volatile const uint8_t RoReg8</div><div class="ttdef"><b>Definition:</b> <a href="same54n19a_8h_source.html#l00053">same54n19a.h:53</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__CTRLB__Type_html_a1632d370d1a889790f59cd1e1167f07b"><div class="ttname"><a href="unionNVMCTRL__CTRLB__Type.html#a1632d370d1a889790f59cd1e1167f07b">NVMCTRL_CTRLB_Type::reg</a></div><div class="ttdeci">uint16_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00109">nvmctrl.h:109</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTENSET__Type_html_abf97f6c7c80d31d7a6d1b2f513166dad"><div class="ttname"><a href="unionNVMCTRL__INTENSET__Type.html#abf97f6c7c80d31d7a6d1b2f513166dad">NVMCTRL_INTENSET_Type::SEESOVF</a></div><div class="ttdeci">uint16_t SEESOVF</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00277">nvmctrl.h:277</a></div></div>
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<div class="ttc" id="astructNvmctrl_html_a7c7db1c3ef2a8a290f214ae45db87a83"><div class="ttname"><a href="structNvmctrl.html#a7c7db1c3ef2a8a290f214ae45db87a83">Nvmctrl::INTENCLR</a></div><div class="ttdeci">__IO NVMCTRL_INTENCLR_Type INTENCLR</div><div class="ttdoc">Offset: 0x0C (R/W 16) Interrupt Enable Clear.</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00586">nvmctrl.h:586</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTFLAG__Type_html_ad003775067789cc5ad149fc566d26f20"><div class="ttname"><a href="unionNVMCTRL__INTFLAG__Type.html#ad003775067789cc5ad149fc566d26f20">NVMCTRL_INTFLAG_Type::SEESOVF</a></div><div class="ttdeci">__I uint16_t SEESOVF</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00325">nvmctrl.h:325</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTENCLR__Type_html_a2cfa4ba94c13f8960beaf5459555d1d5"><div class="ttname"><a href="unionNVMCTRL__INTENCLR__Type.html#a2cfa4ba94c13f8960beaf5459555d1d5">NVMCTRL_INTENCLR_Type::ADDRE</a></div><div class="ttdeci">uint16_t ADDRE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00221">nvmctrl.h:221</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTFLAG__Type_html_a188f8921aa82b38489c488cfb99d23f0"><div class="ttname"><a href="unionNVMCTRL__INTFLAG__Type.html#a188f8921aa82b38489c488cfb99d23f0">NVMCTRL_INTFLAG_Type::ADDRE</a></div><div class="ttdeci">__I uint16_t ADDRE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00317">nvmctrl.h:317</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__RUNLOCK__Type_html_a5ae1b23fc98934b9d720c4cb77892613"><div class="ttname"><a href="unionNVMCTRL__RUNLOCK__Type.html#a5ae1b23fc98934b9d720c4cb77892613">NVMCTRL_RUNLOCK_Type::RUNLOCK</a></div><div class="ttdeci">uint32_t RUNLOCK</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00421">nvmctrl.h:421</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__CTRLB__Type_html_ab8c908cb79b7f76453eeb8d8274c1e78"><div class="ttname"><a href="unionNVMCTRL__CTRLB__Type.html#ab8c908cb79b7f76453eeb8d8274c1e78">NVMCTRL_CTRLB_Type::CMDEX</a></div><div class="ttdeci">uint16_t CMDEX</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00107">nvmctrl.h:107</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTENSET__Type_html_a7e11e9831f0d712a0570fc5b8e157a80"><div class="ttname"><a href="unionNVMCTRL__INTENSET__Type.html#a7e11e9831f0d712a0570fc5b8e157a80">NVMCTRL_INTENSET_Type::DONE</a></div><div class="ttdeci">uint16_t DONE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00268">nvmctrl.h:268</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTENCLR__Type_html_aed69c41dc59031c87a1df89d327ea2be"><div class="ttname"><a href="unionNVMCTRL__INTENCLR__Type.html#aed69c41dc59031c87a1df89d327ea2be">NVMCTRL_INTENCLR_Type::PROGE</a></div><div class="ttdeci">uint16_t PROGE</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00222">nvmctrl.h:222</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__PBLDATA__Type_html"><div class="ttname"><a href="unionNVMCTRL__PBLDATA__Type.html">NVMCTRL_PBLDATA_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00437">nvmctrl.h:437</a></div></div>
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<div class="ttc" id="astructNvmctrl_html_ac7ffb9869923d722cdbb8d5cf66778e2"><div class="ttname"><a href="structNvmctrl.html#ac7ffb9869923d722cdbb8d5cf66778e2">Nvmctrl::SEESTAT</a></div><div class="ttdeci">__I NVMCTRL_SEESTAT_Type SEESTAT</div><div class="ttdoc">Offset: 0x2C (R/ 32) SmartEEPROM Status Register.</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00598">nvmctrl.h:598</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__CTRLA__Type_html_a3437a1c23022e60b41149d46aefbb8a6"><div class="ttname"><a href="unionNVMCTRL__CTRLA__Type.html#a3437a1c23022e60b41149d46aefbb8a6">NVMCTRL_CTRLA_Type::AHBNS0</a></div><div class="ttdeci">uint16_t AHBNS0</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00052">nvmctrl.h:52</a></div></div>
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<div class="ttc" id="aunionNVMCTRL__INTFLAG__Type_html_a27460c6fb274bc39d76ed2b04bef2c71"><div class="ttname"><a href="unionNVMCTRL__INTFLAG__Type.html#a27460c6fb274bc39d76ed2b04bef2c71">NVMCTRL_INTFLAG_Type::SEEWRC</a></div><div class="ttdeci">__I uint16_t SEEWRC</div><div class="ttdef"><b>Definition:</b> <a href="component_2nvmctrl_8h_source.html#l00326">nvmctrl.h:326</a></div></div>
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