You cannot select more than 25 topics
Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
774 lines
171 KiB
HTML
774 lines
171 KiB
HTML
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "https://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
|
|
<html xmlns="http://www.w3.org/1999/xhtml">
|
|
<head>
|
|
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
|
|
<meta http-equiv="X-UA-Compatible" content="IE=9"/>
|
|
<meta name="generator" content="Doxygen 1.8.20"/>
|
|
<meta name="viewport" content="width=device-width, initial-scale=1"/>
|
|
<title>SAME54P20A Test Project: /storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/component/dsu.h Source File</title>
|
|
<link href="tabs.css" rel="stylesheet" type="text/css"/>
|
|
<script type="text/javascript" src="jquery.js"></script>
|
|
<script type="text/javascript" src="dynsections.js"></script>
|
|
<link href="search/search.css" rel="stylesheet" type="text/css"/>
|
|
<script type="text/javascript" src="search/searchdata.js"></script>
|
|
<script type="text/javascript" src="search/search.js"></script>
|
|
<link href="doxygen.css" rel="stylesheet" type="text/css" />
|
|
</head>
|
|
<body>
|
|
<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
|
|
<div id="titlearea">
|
|
<table cellspacing="0" cellpadding="0">
|
|
<tbody>
|
|
<tr style="height: 56px;">
|
|
<td id="projectalign" style="padding-left: 0.5em;">
|
|
<div id="projectname">SAME54P20A Test Project
|
|
</div>
|
|
</td>
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
</div>
|
|
<!-- end header part -->
|
|
<!-- Generated by Doxygen 1.8.20 -->
|
|
<script type="text/javascript">
|
|
/* @license magnet:?xt=urn:btih:cf05388f2679ee054f2beb29a391d25f4e673ac3&dn=gpl-2.0.txt GPL-v2 */
|
|
var searchBox = new SearchBox("searchBox", "search",false,'Search');
|
|
/* @license-end */
|
|
</script>
|
|
<script type="text/javascript" src="menudata.js"></script>
|
|
<script type="text/javascript" src="menu.js"></script>
|
|
<script type="text/javascript">
|
|
/* @license magnet:?xt=urn:btih:cf05388f2679ee054f2beb29a391d25f4e673ac3&dn=gpl-2.0.txt GPL-v2 */
|
|
$(function() {
|
|
initMenu('',true,false,'search.php','Search');
|
|
$(document).ready(function() { init_search(); });
|
|
});
|
|
/* @license-end */</script>
|
|
<div id="main-nav"></div>
|
|
<!-- window showing the filter options -->
|
|
<div id="MSearchSelectWindow"
|
|
onmouseover="return searchBox.OnSearchSelectShow()"
|
|
onmouseout="return searchBox.OnSearchSelectHide()"
|
|
onkeydown="return searchBox.OnSearchSelectKey(event)">
|
|
</div>
|
|
|
|
<!-- iframe showing the search results (closed by default) -->
|
|
<div id="MSearchResultsWindow">
|
|
<iframe src="javascript:void(0)" frameborder="0"
|
|
name="MSearchResults" id="MSearchResults">
|
|
</iframe>
|
|
</div>
|
|
|
|
<div id="nav-path" class="navpath">
|
|
<ul>
|
|
<li class="navelem"><a class="el" href="dir_ea9599923402ca8ab47fc3e495999dea.html">arch</a></li><li class="navelem"><a class="el" href="dir_9e929c73feaf15d3695ce4c76b483065.html">arm</a></li><li class="navelem"><a class="el" href="dir_58955c0f35a9c3d48181d2be53994c7b.html">SAME54</a></li><li class="navelem"><a class="el" href="dir_09e97e512ca7d4e6cd359f1c5497eeba.html">SAME54A</a></li><li class="navelem"><a class="el" href="dir_4b38d63e5c584a4d6c9001c789e1829f.html">mcu</a></li><li class="navelem"><a class="el" href="dir_d4fc57b996dc082ef023092a5b7d90fc.html">inc</a></li><li class="navelem"><a class="el" href="dir_2bb2e10400507f879251f0324a0a8c7c.html">component</a></li> </ul>
|
|
</div>
|
|
</div><!-- top -->
|
|
<div class="header">
|
|
<div class="headertitle">
|
|
<div class="title">dsu.h</div> </div>
|
|
</div><!--header-->
|
|
<div class="contents">
|
|
<a href="component_2dsu_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>  </div>
|
|
<div class="line"><a name="l00030"></a><span class="lineno"> 30</span> <span class="preprocessor">#ifndef _SAME54_DSU_COMPONENT_</span></div>
|
|
<div class="line"><a name="l00031"></a><span class="lineno"> 31</span> <span class="preprocessor">#define _SAME54_DSU_COMPONENT_</span></div>
|
|
<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>  </div>
|
|
<div class="line"><a name="l00033"></a><span class="lineno"> 33</span> <span class="comment">/* ========================================================================== */</span></div>
|
|
<div class="line"><a name="l00035"></a><span class="lineno"> 35</span> <span class="comment">/* ========================================================================== */</span></div>
|
|
<div class="line"><a name="l00038"></a><span class="lineno"> 38</span>  </div>
|
|
<div class="line"><a name="l00039"></a><span class="lineno"> 39</span> <span class="preprocessor">#define DSU_U2410</span></div>
|
|
<div class="line"><a name="l00040"></a><span class="lineno"> 40</span> <span class="preprocessor">#define REV_DSU 0x100</span></div>
|
|
<div class="line"><a name="l00041"></a><span class="lineno"> 41</span>  </div>
|
|
<div class="line"><a name="l00042"></a><span class="lineno"> 42</span> <span class="comment">/* -------- DSU_CTRL : (DSU Offset: 0x0000) ( /W 8) Control -------- */</span></div>
|
|
<div class="line"><a name="l00043"></a><span class="lineno"> 43</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
|
|
<div class="line"><a name="l00044"></a><span class="lineno"><a class="line" href="unionDSU__CTRL__Type.html"> 44</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
|
|
<div class="line"><a name="l00045"></a><span class="lineno"> 45</span>  <span class="keyword">struct </span>{</div>
|
|
<div class="line"><a name="l00046"></a><span class="lineno"><a class="line" href="unionDSU__CTRL__Type.html#a73a94d5d5c3dc5b218c6bc1e4bc6165d"> 46</a></span>  uint8_t <a class="code" href="unionDSU__CTRL__Type.html#a73a94d5d5c3dc5b218c6bc1e4bc6165d">SWRST</a>:1; </div>
|
|
<div class="line"><a name="l00047"></a><span class="lineno"><a class="line" href="unionDSU__CTRL__Type.html#a97980a8d19e1c87006e54c0a0d30972e"> 47</a></span>  uint8_t :1; </div>
|
|
<div class="line"><a name="l00048"></a><span class="lineno"><a class="line" href="unionDSU__CTRL__Type.html#a9a351c7d3ed4db72fe199f29441b24e4"> 48</a></span>  uint8_t <a class="code" href="unionDSU__CTRL__Type.html#a9a351c7d3ed4db72fe199f29441b24e4">CRC</a>:1; </div>
|
|
<div class="line"><a name="l00049"></a><span class="lineno"><a class="line" href="unionDSU__CTRL__Type.html#a0b11d4226d2417422ef909e10ed17bc9"> 49</a></span>  uint8_t <a class="code" href="unionDSU__CTRL__Type.html#a0b11d4226d2417422ef909e10ed17bc9">MBIST</a>:1; </div>
|
|
<div class="line"><a name="l00050"></a><span class="lineno"><a class="line" href="unionDSU__CTRL__Type.html#a197b7e23186112885542ca537e8083ba"> 50</a></span>  uint8_t <a class="code" href="unionDSU__CTRL__Type.html#a197b7e23186112885542ca537e8083ba">CE</a>:1; </div>
|
|
<div class="line"><a name="l00051"></a><span class="lineno"><a class="line" href="unionDSU__CTRL__Type.html#aa9101a767b137142f96f342663dd7bab"> 51</a></span>  uint8_t :1; </div>
|
|
<div class="line"><a name="l00052"></a><span class="lineno"><a class="line" href="unionDSU__CTRL__Type.html#a65fe38370088ef03ea4be1a7e98d91b6"> 52</a></span>  uint8_t <a class="code" href="unionDSU__CTRL__Type.html#a65fe38370088ef03ea4be1a7e98d91b6">ARR</a>:1; </div>
|
|
<div class="line"><a name="l00053"></a><span class="lineno"><a class="line" href="unionDSU__CTRL__Type.html#a88845326ae957d9f9ce3c15a0cac4963"> 53</a></span>  uint8_t <a class="code" href="unionDSU__CTRL__Type.html#a88845326ae957d9f9ce3c15a0cac4963">SMSA</a>:1; </div>
|
|
<div class="line"><a name="l00054"></a><span class="lineno"><a class="line" href="unionDSU__CTRL__Type.html#a4167e608f1d7690780cb6fd31b74bc00"> 54</a></span>  } bit; </div>
|
|
<div class="line"><a name="l00055"></a><span class="lineno"><a class="line" href="unionDSU__CTRL__Type.html#aead0ceef9a72bc2e2e07d865be80b89c"> 55</a></span>  uint8_t <a class="code" href="unionDSU__CTRL__Type.html#aead0ceef9a72bc2e2e07d865be80b89c">reg</a>; </div>
|
|
<div class="line"><a name="l00056"></a><span class="lineno"> 56</span> } <a class="code" href="unionDSU__CTRL__Type.html">DSU_CTRL_Type</a>;</div>
|
|
<div class="line"><a name="l00057"></a><span class="lineno"> 57</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00058"></a><span class="lineno"> 58</span>  </div>
|
|
<div class="line"><a name="l00059"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a16d35bf197958eb309724f1d0fd8e842"> 59</a></span> <span class="preprocessor">#define DSU_CTRL_OFFSET 0x0000 </span></div>
|
|
<div class="line"><a name="l00060"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a2d27ac9a8ec8798ed407281b387c2fd0"> 60</a></span> <span class="preprocessor">#define DSU_CTRL_RESETVALUE _U_(0x00) </span></div>
|
|
<div class="line"><a name="l00062"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a2d08bbc3f34f53bc95415ac1c3d2ae72"> 62</a></span> <span class="preprocessor">#define DSU_CTRL_SWRST_Pos 0 </span></div>
|
|
<div class="line"><a name="l00063"></a><span class="lineno"> 63</span> <span class="preprocessor">#define DSU_CTRL_SWRST (_U_(0x1) << DSU_CTRL_SWRST_Pos)</span></div>
|
|
<div class="line"><a name="l00064"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a3f42a18f629eccf5698c46d591b827bc"> 64</a></span> <span class="preprocessor">#define DSU_CTRL_CRC_Pos 2 </span></div>
|
|
<div class="line"><a name="l00065"></a><span class="lineno"> 65</span> <span class="preprocessor">#define DSU_CTRL_CRC (_U_(0x1) << DSU_CTRL_CRC_Pos)</span></div>
|
|
<div class="line"><a name="l00066"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ae2f8bb8c8fde9739e8e15e76b5a052fc"> 66</a></span> <span class="preprocessor">#define DSU_CTRL_MBIST_Pos 3 </span></div>
|
|
<div class="line"><a name="l00067"></a><span class="lineno"> 67</span> <span class="preprocessor">#define DSU_CTRL_MBIST (_U_(0x1) << DSU_CTRL_MBIST_Pos)</span></div>
|
|
<div class="line"><a name="l00068"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#aef5ca1fd2f78e579bae1661fb54ccae7"> 68</a></span> <span class="preprocessor">#define DSU_CTRL_CE_Pos 4 </span></div>
|
|
<div class="line"><a name="l00069"></a><span class="lineno"> 69</span> <span class="preprocessor">#define DSU_CTRL_CE (_U_(0x1) << DSU_CTRL_CE_Pos)</span></div>
|
|
<div class="line"><a name="l00070"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a73ceacd04bd9669ed1853da944fa0c4a"> 70</a></span> <span class="preprocessor">#define DSU_CTRL_ARR_Pos 6 </span></div>
|
|
<div class="line"><a name="l00071"></a><span class="lineno"> 71</span> <span class="preprocessor">#define DSU_CTRL_ARR (_U_(0x1) << DSU_CTRL_ARR_Pos)</span></div>
|
|
<div class="line"><a name="l00072"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ae5bcaa4f2c2619c8cedb1672a23bb902"> 72</a></span> <span class="preprocessor">#define DSU_CTRL_SMSA_Pos 7 </span></div>
|
|
<div class="line"><a name="l00073"></a><span class="lineno"> 73</span> <span class="preprocessor">#define DSU_CTRL_SMSA (_U_(0x1) << DSU_CTRL_SMSA_Pos)</span></div>
|
|
<div class="line"><a name="l00074"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ad7cc167d8a8791942e3149bd93278134"> 74</a></span> <span class="preprocessor">#define DSU_CTRL_MASK _U_(0xDD) </span></div>
|
|
<div class="line"><a name="l00076"></a><span class="lineno"> 76</span> <span class="preprocessor"></span><span class="comment">/* -------- DSU_STATUSA : (DSU Offset: 0x0001) (R/W 8) Status A -------- */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00077"></a><span class="lineno"> 77</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
|
|
<div class="line"><a name="l00078"></a><span class="lineno"><a class="line" href="unionDSU__STATUSA__Type.html"> 78</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
|
|
<div class="line"><a name="l00079"></a><span class="lineno"> 79</span>  <span class="keyword">struct </span>{</div>
|
|
<div class="line"><a name="l00080"></a><span class="lineno"><a class="line" href="unionDSU__STATUSA__Type.html#aff619e1a118784b3e8600a50128db18c"> 80</a></span>  uint8_t <a class="code" href="unionDSU__STATUSA__Type.html#aff619e1a118784b3e8600a50128db18c">DONE</a>:1; </div>
|
|
<div class="line"><a name="l00081"></a><span class="lineno"><a class="line" href="unionDSU__STATUSA__Type.html#aa8f9dffc31935fc4537884bf167786df"> 81</a></span>  uint8_t <a class="code" href="unionDSU__STATUSA__Type.html#aa8f9dffc31935fc4537884bf167786df">CRSTEXT</a>:1; </div>
|
|
<div class="line"><a name="l00082"></a><span class="lineno"><a class="line" href="unionDSU__STATUSA__Type.html#a23415dfa2ba81d7e98774bd358c40db8"> 82</a></span>  uint8_t <a class="code" href="unionDSU__STATUSA__Type.html#a23415dfa2ba81d7e98774bd358c40db8">BERR</a>:1; </div>
|
|
<div class="line"><a name="l00083"></a><span class="lineno"><a class="line" href="unionDSU__STATUSA__Type.html#aba8f270d5cf8d7fee472b5888bea81b8"> 83</a></span>  uint8_t <a class="code" href="unionDSU__STATUSA__Type.html#aba8f270d5cf8d7fee472b5888bea81b8">FAIL</a>:1; </div>
|
|
<div class="line"><a name="l00084"></a><span class="lineno"><a class="line" href="unionDSU__STATUSA__Type.html#a8fefe4470a39f6ef4547a501dbf028b0"> 84</a></span>  uint8_t <a class="code" href="unionDSU__STATUSA__Type.html#a8fefe4470a39f6ef4547a501dbf028b0">PERR</a>:1; </div>
|
|
<div class="line"><a name="l00085"></a><span class="lineno"><a class="line" href="unionDSU__STATUSA__Type.html#ad940916414d8eba905957b05b8900090"> 85</a></span>  uint8_t :3; </div>
|
|
<div class="line"><a name="l00086"></a><span class="lineno"><a class="line" href="unionDSU__STATUSA__Type.html#ae63ac3449df4f73e33d01958bb6e45da"> 86</a></span>  } bit; </div>
|
|
<div class="line"><a name="l00087"></a><span class="lineno"><a class="line" href="unionDSU__STATUSA__Type.html#a6c012a1306fb8f409347e5a8a333998a"> 87</a></span>  uint8_t <a class="code" href="unionDSU__STATUSA__Type.html#a6c012a1306fb8f409347e5a8a333998a">reg</a>; </div>
|
|
<div class="line"><a name="l00088"></a><span class="lineno"> 88</span> } <a class="code" href="unionDSU__STATUSA__Type.html">DSU_STATUSA_Type</a>;</div>
|
|
<div class="line"><a name="l00089"></a><span class="lineno"> 89</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00090"></a><span class="lineno"> 90</span>  </div>
|
|
<div class="line"><a name="l00091"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a5bbcb19f47173c3bdee8ce58b612eac0"> 91</a></span> <span class="preprocessor">#define DSU_STATUSA_OFFSET 0x0001 </span></div>
|
|
<div class="line"><a name="l00092"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a39ce3f6cadacf2ea11a0e8ab5d6bcd4b"> 92</a></span> <span class="preprocessor">#define DSU_STATUSA_RESETVALUE _U_(0x00) </span></div>
|
|
<div class="line"><a name="l00094"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a608007c6aa3ae0221483e370d9ca999b"> 94</a></span> <span class="preprocessor">#define DSU_STATUSA_DONE_Pos 0 </span></div>
|
|
<div class="line"><a name="l00095"></a><span class="lineno"> 95</span> <span class="preprocessor">#define DSU_STATUSA_DONE (_U_(0x1) << DSU_STATUSA_DONE_Pos)</span></div>
|
|
<div class="line"><a name="l00096"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ab5c6d644e1ec7f67cf2a9ad97a5262a2"> 96</a></span> <span class="preprocessor">#define DSU_STATUSA_CRSTEXT_Pos 1 </span></div>
|
|
<div class="line"><a name="l00097"></a><span class="lineno"> 97</span> <span class="preprocessor">#define DSU_STATUSA_CRSTEXT (_U_(0x1) << DSU_STATUSA_CRSTEXT_Pos)</span></div>
|
|
<div class="line"><a name="l00098"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#afa02b78e838184c6f5a895f0f16c213a"> 98</a></span> <span class="preprocessor">#define DSU_STATUSA_BERR_Pos 2 </span></div>
|
|
<div class="line"><a name="l00099"></a><span class="lineno"> 99</span> <span class="preprocessor">#define DSU_STATUSA_BERR (_U_(0x1) << DSU_STATUSA_BERR_Pos)</span></div>
|
|
<div class="line"><a name="l00100"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a379cd81ca596d64fff4cdf4cd0642e9d"> 100</a></span> <span class="preprocessor">#define DSU_STATUSA_FAIL_Pos 3 </span></div>
|
|
<div class="line"><a name="l00101"></a><span class="lineno"> 101</span> <span class="preprocessor">#define DSU_STATUSA_FAIL (_U_(0x1) << DSU_STATUSA_FAIL_Pos)</span></div>
|
|
<div class="line"><a name="l00102"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a2d5f7f64db290d822709d358b9d8baf6"> 102</a></span> <span class="preprocessor">#define DSU_STATUSA_PERR_Pos 4 </span></div>
|
|
<div class="line"><a name="l00103"></a><span class="lineno"> 103</span> <span class="preprocessor">#define DSU_STATUSA_PERR (_U_(0x1) << DSU_STATUSA_PERR_Pos)</span></div>
|
|
<div class="line"><a name="l00104"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a054a84324fddaaecb1b58f35c2314bc7"> 104</a></span> <span class="preprocessor">#define DSU_STATUSA_MASK _U_(0x1F) </span></div>
|
|
<div class="line"><a name="l00106"></a><span class="lineno"> 106</span> <span class="preprocessor"></span><span class="comment">/* -------- DSU_STATUSB : (DSU Offset: 0x0002) (R/ 8) Status B -------- */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00107"></a><span class="lineno"> 107</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
|
|
<div class="line"><a name="l00108"></a><span class="lineno"><a class="line" href="unionDSU__STATUSB__Type.html"> 108</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
|
|
<div class="line"><a name="l00109"></a><span class="lineno"> 109</span>  <span class="keyword">struct </span>{</div>
|
|
<div class="line"><a name="l00110"></a><span class="lineno"><a class="line" href="unionDSU__STATUSB__Type.html#a9db72198105203a1f2a2408e0cea70d9"> 110</a></span>  uint8_t <a class="code" href="unionDSU__STATUSB__Type.html#a9db72198105203a1f2a2408e0cea70d9">PROT</a>:1; </div>
|
|
<div class="line"><a name="l00111"></a><span class="lineno"><a class="line" href="unionDSU__STATUSB__Type.html#aad7ae489397e242eeaa42e11e32654ec"> 111</a></span>  uint8_t <a class="code" href="unionDSU__STATUSB__Type.html#aad7ae489397e242eeaa42e11e32654ec">DBGPRES</a>:1; </div>
|
|
<div class="line"><a name="l00112"></a><span class="lineno"><a class="line" href="unionDSU__STATUSB__Type.html#ad3344aa28fed34c08fe7c730282fb40d"> 112</a></span>  uint8_t <a class="code" href="unionDSU__STATUSB__Type.html#ad3344aa28fed34c08fe7c730282fb40d">DCCD0</a>:1; </div>
|
|
<div class="line"><a name="l00113"></a><span class="lineno"><a class="line" href="unionDSU__STATUSB__Type.html#a3d465bfe936ba897bb74af320f5cc41a"> 113</a></span>  uint8_t <a class="code" href="unionDSU__STATUSB__Type.html#a3d465bfe936ba897bb74af320f5cc41a">DCCD1</a>:1; </div>
|
|
<div class="line"><a name="l00114"></a><span class="lineno"><a class="line" href="unionDSU__STATUSB__Type.html#a8d1bbe448ed8ffb57221323c43f585c3"> 114</a></span>  uint8_t <a class="code" href="unionDSU__STATUSB__Type.html#a8d1bbe448ed8ffb57221323c43f585c3">HPE</a>:1; </div>
|
|
<div class="line"><a name="l00115"></a><span class="lineno"><a class="line" href="unionDSU__STATUSB__Type.html#aeeaaab9cca0305cf41d31c2861a3190b"> 115</a></span>  uint8_t <a class="code" href="unionDSU__STATUSB__Type.html#aeeaaab9cca0305cf41d31c2861a3190b">CELCK</a>:1; </div>
|
|
<div class="line"><a name="l00116"></a><span class="lineno"><a class="line" href="unionDSU__STATUSB__Type.html#a204d4c32c3f4708b2e7747717d1645f2"> 116</a></span>  uint8_t :2; </div>
|
|
<div class="line"><a name="l00117"></a><span class="lineno"><a class="line" href="unionDSU__STATUSB__Type.html#a891988851b7eae496c16939a2df954ce"> 117</a></span>  } bit; </div>
|
|
<div class="line"><a name="l00118"></a><span class="lineno"> 118</span>  <span class="keyword">struct </span>{</div>
|
|
<div class="line"><a name="l00119"></a><span class="lineno"> 119</span>  uint8_t :2; </div>
|
|
<div class="line"><a name="l00120"></a><span class="lineno"><a class="line" href="unionDSU__STATUSB__Type.html#a952de07a52a1d8d6e928126ebcbc6d7b"> 120</a></span>  uint8_t <a class="code" href="unionDSU__STATUSB__Type.html#a952de07a52a1d8d6e928126ebcbc6d7b">DCCD</a>:2; </div>
|
|
<div class="line"><a name="l00121"></a><span class="lineno"><a class="line" href="unionDSU__STATUSB__Type.html#a7639bdd3ca46a925307b2b86e0066999"> 121</a></span>  uint8_t :4; </div>
|
|
<div class="line"><a name="l00122"></a><span class="lineno"><a class="line" href="unionDSU__STATUSB__Type.html#a40e3bfafad34350ec761082269142cff"> 122</a></span>  } vec; </div>
|
|
<div class="line"><a name="l00123"></a><span class="lineno"><a class="line" href="unionDSU__STATUSB__Type.html#aa96f9c8c3695cc1a4535a02983201946"> 123</a></span>  uint8_t <a class="code" href="unionDSU__STATUSB__Type.html#aa96f9c8c3695cc1a4535a02983201946">reg</a>; </div>
|
|
<div class="line"><a name="l00124"></a><span class="lineno"> 124</span> } <a class="code" href="unionDSU__STATUSB__Type.html">DSU_STATUSB_Type</a>;</div>
|
|
<div class="line"><a name="l00125"></a><span class="lineno"> 125</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00126"></a><span class="lineno"> 126</span>  </div>
|
|
<div class="line"><a name="l00127"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a6633a1098b38470e1cefd46795f0cf93"> 127</a></span> <span class="preprocessor">#define DSU_STATUSB_OFFSET 0x0002 </span></div>
|
|
<div class="line"><a name="l00128"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#aef2faaac59541260b63b58569da04dee"> 128</a></span> <span class="preprocessor">#define DSU_STATUSB_RESETVALUE _U_(0x00) </span></div>
|
|
<div class="line"><a name="l00130"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#acd0a6b404b8ba52afe784b653e1b4ee7"> 130</a></span> <span class="preprocessor">#define DSU_STATUSB_PROT_Pos 0 </span></div>
|
|
<div class="line"><a name="l00131"></a><span class="lineno"> 131</span> <span class="preprocessor">#define DSU_STATUSB_PROT (_U_(0x1) << DSU_STATUSB_PROT_Pos)</span></div>
|
|
<div class="line"><a name="l00132"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a36bd47009661963b8c71c9dc4cb62ecb"> 132</a></span> <span class="preprocessor">#define DSU_STATUSB_DBGPRES_Pos 1 </span></div>
|
|
<div class="line"><a name="l00133"></a><span class="lineno"> 133</span> <span class="preprocessor">#define DSU_STATUSB_DBGPRES (_U_(0x1) << DSU_STATUSB_DBGPRES_Pos)</span></div>
|
|
<div class="line"><a name="l00134"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#adc27fc361eacd9fdd30cad6459bdc7c4"> 134</a></span> <span class="preprocessor">#define DSU_STATUSB_DCCD0_Pos 2 </span></div>
|
|
<div class="line"><a name="l00135"></a><span class="lineno"> 135</span> <span class="preprocessor">#define DSU_STATUSB_DCCD0 (_U_(1) << DSU_STATUSB_DCCD0_Pos)</span></div>
|
|
<div class="line"><a name="l00136"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a43c23fdfaa496f809db2e9b7d0bea8a9"> 136</a></span> <span class="preprocessor">#define DSU_STATUSB_DCCD1_Pos 3 </span></div>
|
|
<div class="line"><a name="l00137"></a><span class="lineno"> 137</span> <span class="preprocessor">#define DSU_STATUSB_DCCD1 (_U_(1) << DSU_STATUSB_DCCD1_Pos)</span></div>
|
|
<div class="line"><a name="l00138"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a93a180646ddd3ecc99793ef1b5bde5aa"> 138</a></span> <span class="preprocessor">#define DSU_STATUSB_DCCD_Pos 2 </span></div>
|
|
<div class="line"><a name="l00139"></a><span class="lineno"> 139</span> <span class="preprocessor">#define DSU_STATUSB_DCCD_Msk (_U_(0x3) << DSU_STATUSB_DCCD_Pos)</span></div>
|
|
<div class="line"><a name="l00140"></a><span class="lineno"> 140</span> <span class="preprocessor">#define DSU_STATUSB_DCCD(value) (DSU_STATUSB_DCCD_Msk & ((value) << DSU_STATUSB_DCCD_Pos))</span></div>
|
|
<div class="line"><a name="l00141"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a99433528b614cd9294b33c828a1a5003"> 141</a></span> <span class="preprocessor">#define DSU_STATUSB_HPE_Pos 4 </span></div>
|
|
<div class="line"><a name="l00142"></a><span class="lineno"> 142</span> <span class="preprocessor">#define DSU_STATUSB_HPE (_U_(0x1) << DSU_STATUSB_HPE_Pos)</span></div>
|
|
<div class="line"><a name="l00143"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#aa99f386d6e5e61367d5e06aaab7ccb54"> 143</a></span> <span class="preprocessor">#define DSU_STATUSB_CELCK_Pos 5 </span></div>
|
|
<div class="line"><a name="l00144"></a><span class="lineno"> 144</span> <span class="preprocessor">#define DSU_STATUSB_CELCK (_U_(0x1) << DSU_STATUSB_CELCK_Pos)</span></div>
|
|
<div class="line"><a name="l00145"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a81d42e65d6d856087a32f89cd8ebcc23"> 145</a></span> <span class="preprocessor">#define DSU_STATUSB_MASK _U_(0x3F) </span></div>
|
|
<div class="line"><a name="l00147"></a><span class="lineno"> 147</span> <span class="preprocessor"></span><span class="comment">/* -------- DSU_ADDR : (DSU Offset: 0x0004) (R/W 32) Address -------- */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00148"></a><span class="lineno"> 148</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
|
|
<div class="line"><a name="l00149"></a><span class="lineno"><a class="line" href="unionDSU__ADDR__Type.html"> 149</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
|
|
<div class="line"><a name="l00150"></a><span class="lineno"> 150</span>  <span class="keyword">struct </span>{</div>
|
|
<div class="line"><a name="l00151"></a><span class="lineno"><a class="line" href="unionDSU__ADDR__Type.html#a3504f788bdf784989bb670de25fd26a7"> 151</a></span>  uint32_t <a class="code" href="unionDSU__ADDR__Type.html#a3504f788bdf784989bb670de25fd26a7">AMOD</a>:2; </div>
|
|
<div class="line"><a name="l00152"></a><span class="lineno"><a class="line" href="unionDSU__ADDR__Type.html#af80527c464042fc13266915c73e62ef4"> 152</a></span>  uint32_t <a class="code" href="unionDSU__ADDR__Type.html#af80527c464042fc13266915c73e62ef4">ADDR</a>:30; </div>
|
|
<div class="line"><a name="l00153"></a><span class="lineno"><a class="line" href="unionDSU__ADDR__Type.html#a91f3dee4dbbdbb0e083aa37e5b6a7f14"> 153</a></span>  } bit; </div>
|
|
<div class="line"><a name="l00154"></a><span class="lineno"><a class="line" href="unionDSU__ADDR__Type.html#a21c57af42627a2ac52a4e1599582c241"> 154</a></span>  uint32_t <a class="code" href="unionDSU__ADDR__Type.html#a21c57af42627a2ac52a4e1599582c241">reg</a>; </div>
|
|
<div class="line"><a name="l00155"></a><span class="lineno"> 155</span> } <a class="code" href="unionDSU__ADDR__Type.html">DSU_ADDR_Type</a>;</div>
|
|
<div class="line"><a name="l00156"></a><span class="lineno"> 156</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00157"></a><span class="lineno"> 157</span>  </div>
|
|
<div class="line"><a name="l00158"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#abf4bde31f974267a5be16e838fb4c385"> 158</a></span> <span class="preprocessor">#define DSU_ADDR_OFFSET 0x0004 </span></div>
|
|
<div class="line"><a name="l00159"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a20348917b1dead19b4cf118c7470c2e4"> 159</a></span> <span class="preprocessor">#define DSU_ADDR_RESETVALUE _U_(0x00000000) </span></div>
|
|
<div class="line"><a name="l00161"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ad4121595b48dfe29aaec9b674634bc57"> 161</a></span> <span class="preprocessor">#define DSU_ADDR_AMOD_Pos 0 </span></div>
|
|
<div class="line"><a name="l00162"></a><span class="lineno"> 162</span> <span class="preprocessor">#define DSU_ADDR_AMOD_Msk (_U_(0x3) << DSU_ADDR_AMOD_Pos)</span></div>
|
|
<div class="line"><a name="l00163"></a><span class="lineno"> 163</span> <span class="preprocessor">#define DSU_ADDR_AMOD(value) (DSU_ADDR_AMOD_Msk & ((value) << DSU_ADDR_AMOD_Pos))</span></div>
|
|
<div class="line"><a name="l00164"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a028619d29a30f3abc4ff67ce0797952c"> 164</a></span> <span class="preprocessor">#define DSU_ADDR_ADDR_Pos 2 </span></div>
|
|
<div class="line"><a name="l00165"></a><span class="lineno"> 165</span> <span class="preprocessor">#define DSU_ADDR_ADDR_Msk (_U_(0x3FFFFFFF) << DSU_ADDR_ADDR_Pos)</span></div>
|
|
<div class="line"><a name="l00166"></a><span class="lineno"> 166</span> <span class="preprocessor">#define DSU_ADDR_ADDR(value) (DSU_ADDR_ADDR_Msk & ((value) << DSU_ADDR_ADDR_Pos))</span></div>
|
|
<div class="line"><a name="l00167"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#adfb5c4d624bfbe3736315ad712fc3238"> 167</a></span> <span class="preprocessor">#define DSU_ADDR_MASK _U_(0xFFFFFFFF) </span></div>
|
|
<div class="line"><a name="l00169"></a><span class="lineno"> 169</span> <span class="preprocessor"></span><span class="comment">/* -------- DSU_LENGTH : (DSU Offset: 0x0008) (R/W 32) Length -------- */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00170"></a><span class="lineno"> 170</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
|
|
<div class="line"><a name="l00171"></a><span class="lineno"><a class="line" href="unionDSU__LENGTH__Type.html"> 171</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
|
|
<div class="line"><a name="l00172"></a><span class="lineno"> 172</span>  <span class="keyword">struct </span>{</div>
|
|
<div class="line"><a name="l00173"></a><span class="lineno"><a class="line" href="unionDSU__LENGTH__Type.html#a470b7f7a7c53103929dfeb355678b0a2"> 173</a></span>  uint32_t :2; </div>
|
|
<div class="line"><a name="l00174"></a><span class="lineno"><a class="line" href="unionDSU__LENGTH__Type.html#adadf43167c8c012916cd60e1916a93f3"> 174</a></span>  uint32_t <a class="code" href="unionDSU__LENGTH__Type.html#adadf43167c8c012916cd60e1916a93f3">LENGTH</a>:30; </div>
|
|
<div class="line"><a name="l00175"></a><span class="lineno"><a class="line" href="unionDSU__LENGTH__Type.html#ae4348e05f57a8576985d572a31edfedb"> 175</a></span>  } bit; </div>
|
|
<div class="line"><a name="l00176"></a><span class="lineno"><a class="line" href="unionDSU__LENGTH__Type.html#a6c1bdd63165dd29edf1dc8a4d775cffb"> 176</a></span>  uint32_t <a class="code" href="unionDSU__LENGTH__Type.html#a6c1bdd63165dd29edf1dc8a4d775cffb">reg</a>; </div>
|
|
<div class="line"><a name="l00177"></a><span class="lineno"> 177</span> } <a class="code" href="unionDSU__LENGTH__Type.html">DSU_LENGTH_Type</a>;</div>
|
|
<div class="line"><a name="l00178"></a><span class="lineno"> 178</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00179"></a><span class="lineno"> 179</span>  </div>
|
|
<div class="line"><a name="l00180"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#aa51326ede30d0596a90a8758846527b9"> 180</a></span> <span class="preprocessor">#define DSU_LENGTH_OFFSET 0x0008 </span></div>
|
|
<div class="line"><a name="l00181"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a055ab4dd190617fd309ed8db03c185ac"> 181</a></span> <span class="preprocessor">#define DSU_LENGTH_RESETVALUE _U_(0x00000000) </span></div>
|
|
<div class="line"><a name="l00183"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a6aa7babac0719eb769c08ca1a945aa57"> 183</a></span> <span class="preprocessor">#define DSU_LENGTH_LENGTH_Pos 2 </span></div>
|
|
<div class="line"><a name="l00184"></a><span class="lineno"> 184</span> <span class="preprocessor">#define DSU_LENGTH_LENGTH_Msk (_U_(0x3FFFFFFF) << DSU_LENGTH_LENGTH_Pos)</span></div>
|
|
<div class="line"><a name="l00185"></a><span class="lineno"> 185</span> <span class="preprocessor">#define DSU_LENGTH_LENGTH(value) (DSU_LENGTH_LENGTH_Msk & ((value) << DSU_LENGTH_LENGTH_Pos))</span></div>
|
|
<div class="line"><a name="l00186"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a1bdb22215616287bf9f8ee6b97e7f803"> 186</a></span> <span class="preprocessor">#define DSU_LENGTH_MASK _U_(0xFFFFFFFC) </span></div>
|
|
<div class="line"><a name="l00188"></a><span class="lineno"> 188</span> <span class="preprocessor"></span><span class="comment">/* -------- DSU_DATA : (DSU Offset: 0x000C) (R/W 32) Data -------- */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00189"></a><span class="lineno"> 189</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
|
|
<div class="line"><a name="l00190"></a><span class="lineno"><a class="line" href="unionDSU__DATA__Type.html"> 190</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
|
|
<div class="line"><a name="l00191"></a><span class="lineno"> 191</span>  <span class="keyword">struct </span>{</div>
|
|
<div class="line"><a name="l00192"></a><span class="lineno"><a class="line" href="unionDSU__DATA__Type.html#a0793b4370bb1175b9222fa2ec65667b7"> 192</a></span>  uint32_t <a class="code" href="unionDSU__DATA__Type.html#a0793b4370bb1175b9222fa2ec65667b7">DATA</a>:32; </div>
|
|
<div class="line"><a name="l00193"></a><span class="lineno"><a class="line" href="unionDSU__DATA__Type.html#a3ba565a91ef2b1b9a8c77511f8f4b7a8"> 193</a></span>  } bit; </div>
|
|
<div class="line"><a name="l00194"></a><span class="lineno"><a class="line" href="unionDSU__DATA__Type.html#a951faee0c32af5210e62a071cc0afe96"> 194</a></span>  uint32_t <a class="code" href="unionDSU__DATA__Type.html#a951faee0c32af5210e62a071cc0afe96">reg</a>; </div>
|
|
<div class="line"><a name="l00195"></a><span class="lineno"> 195</span> } <a class="code" href="unionDSU__DATA__Type.html">DSU_DATA_Type</a>;</div>
|
|
<div class="line"><a name="l00196"></a><span class="lineno"> 196</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00197"></a><span class="lineno"> 197</span>  </div>
|
|
<div class="line"><a name="l00198"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a723e04c18648c402a75cce7e93de351a"> 198</a></span> <span class="preprocessor">#define DSU_DATA_OFFSET 0x000C </span></div>
|
|
<div class="line"><a name="l00199"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a3a9b805b6870ba197f179b0c6cc366ab"> 199</a></span> <span class="preprocessor">#define DSU_DATA_RESETVALUE _U_(0x00000000) </span></div>
|
|
<div class="line"><a name="l00201"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a035409bf73a654618f87c65e2742bc35"> 201</a></span> <span class="preprocessor">#define DSU_DATA_DATA_Pos 0 </span></div>
|
|
<div class="line"><a name="l00202"></a><span class="lineno"> 202</span> <span class="preprocessor">#define DSU_DATA_DATA_Msk (_U_(0xFFFFFFFF) << DSU_DATA_DATA_Pos)</span></div>
|
|
<div class="line"><a name="l00203"></a><span class="lineno"> 203</span> <span class="preprocessor">#define DSU_DATA_DATA(value) (DSU_DATA_DATA_Msk & ((value) << DSU_DATA_DATA_Pos))</span></div>
|
|
<div class="line"><a name="l00204"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a8ef0cc4d206f8b748482d8f40d4743e5"> 204</a></span> <span class="preprocessor">#define DSU_DATA_MASK _U_(0xFFFFFFFF) </span></div>
|
|
<div class="line"><a name="l00206"></a><span class="lineno"> 206</span> <span class="preprocessor"></span><span class="comment">/* -------- DSU_DCC : (DSU Offset: 0x0010) (R/W 32) Debug Communication Channel n -------- */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00207"></a><span class="lineno"> 207</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
|
|
<div class="line"><a name="l00208"></a><span class="lineno"><a class="line" href="unionDSU__DCC__Type.html"> 208</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
|
|
<div class="line"><a name="l00209"></a><span class="lineno"> 209</span>  <span class="keyword">struct </span>{</div>
|
|
<div class="line"><a name="l00210"></a><span class="lineno"><a class="line" href="unionDSU__DCC__Type.html#a7be3abb1e94c3dae4c10b6a4ce5253de"> 210</a></span>  uint32_t <a class="code" href="unionDSU__DCC__Type.html#a7be3abb1e94c3dae4c10b6a4ce5253de">DATA</a>:32; </div>
|
|
<div class="line"><a name="l00211"></a><span class="lineno"><a class="line" href="unionDSU__DCC__Type.html#aed573b5a2ced2e2832db85533b0cf0f3"> 211</a></span>  } bit; </div>
|
|
<div class="line"><a name="l00212"></a><span class="lineno"><a class="line" href="unionDSU__DCC__Type.html#ae3e5ccae0e39ab81ad4667dc5dab6f66"> 212</a></span>  uint32_t <a class="code" href="unionDSU__DCC__Type.html#ae3e5ccae0e39ab81ad4667dc5dab6f66">reg</a>; </div>
|
|
<div class="line"><a name="l00213"></a><span class="lineno"> 213</span> } <a class="code" href="unionDSU__DCC__Type.html">DSU_DCC_Type</a>;</div>
|
|
<div class="line"><a name="l00214"></a><span class="lineno"> 214</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00215"></a><span class="lineno"> 215</span>  </div>
|
|
<div class="line"><a name="l00216"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a79bf45c7c66b3d6ce28c7c9f9e6b3b89"> 216</a></span> <span class="preprocessor">#define DSU_DCC_OFFSET 0x0010 </span></div>
|
|
<div class="line"><a name="l00217"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#af005efb1f6ed05574d398463365093b8"> 217</a></span> <span class="preprocessor">#define DSU_DCC_RESETVALUE _U_(0x00000000) </span></div>
|
|
<div class="line"><a name="l00219"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a5d96d9ba36151557c8211afc631280c6"> 219</a></span> <span class="preprocessor">#define DSU_DCC_DATA_Pos 0 </span></div>
|
|
<div class="line"><a name="l00220"></a><span class="lineno"> 220</span> <span class="preprocessor">#define DSU_DCC_DATA_Msk (_U_(0xFFFFFFFF) << DSU_DCC_DATA_Pos)</span></div>
|
|
<div class="line"><a name="l00221"></a><span class="lineno"> 221</span> <span class="preprocessor">#define DSU_DCC_DATA(value) (DSU_DCC_DATA_Msk & ((value) << DSU_DCC_DATA_Pos))</span></div>
|
|
<div class="line"><a name="l00222"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a68f123ca6976eeb7b1320d0075b315d2"> 222</a></span> <span class="preprocessor">#define DSU_DCC_MASK _U_(0xFFFFFFFF) </span></div>
|
|
<div class="line"><a name="l00224"></a><span class="lineno"> 224</span> <span class="preprocessor"></span><span class="comment">/* -------- DSU_DID : (DSU Offset: 0x0018) (R/ 32) Device Identification -------- */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00225"></a><span class="lineno"> 225</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
|
|
<div class="line"><a name="l00226"></a><span class="lineno"><a class="line" href="unionDSU__DID__Type.html"> 226</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
|
|
<div class="line"><a name="l00227"></a><span class="lineno"> 227</span>  <span class="keyword">struct </span>{</div>
|
|
<div class="line"><a name="l00228"></a><span class="lineno"><a class="line" href="unionDSU__DID__Type.html#a6b84fbd4364f870cc96a9da2fe7fe02b"> 228</a></span>  uint32_t <a class="code" href="unionDSU__DID__Type.html#a6b84fbd4364f870cc96a9da2fe7fe02b">DEVSEL</a>:8; </div>
|
|
<div class="line"><a name="l00229"></a><span class="lineno"><a class="line" href="unionDSU__DID__Type.html#aa5a2580fa69f97b349dba6650dfec919"> 229</a></span>  uint32_t <a class="code" href="unionDSU__DID__Type.html#aa5a2580fa69f97b349dba6650dfec919">REVISION</a>:4; </div>
|
|
<div class="line"><a name="l00230"></a><span class="lineno"><a class="line" href="unionDSU__DID__Type.html#aa98a458040daf79582a83e77c0a55a5d"> 230</a></span>  uint32_t <a class="code" href="unionDSU__DID__Type.html#aa98a458040daf79582a83e77c0a55a5d">DIE</a>:4; </div>
|
|
<div class="line"><a name="l00231"></a><span class="lineno"><a class="line" href="unionDSU__DID__Type.html#a0705eab15d8481c0a60ae42e3443e260"> 231</a></span>  uint32_t <a class="code" href="unionDSU__DID__Type.html#a0705eab15d8481c0a60ae42e3443e260">SERIES</a>:6; </div>
|
|
<div class="line"><a name="l00232"></a><span class="lineno"><a class="line" href="unionDSU__DID__Type.html#ae329ed8257c1c69521338457e471f8c9"> 232</a></span>  uint32_t :1; </div>
|
|
<div class="line"><a name="l00233"></a><span class="lineno"><a class="line" href="unionDSU__DID__Type.html#a391b0d47c1bbd48442298eaabe71ca61"> 233</a></span>  uint32_t <a class="code" href="unionDSU__DID__Type.html#a391b0d47c1bbd48442298eaabe71ca61">FAMILY</a>:5; </div>
|
|
<div class="line"><a name="l00234"></a><span class="lineno"><a class="line" href="unionDSU__DID__Type.html#a090fd5a629b80d2adfcb388b825b8dd8"> 234</a></span>  uint32_t <a class="code" href="unionDSU__DID__Type.html#a090fd5a629b80d2adfcb388b825b8dd8">PROCESSOR</a>:4; </div>
|
|
<div class="line"><a name="l00235"></a><span class="lineno"><a class="line" href="unionDSU__DID__Type.html#ad78de9974f8cea24b8c78ada7095492e"> 235</a></span>  } bit; </div>
|
|
<div class="line"><a name="l00236"></a><span class="lineno"><a class="line" href="unionDSU__DID__Type.html#a56e43c203792644e8b50621c3d1dd7d6"> 236</a></span>  uint32_t <a class="code" href="unionDSU__DID__Type.html#a56e43c203792644e8b50621c3d1dd7d6">reg</a>; </div>
|
|
<div class="line"><a name="l00237"></a><span class="lineno"> 237</span> } <a class="code" href="unionDSU__DID__Type.html">DSU_DID_Type</a>;</div>
|
|
<div class="line"><a name="l00238"></a><span class="lineno"> 238</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00239"></a><span class="lineno"> 239</span>  </div>
|
|
<div class="line"><a name="l00240"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a1f8a682ec241602def0bb6f06481e4ed"> 240</a></span> <span class="preprocessor">#define DSU_DID_OFFSET 0x0018 </span></div>
|
|
<div class="line"><a name="l00242"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#af7877874825444352e8c546a2e1a2595"> 242</a></span> <span class="preprocessor">#define DSU_DID_DEVSEL_Pos 0 </span></div>
|
|
<div class="line"><a name="l00243"></a><span class="lineno"> 243</span> <span class="preprocessor">#define DSU_DID_DEVSEL_Msk (_U_(0xFF) << DSU_DID_DEVSEL_Pos)</span></div>
|
|
<div class="line"><a name="l00244"></a><span class="lineno"> 244</span> <span class="preprocessor">#define DSU_DID_DEVSEL(value) (DSU_DID_DEVSEL_Msk & ((value) << DSU_DID_DEVSEL_Pos))</span></div>
|
|
<div class="line"><a name="l00245"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#adf8c7ee986cf2cceec0a4d82efb513a2"> 245</a></span> <span class="preprocessor">#define DSU_DID_REVISION_Pos 8 </span></div>
|
|
<div class="line"><a name="l00246"></a><span class="lineno"> 246</span> <span class="preprocessor">#define DSU_DID_REVISION_Msk (_U_(0xF) << DSU_DID_REVISION_Pos)</span></div>
|
|
<div class="line"><a name="l00247"></a><span class="lineno"> 247</span> <span class="preprocessor">#define DSU_DID_REVISION(value) (DSU_DID_REVISION_Msk & ((value) << DSU_DID_REVISION_Pos))</span></div>
|
|
<div class="line"><a name="l00248"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#acd344f630eefc7e02ceb5f8210017b8b"> 248</a></span> <span class="preprocessor">#define DSU_DID_DIE_Pos 12 </span></div>
|
|
<div class="line"><a name="l00249"></a><span class="lineno"> 249</span> <span class="preprocessor">#define DSU_DID_DIE_Msk (_U_(0xF) << DSU_DID_DIE_Pos)</span></div>
|
|
<div class="line"><a name="l00250"></a><span class="lineno"> 250</span> <span class="preprocessor">#define DSU_DID_DIE(value) (DSU_DID_DIE_Msk & ((value) << DSU_DID_DIE_Pos))</span></div>
|
|
<div class="line"><a name="l00251"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a7f9f64f65c0ec3d507ba5bc03b1a9b68"> 251</a></span> <span class="preprocessor">#define DSU_DID_SERIES_Pos 16 </span></div>
|
|
<div class="line"><a name="l00252"></a><span class="lineno"> 252</span> <span class="preprocessor">#define DSU_DID_SERIES_Msk (_U_(0x3F) << DSU_DID_SERIES_Pos)</span></div>
|
|
<div class="line"><a name="l00253"></a><span class="lineno"> 253</span> <span class="preprocessor">#define DSU_DID_SERIES(value) (DSU_DID_SERIES_Msk & ((value) << DSU_DID_SERIES_Pos))</span></div>
|
|
<div class="line"><a name="l00254"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#aa55d2175bbc40ac9d81bd297a4241916"> 254</a></span> <span class="preprocessor">#define DSU_DID_SERIES_0_Val _U_(0x0) </span></div>
|
|
<div class="line"><a name="l00255"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a5b1ab97381d29e6d852f6ef0aec8f479"> 255</a></span> <span class="preprocessor">#define DSU_DID_SERIES_1_Val _U_(0x1) </span></div>
|
|
<div class="line"><a name="l00256"></a><span class="lineno"> 256</span> <span class="preprocessor">#define DSU_DID_SERIES_0 (DSU_DID_SERIES_0_Val << DSU_DID_SERIES_Pos)</span></div>
|
|
<div class="line"><a name="l00257"></a><span class="lineno"> 257</span> <span class="preprocessor">#define DSU_DID_SERIES_1 (DSU_DID_SERIES_1_Val << DSU_DID_SERIES_Pos)</span></div>
|
|
<div class="line"><a name="l00258"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a738ead915cfef1cb2261b900bc2125e7"> 258</a></span> <span class="preprocessor">#define DSU_DID_FAMILY_Pos 23 </span></div>
|
|
<div class="line"><a name="l00259"></a><span class="lineno"> 259</span> <span class="preprocessor">#define DSU_DID_FAMILY_Msk (_U_(0x1F) << DSU_DID_FAMILY_Pos)</span></div>
|
|
<div class="line"><a name="l00260"></a><span class="lineno"> 260</span> <span class="preprocessor">#define DSU_DID_FAMILY(value) (DSU_DID_FAMILY_Msk & ((value) << DSU_DID_FAMILY_Pos))</span></div>
|
|
<div class="line"><a name="l00261"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#aa68390a3dd287f0f36e30d40994bcb1e"> 261</a></span> <span class="preprocessor">#define DSU_DID_FAMILY_0_Val _U_(0x0) </span></div>
|
|
<div class="line"><a name="l00262"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ade6548ba38e36d9bd1487d02b2825f1c"> 262</a></span> <span class="preprocessor">#define DSU_DID_FAMILY_1_Val _U_(0x1) </span></div>
|
|
<div class="line"><a name="l00263"></a><span class="lineno"> 263</span> <span class="preprocessor">#define DSU_DID_FAMILY_0 (DSU_DID_FAMILY_0_Val << DSU_DID_FAMILY_Pos)</span></div>
|
|
<div class="line"><a name="l00264"></a><span class="lineno"> 264</span> <span class="preprocessor">#define DSU_DID_FAMILY_1 (DSU_DID_FAMILY_1_Val << DSU_DID_FAMILY_Pos)</span></div>
|
|
<div class="line"><a name="l00265"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#af39e8c9b37c218a74228db9507493fa2"> 265</a></span> <span class="preprocessor">#define DSU_DID_PROCESSOR_Pos 28 </span></div>
|
|
<div class="line"><a name="l00266"></a><span class="lineno"> 266</span> <span class="preprocessor">#define DSU_DID_PROCESSOR_Msk (_U_(0xF) << DSU_DID_PROCESSOR_Pos)</span></div>
|
|
<div class="line"><a name="l00267"></a><span class="lineno"> 267</span> <span class="preprocessor">#define DSU_DID_PROCESSOR(value) (DSU_DID_PROCESSOR_Msk & ((value) << DSU_DID_PROCESSOR_Pos))</span></div>
|
|
<div class="line"><a name="l00268"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ab0125f19b1c66669ea789521e33360c6"> 268</a></span> <span class="preprocessor">#define DSU_DID_PROCESSOR_CM0P_Val _U_(0x1) </span></div>
|
|
<div class="line"><a name="l00269"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a0df4a2a0af94a6b4490a23d5c4b03bfd"> 269</a></span> <span class="preprocessor">#define DSU_DID_PROCESSOR_CM23_Val _U_(0x2) </span></div>
|
|
<div class="line"><a name="l00270"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#abfb5d107e61e5ec48206450c921b4a4b"> 270</a></span> <span class="preprocessor">#define DSU_DID_PROCESSOR_CM3_Val _U_(0x3) </span></div>
|
|
<div class="line"><a name="l00271"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a534a13e2a895ca387b30d5a195e6b824"> 271</a></span> <span class="preprocessor">#define DSU_DID_PROCESSOR_CM4_Val _U_(0x5) </span></div>
|
|
<div class="line"><a name="l00272"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#afa6c40dc54282a41cc1fc2aba638ba9c"> 272</a></span> <span class="preprocessor">#define DSU_DID_PROCESSOR_CM4F_Val _U_(0x6) </span></div>
|
|
<div class="line"><a name="l00273"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a02cfd62c099a7754ee0b6339d6b8bc8c"> 273</a></span> <span class="preprocessor">#define DSU_DID_PROCESSOR_CM33_Val _U_(0x7) </span></div>
|
|
<div class="line"><a name="l00274"></a><span class="lineno"> 274</span> <span class="preprocessor">#define DSU_DID_PROCESSOR_CM0P (DSU_DID_PROCESSOR_CM0P_Val << DSU_DID_PROCESSOR_Pos)</span></div>
|
|
<div class="line"><a name="l00275"></a><span class="lineno"> 275</span> <span class="preprocessor">#define DSU_DID_PROCESSOR_CM23 (DSU_DID_PROCESSOR_CM23_Val << DSU_DID_PROCESSOR_Pos)</span></div>
|
|
<div class="line"><a name="l00276"></a><span class="lineno"> 276</span> <span class="preprocessor">#define DSU_DID_PROCESSOR_CM3 (DSU_DID_PROCESSOR_CM3_Val << DSU_DID_PROCESSOR_Pos)</span></div>
|
|
<div class="line"><a name="l00277"></a><span class="lineno"> 277</span> <span class="preprocessor">#define DSU_DID_PROCESSOR_CM4 (DSU_DID_PROCESSOR_CM4_Val << DSU_DID_PROCESSOR_Pos)</span></div>
|
|
<div class="line"><a name="l00278"></a><span class="lineno"> 278</span> <span class="preprocessor">#define DSU_DID_PROCESSOR_CM4F (DSU_DID_PROCESSOR_CM4F_Val << DSU_DID_PROCESSOR_Pos)</span></div>
|
|
<div class="line"><a name="l00279"></a><span class="lineno"> 279</span> <span class="preprocessor">#define DSU_DID_PROCESSOR_CM33 (DSU_DID_PROCESSOR_CM33_Val << DSU_DID_PROCESSOR_Pos)</span></div>
|
|
<div class="line"><a name="l00280"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ac1403dba443577379c24df9d1bff8cb1"> 280</a></span> <span class="preprocessor">#define DSU_DID_MASK _U_(0xFFBFFFFF) </span></div>
|
|
<div class="line"><a name="l00282"></a><span class="lineno"> 282</span> <span class="preprocessor"></span><span class="comment">/* -------- DSU_CFG : (DSU Offset: 0x001C) (R/W 32) Configuration -------- */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00283"></a><span class="lineno"> 283</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
|
|
<div class="line"><a name="l00284"></a><span class="lineno"><a class="line" href="unionDSU__CFG__Type.html"> 284</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
|
|
<div class="line"><a name="l00285"></a><span class="lineno"> 285</span>  <span class="keyword">struct </span>{</div>
|
|
<div class="line"><a name="l00286"></a><span class="lineno"><a class="line" href="unionDSU__CFG__Type.html#a1707b3b281a6dfc43f5b9413a63b3876"> 286</a></span>  uint32_t <a class="code" href="unionDSU__CFG__Type.html#a1707b3b281a6dfc43f5b9413a63b3876">LQOS</a>:2; </div>
|
|
<div class="line"><a name="l00287"></a><span class="lineno"><a class="line" href="unionDSU__CFG__Type.html#a9fc453e5a388cd9ce3a67d9fb80aa3ff"> 287</a></span>  uint32_t <a class="code" href="unionDSU__CFG__Type.html#a9fc453e5a388cd9ce3a67d9fb80aa3ff">DCCDMALEVEL</a>:2; </div>
|
|
<div class="line"><a name="l00288"></a><span class="lineno"><a class="line" href="unionDSU__CFG__Type.html#a00254ef2e9f3500e5c6b3e338eb2ad5c"> 288</a></span>  uint32_t <a class="code" href="unionDSU__CFG__Type.html#a00254ef2e9f3500e5c6b3e338eb2ad5c">ETBRAMEN</a>:1; </div>
|
|
<div class="line"><a name="l00289"></a><span class="lineno"><a class="line" href="unionDSU__CFG__Type.html#a9389d1bb336ae87e45849f7ac16a47d3"> 289</a></span>  uint32_t :27; </div>
|
|
<div class="line"><a name="l00290"></a><span class="lineno"><a class="line" href="unionDSU__CFG__Type.html#a37f41ae54f40a98e6eda33320a6e1a8f"> 290</a></span>  } bit; </div>
|
|
<div class="line"><a name="l00291"></a><span class="lineno"><a class="line" href="unionDSU__CFG__Type.html#a18afece2cb799c73b84f7d33a2cadb73"> 291</a></span>  uint32_t <a class="code" href="unionDSU__CFG__Type.html#a18afece2cb799c73b84f7d33a2cadb73">reg</a>; </div>
|
|
<div class="line"><a name="l00292"></a><span class="lineno"> 292</span> } <a class="code" href="unionDSU__CFG__Type.html">DSU_CFG_Type</a>;</div>
|
|
<div class="line"><a name="l00293"></a><span class="lineno"> 293</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00294"></a><span class="lineno"> 294</span>  </div>
|
|
<div class="line"><a name="l00295"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a8c62f4d1e6354ed3d19a6f1d0106e246"> 295</a></span> <span class="preprocessor">#define DSU_CFG_OFFSET 0x001C </span></div>
|
|
<div class="line"><a name="l00296"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a8e3905dda579f2cd6b30b66ed021a0b5"> 296</a></span> <span class="preprocessor">#define DSU_CFG_RESETVALUE _U_(0x00000002) </span></div>
|
|
<div class="line"><a name="l00298"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a6d98254c90559c6b73604015294b6b40"> 298</a></span> <span class="preprocessor">#define DSU_CFG_LQOS_Pos 0 </span></div>
|
|
<div class="line"><a name="l00299"></a><span class="lineno"> 299</span> <span class="preprocessor">#define DSU_CFG_LQOS_Msk (_U_(0x3) << DSU_CFG_LQOS_Pos)</span></div>
|
|
<div class="line"><a name="l00300"></a><span class="lineno"> 300</span> <span class="preprocessor">#define DSU_CFG_LQOS(value) (DSU_CFG_LQOS_Msk & ((value) << DSU_CFG_LQOS_Pos))</span></div>
|
|
<div class="line"><a name="l00301"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a589df5c7af4d30c5109d1353eabd48a9"> 301</a></span> <span class="preprocessor">#define DSU_CFG_DCCDMALEVEL_Pos 2 </span></div>
|
|
<div class="line"><a name="l00302"></a><span class="lineno"> 302</span> <span class="preprocessor">#define DSU_CFG_DCCDMALEVEL_Msk (_U_(0x3) << DSU_CFG_DCCDMALEVEL_Pos)</span></div>
|
|
<div class="line"><a name="l00303"></a><span class="lineno"> 303</span> <span class="preprocessor">#define DSU_CFG_DCCDMALEVEL(value) (DSU_CFG_DCCDMALEVEL_Msk & ((value) << DSU_CFG_DCCDMALEVEL_Pos))</span></div>
|
|
<div class="line"><a name="l00304"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a08775cb0aac097f6c9208783fbda68ff"> 304</a></span> <span class="preprocessor">#define DSU_CFG_DCCDMALEVEL_EMPTY_Val _U_(0x0) </span></div>
|
|
<div class="line"><a name="l00305"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#aad9ff896ba8016cc22e8aebe849ac0e0"> 305</a></span> <span class="preprocessor">#define DSU_CFG_DCCDMALEVEL_FULL_Val _U_(0x1) </span></div>
|
|
<div class="line"><a name="l00306"></a><span class="lineno"> 306</span> <span class="preprocessor">#define DSU_CFG_DCCDMALEVEL_EMPTY (DSU_CFG_DCCDMALEVEL_EMPTY_Val << DSU_CFG_DCCDMALEVEL_Pos)</span></div>
|
|
<div class="line"><a name="l00307"></a><span class="lineno"> 307</span> <span class="preprocessor">#define DSU_CFG_DCCDMALEVEL_FULL (DSU_CFG_DCCDMALEVEL_FULL_Val << DSU_CFG_DCCDMALEVEL_Pos)</span></div>
|
|
<div class="line"><a name="l00308"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a1dd49a77ed00b0d8b29a092fed417845"> 308</a></span> <span class="preprocessor">#define DSU_CFG_ETBRAMEN_Pos 4 </span></div>
|
|
<div class="line"><a name="l00309"></a><span class="lineno"> 309</span> <span class="preprocessor">#define DSU_CFG_ETBRAMEN (_U_(0x1) << DSU_CFG_ETBRAMEN_Pos)</span></div>
|
|
<div class="line"><a name="l00310"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ac4777e024751c158ef31e676ec63eac9"> 310</a></span> <span class="preprocessor">#define DSU_CFG_MASK _U_(0x0000001F) </span></div>
|
|
<div class="line"><a name="l00312"></a><span class="lineno"> 312</span> <span class="preprocessor"></span><span class="comment">/* -------- DSU_ENTRY0 : (DSU Offset: 0x1000) (R/ 32) CoreSight ROM Table Entry 0 -------- */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00313"></a><span class="lineno"> 313</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
|
|
<div class="line"><a name="l00314"></a><span class="lineno"><a class="line" href="unionDSU__ENTRY0__Type.html"> 314</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
|
|
<div class="line"><a name="l00315"></a><span class="lineno"> 315</span>  <span class="keyword">struct </span>{</div>
|
|
<div class="line"><a name="l00316"></a><span class="lineno"><a class="line" href="unionDSU__ENTRY0__Type.html#a3f265550e3d4a038a1e359d8ae807c48"> 316</a></span>  uint32_t <a class="code" href="unionDSU__ENTRY0__Type.html#a3f265550e3d4a038a1e359d8ae807c48">EPRES</a>:1; </div>
|
|
<div class="line"><a name="l00317"></a><span class="lineno"><a class="line" href="unionDSU__ENTRY0__Type.html#aa3926f1f9527552a50337fd2b24716ff"> 317</a></span>  uint32_t <a class="code" href="unionDSU__ENTRY0__Type.html#aa3926f1f9527552a50337fd2b24716ff">FMT</a>:1; </div>
|
|
<div class="line"><a name="l00318"></a><span class="lineno"><a class="line" href="unionDSU__ENTRY0__Type.html#a392291bbd8df83b18e7ea606b21c328d"> 318</a></span>  uint32_t :10; </div>
|
|
<div class="line"><a name="l00319"></a><span class="lineno"><a class="line" href="unionDSU__ENTRY0__Type.html#ac8df1fef5c69a4e75d67608e8e100b47"> 319</a></span>  uint32_t <a class="code" href="unionDSU__ENTRY0__Type.html#ac8df1fef5c69a4e75d67608e8e100b47">ADDOFF</a>:20; </div>
|
|
<div class="line"><a name="l00320"></a><span class="lineno"><a class="line" href="unionDSU__ENTRY0__Type.html#a4412c969c5d910efa9c65b47ba9147a1"> 320</a></span>  } bit; </div>
|
|
<div class="line"><a name="l00321"></a><span class="lineno"><a class="line" href="unionDSU__ENTRY0__Type.html#ad57b888a19f61bf49aea7ab2058ea9f0"> 321</a></span>  uint32_t <a class="code" href="unionDSU__ENTRY0__Type.html#ad57b888a19f61bf49aea7ab2058ea9f0">reg</a>; </div>
|
|
<div class="line"><a name="l00322"></a><span class="lineno"> 322</span> } <a class="code" href="unionDSU__ENTRY0__Type.html">DSU_ENTRY0_Type</a>;</div>
|
|
<div class="line"><a name="l00323"></a><span class="lineno"> 323</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00324"></a><span class="lineno"> 324</span>  </div>
|
|
<div class="line"><a name="l00325"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#aab06d4df5675d46495c1506ff2f2bf2c"> 325</a></span> <span class="preprocessor">#define DSU_ENTRY0_OFFSET 0x1000 </span></div>
|
|
<div class="line"><a name="l00326"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a8017bdfde4195a88bccf08a7ad26f5ca"> 326</a></span> <span class="preprocessor">#define DSU_ENTRY0_RESETVALUE _U_(0x9F0FC002) </span></div>
|
|
<div class="line"><a name="l00328"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ab0c18ae2688f543939477aebbe76ee54"> 328</a></span> <span class="preprocessor">#define DSU_ENTRY0_EPRES_Pos 0 </span></div>
|
|
<div class="line"><a name="l00329"></a><span class="lineno"> 329</span> <span class="preprocessor">#define DSU_ENTRY0_EPRES (_U_(0x1) << DSU_ENTRY0_EPRES_Pos)</span></div>
|
|
<div class="line"><a name="l00330"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ad27fea4487d4ce75afd0b580219487b6"> 330</a></span> <span class="preprocessor">#define DSU_ENTRY0_FMT_Pos 1 </span></div>
|
|
<div class="line"><a name="l00331"></a><span class="lineno"> 331</span> <span class="preprocessor">#define DSU_ENTRY0_FMT (_U_(0x1) << DSU_ENTRY0_FMT_Pos)</span></div>
|
|
<div class="line"><a name="l00332"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a281853c30a01a33bb71d921008daf56c"> 332</a></span> <span class="preprocessor">#define DSU_ENTRY0_ADDOFF_Pos 12 </span></div>
|
|
<div class="line"><a name="l00333"></a><span class="lineno"> 333</span> <span class="preprocessor">#define DSU_ENTRY0_ADDOFF_Msk (_U_(0xFFFFF) << DSU_ENTRY0_ADDOFF_Pos)</span></div>
|
|
<div class="line"><a name="l00334"></a><span class="lineno"> 334</span> <span class="preprocessor">#define DSU_ENTRY0_ADDOFF(value) (DSU_ENTRY0_ADDOFF_Msk & ((value) << DSU_ENTRY0_ADDOFF_Pos))</span></div>
|
|
<div class="line"><a name="l00335"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#aefdc95e7fcd5bc171ef80131a547588e"> 335</a></span> <span class="preprocessor">#define DSU_ENTRY0_MASK _U_(0xFFFFF003) </span></div>
|
|
<div class="line"><a name="l00337"></a><span class="lineno"> 337</span> <span class="preprocessor"></span><span class="comment">/* -------- DSU_ENTRY1 : (DSU Offset: 0x1004) (R/ 32) CoreSight ROM Table Entry 1 -------- */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00338"></a><span class="lineno"> 338</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
|
|
<div class="line"><a name="l00339"></a><span class="lineno"><a class="line" href="unionDSU__ENTRY1__Type.html"> 339</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
|
|
<div class="line"><a name="l00340"></a><span class="lineno"><a class="line" href="unionDSU__ENTRY1__Type.html#a524ab8d2471aafcf1a353ae5626de59c"> 340</a></span>  uint32_t <a class="code" href="unionDSU__ENTRY1__Type.html#a524ab8d2471aafcf1a353ae5626de59c">reg</a>; </div>
|
|
<div class="line"><a name="l00341"></a><span class="lineno"> 341</span> } <a class="code" href="unionDSU__ENTRY1__Type.html">DSU_ENTRY1_Type</a>;</div>
|
|
<div class="line"><a name="l00342"></a><span class="lineno"> 342</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00343"></a><span class="lineno"> 343</span>  </div>
|
|
<div class="line"><a name="l00344"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ac5708bb2fe2ee100cdddae6442828217"> 344</a></span> <span class="preprocessor">#define DSU_ENTRY1_OFFSET 0x1004 </span></div>
|
|
<div class="line"><a name="l00345"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a9f8fce8b585b23a09dd0abac9fadf06e"> 345</a></span> <span class="preprocessor">#define DSU_ENTRY1_RESETVALUE _U_(0x00000000) </span></div>
|
|
<div class="line"><a name="l00346"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#afdfc580b0b4e1677b6ce0b4843199d76"> 346</a></span> <span class="preprocessor">#define DSU_ENTRY1_MASK _U_(0xFFFFFFFF) </span></div>
|
|
<div class="line"><a name="l00348"></a><span class="lineno"> 348</span> <span class="preprocessor"></span><span class="comment">/* -------- DSU_END : (DSU Offset: 0x1008) (R/ 32) CoreSight ROM Table End -------- */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00349"></a><span class="lineno"> 349</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
|
|
<div class="line"><a name="l00350"></a><span class="lineno"><a class="line" href="unionDSU__END__Type.html"> 350</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
|
|
<div class="line"><a name="l00351"></a><span class="lineno"> 351</span>  <span class="keyword">struct </span>{</div>
|
|
<div class="line"><a name="l00352"></a><span class="lineno"><a class="line" href="unionDSU__END__Type.html#a24ad2e64ac7f159c62d9e1d30184432b"> 352</a></span>  uint32_t <a class="code" href="unionDSU__END__Type.html#a24ad2e64ac7f159c62d9e1d30184432b">END</a>:32; </div>
|
|
<div class="line"><a name="l00353"></a><span class="lineno"><a class="line" href="unionDSU__END__Type.html#af7b15eaadd5439e900f0e79c00c35046"> 353</a></span>  } bit; </div>
|
|
<div class="line"><a name="l00354"></a><span class="lineno"><a class="line" href="unionDSU__END__Type.html#a0d914056a7cd5c80c5b2204a15ae09ae"> 354</a></span>  uint32_t <a class="code" href="unionDSU__END__Type.html#a0d914056a7cd5c80c5b2204a15ae09ae">reg</a>; </div>
|
|
<div class="line"><a name="l00355"></a><span class="lineno"> 355</span> } <a class="code" href="unionDSU__END__Type.html">DSU_END_Type</a>;</div>
|
|
<div class="line"><a name="l00356"></a><span class="lineno"> 356</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00357"></a><span class="lineno"> 357</span>  </div>
|
|
<div class="line"><a name="l00358"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ae6ea9aca4f5434a9e01445fc08782f59"> 358</a></span> <span class="preprocessor">#define DSU_END_OFFSET 0x1008 </span></div>
|
|
<div class="line"><a name="l00359"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#aa4380f101e160fd70e41789f57871f63"> 359</a></span> <span class="preprocessor">#define DSU_END_RESETVALUE _U_(0x00000000) </span></div>
|
|
<div class="line"><a name="l00361"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a490d2f02762f42681fc4dcaa0db570bb"> 361</a></span> <span class="preprocessor">#define DSU_END_END_Pos 0 </span></div>
|
|
<div class="line"><a name="l00362"></a><span class="lineno"> 362</span> <span class="preprocessor">#define DSU_END_END_Msk (_U_(0xFFFFFFFF) << DSU_END_END_Pos)</span></div>
|
|
<div class="line"><a name="l00363"></a><span class="lineno"> 363</span> <span class="preprocessor">#define DSU_END_END(value) (DSU_END_END_Msk & ((value) << DSU_END_END_Pos))</span></div>
|
|
<div class="line"><a name="l00364"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ac1fdb41335952f536cc506c75a0f2e5f"> 364</a></span> <span class="preprocessor">#define DSU_END_MASK _U_(0xFFFFFFFF) </span></div>
|
|
<div class="line"><a name="l00366"></a><span class="lineno"> 366</span> <span class="preprocessor"></span><span class="comment">/* -------- DSU_MEMTYPE : (DSU Offset: 0x1FCC) (R/ 32) CoreSight ROM Table Memory Type -------- */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00367"></a><span class="lineno"> 367</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
|
|
<div class="line"><a name="l00368"></a><span class="lineno"><a class="line" href="unionDSU__MEMTYPE__Type.html"> 368</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
|
|
<div class="line"><a name="l00369"></a><span class="lineno"> 369</span>  <span class="keyword">struct </span>{</div>
|
|
<div class="line"><a name="l00370"></a><span class="lineno"><a class="line" href="unionDSU__MEMTYPE__Type.html#a3dca5becd5a8a8e28fe39180c824eaaf"> 370</a></span>  uint32_t <a class="code" href="unionDSU__MEMTYPE__Type.html#a3dca5becd5a8a8e28fe39180c824eaaf">SMEMP</a>:1; </div>
|
|
<div class="line"><a name="l00371"></a><span class="lineno"><a class="line" href="unionDSU__MEMTYPE__Type.html#ae50d5b66b5ba6364b5117e8628c7579a"> 371</a></span>  uint32_t :31; </div>
|
|
<div class="line"><a name="l00372"></a><span class="lineno"><a class="line" href="unionDSU__MEMTYPE__Type.html#a5b9b8581c13c55fd938526074e4859e3"> 372</a></span>  } bit; </div>
|
|
<div class="line"><a name="l00373"></a><span class="lineno"><a class="line" href="unionDSU__MEMTYPE__Type.html#a9811ad777bc9653aaa34c9c298031513"> 373</a></span>  uint32_t <a class="code" href="unionDSU__MEMTYPE__Type.html#a9811ad777bc9653aaa34c9c298031513">reg</a>; </div>
|
|
<div class="line"><a name="l00374"></a><span class="lineno"> 374</span> } <a class="code" href="unionDSU__MEMTYPE__Type.html">DSU_MEMTYPE_Type</a>;</div>
|
|
<div class="line"><a name="l00375"></a><span class="lineno"> 375</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00376"></a><span class="lineno"> 376</span>  </div>
|
|
<div class="line"><a name="l00377"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a9cfb1a386c96d79aa14d0556e89a9847"> 377</a></span> <span class="preprocessor">#define DSU_MEMTYPE_OFFSET 0x1FCC </span></div>
|
|
<div class="line"><a name="l00378"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ae696aac50623781af5c363bb4819a651"> 378</a></span> <span class="preprocessor">#define DSU_MEMTYPE_RESETVALUE _U_(0x00000000) </span></div>
|
|
<div class="line"><a name="l00380"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#af9e3cd3a0a5383eb7790554b6b26b2d3"> 380</a></span> <span class="preprocessor">#define DSU_MEMTYPE_SMEMP_Pos 0 </span></div>
|
|
<div class="line"><a name="l00381"></a><span class="lineno"> 381</span> <span class="preprocessor">#define DSU_MEMTYPE_SMEMP (_U_(0x1) << DSU_MEMTYPE_SMEMP_Pos)</span></div>
|
|
<div class="line"><a name="l00382"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a1452bd6135db23612661a14aba71c287"> 382</a></span> <span class="preprocessor">#define DSU_MEMTYPE_MASK _U_(0x00000001) </span></div>
|
|
<div class="line"><a name="l00384"></a><span class="lineno"> 384</span> <span class="preprocessor"></span><span class="comment">/* -------- DSU_PID4 : (DSU Offset: 0x1FD0) (R/ 32) Peripheral Identification 4 -------- */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00385"></a><span class="lineno"> 385</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
|
|
<div class="line"><a name="l00386"></a><span class="lineno"><a class="line" href="unionDSU__PID4__Type.html"> 386</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
|
|
<div class="line"><a name="l00387"></a><span class="lineno"> 387</span>  <span class="keyword">struct </span>{</div>
|
|
<div class="line"><a name="l00388"></a><span class="lineno"><a class="line" href="unionDSU__PID4__Type.html#a351cf48be2b0e2845a7a8987c3c869f8"> 388</a></span>  uint32_t <a class="code" href="unionDSU__PID4__Type.html#a351cf48be2b0e2845a7a8987c3c869f8">JEPCC</a>:4; </div>
|
|
<div class="line"><a name="l00389"></a><span class="lineno"><a class="line" href="unionDSU__PID4__Type.html#a6fdd5fe268e92ffe333394c0eb34431a"> 389</a></span>  uint32_t <a class="code" href="unionDSU__PID4__Type.html#a6fdd5fe268e92ffe333394c0eb34431a">FKBC</a>:4; </div>
|
|
<div class="line"><a name="l00390"></a><span class="lineno"><a class="line" href="unionDSU__PID4__Type.html#a58c77af3c128eee1075b6306a4b02aea"> 390</a></span>  uint32_t :24; </div>
|
|
<div class="line"><a name="l00391"></a><span class="lineno"><a class="line" href="unionDSU__PID4__Type.html#aa16a5bc8036a59232db3f784a1bb2fdc"> 391</a></span>  } bit; </div>
|
|
<div class="line"><a name="l00392"></a><span class="lineno"><a class="line" href="unionDSU__PID4__Type.html#aff254cb82f68cb64e7f09f0e49aff7f6"> 392</a></span>  uint32_t <a class="code" href="unionDSU__PID4__Type.html#aff254cb82f68cb64e7f09f0e49aff7f6">reg</a>; </div>
|
|
<div class="line"><a name="l00393"></a><span class="lineno"> 393</span> } <a class="code" href="unionDSU__PID4__Type.html">DSU_PID4_Type</a>;</div>
|
|
<div class="line"><a name="l00394"></a><span class="lineno"> 394</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00395"></a><span class="lineno"> 395</span>  </div>
|
|
<div class="line"><a name="l00396"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a9b2486d7ffbc473daa210a53c58ae205"> 396</a></span> <span class="preprocessor">#define DSU_PID4_OFFSET 0x1FD0 </span></div>
|
|
<div class="line"><a name="l00397"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#abff45dc09472f6ef982d193afd7841cc"> 397</a></span> <span class="preprocessor">#define DSU_PID4_RESETVALUE _U_(0x00000000) </span></div>
|
|
<div class="line"><a name="l00399"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a09592aca2e0907f95a7a1b7898f77734"> 399</a></span> <span class="preprocessor">#define DSU_PID4_JEPCC_Pos 0 </span></div>
|
|
<div class="line"><a name="l00400"></a><span class="lineno"> 400</span> <span class="preprocessor">#define DSU_PID4_JEPCC_Msk (_U_(0xF) << DSU_PID4_JEPCC_Pos)</span></div>
|
|
<div class="line"><a name="l00401"></a><span class="lineno"> 401</span> <span class="preprocessor">#define DSU_PID4_JEPCC(value) (DSU_PID4_JEPCC_Msk & ((value) << DSU_PID4_JEPCC_Pos))</span></div>
|
|
<div class="line"><a name="l00402"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#aa75dd4a5e3f39a78aacfe256a1db4df9"> 402</a></span> <span class="preprocessor">#define DSU_PID4_FKBC_Pos 4 </span></div>
|
|
<div class="line"><a name="l00403"></a><span class="lineno"> 403</span> <span class="preprocessor">#define DSU_PID4_FKBC_Msk (_U_(0xF) << DSU_PID4_FKBC_Pos)</span></div>
|
|
<div class="line"><a name="l00404"></a><span class="lineno"> 404</span> <span class="preprocessor">#define DSU_PID4_FKBC(value) (DSU_PID4_FKBC_Msk & ((value) << DSU_PID4_FKBC_Pos))</span></div>
|
|
<div class="line"><a name="l00405"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a4d757ce3a91f809a48fe7fbe9a72724e"> 405</a></span> <span class="preprocessor">#define DSU_PID4_MASK _U_(0x000000FF) </span></div>
|
|
<div class="line"><a name="l00407"></a><span class="lineno"> 407</span> <span class="preprocessor"></span><span class="comment">/* -------- DSU_PID5 : (DSU Offset: 0x1FD4) (R/ 32) Peripheral Identification 5 -------- */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00408"></a><span class="lineno"> 408</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
|
|
<div class="line"><a name="l00409"></a><span class="lineno"><a class="line" href="unionDSU__PID5__Type.html"> 409</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
|
|
<div class="line"><a name="l00410"></a><span class="lineno"><a class="line" href="unionDSU__PID5__Type.html#a381ed71ad8950e0059bf48ed20c78e9d"> 410</a></span>  uint32_t <a class="code" href="unionDSU__PID5__Type.html#a381ed71ad8950e0059bf48ed20c78e9d">reg</a>; </div>
|
|
<div class="line"><a name="l00411"></a><span class="lineno"> 411</span> } <a class="code" href="unionDSU__PID5__Type.html">DSU_PID5_Type</a>;</div>
|
|
<div class="line"><a name="l00412"></a><span class="lineno"> 412</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00413"></a><span class="lineno"> 413</span>  </div>
|
|
<div class="line"><a name="l00414"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a55456b82aa4473e1294da9cddff8dc7f"> 414</a></span> <span class="preprocessor">#define DSU_PID5_OFFSET 0x1FD4 </span></div>
|
|
<div class="line"><a name="l00415"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a660196a26277134b1faa0e3cb16a45df"> 415</a></span> <span class="preprocessor">#define DSU_PID5_RESETVALUE _U_(0x00000000) </span></div>
|
|
<div class="line"><a name="l00416"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a5859f5a5ab794ef6639607ee21c9bfb0"> 416</a></span> <span class="preprocessor">#define DSU_PID5_MASK _U_(0x00000000) </span></div>
|
|
<div class="line"><a name="l00418"></a><span class="lineno"> 418</span> <span class="preprocessor"></span><span class="comment">/* -------- DSU_PID6 : (DSU Offset: 0x1FD8) (R/ 32) Peripheral Identification 6 -------- */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00419"></a><span class="lineno"> 419</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
|
|
<div class="line"><a name="l00420"></a><span class="lineno"><a class="line" href="unionDSU__PID6__Type.html"> 420</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
|
|
<div class="line"><a name="l00421"></a><span class="lineno"><a class="line" href="unionDSU__PID6__Type.html#a5c9f3720d55b56e6aef2b71ac0b50a13"> 421</a></span>  uint32_t <a class="code" href="unionDSU__PID6__Type.html#a5c9f3720d55b56e6aef2b71ac0b50a13">reg</a>; </div>
|
|
<div class="line"><a name="l00422"></a><span class="lineno"> 422</span> } <a class="code" href="unionDSU__PID6__Type.html">DSU_PID6_Type</a>;</div>
|
|
<div class="line"><a name="l00423"></a><span class="lineno"> 423</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00424"></a><span class="lineno"> 424</span>  </div>
|
|
<div class="line"><a name="l00425"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#aef7906d7c83735893dad365a6292f4c2"> 425</a></span> <span class="preprocessor">#define DSU_PID6_OFFSET 0x1FD8 </span></div>
|
|
<div class="line"><a name="l00426"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a0ec56c9b11834ea4e78e4bb56f8d504d"> 426</a></span> <span class="preprocessor">#define DSU_PID6_RESETVALUE _U_(0x00000000) </span></div>
|
|
<div class="line"><a name="l00427"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ac1a214954faa7cfd1597c2f5dc50b61e"> 427</a></span> <span class="preprocessor">#define DSU_PID6_MASK _U_(0x00000000) </span></div>
|
|
<div class="line"><a name="l00429"></a><span class="lineno"> 429</span> <span class="preprocessor"></span><span class="comment">/* -------- DSU_PID7 : (DSU Offset: 0x1FDC) (R/ 32) Peripheral Identification 7 -------- */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00430"></a><span class="lineno"> 430</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
|
|
<div class="line"><a name="l00431"></a><span class="lineno"><a class="line" href="unionDSU__PID7__Type.html"> 431</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
|
|
<div class="line"><a name="l00432"></a><span class="lineno"><a class="line" href="unionDSU__PID7__Type.html#a6a2b728de75e4bee6b44a6e2c50305bc"> 432</a></span>  uint32_t <a class="code" href="unionDSU__PID7__Type.html#a6a2b728de75e4bee6b44a6e2c50305bc">reg</a>; </div>
|
|
<div class="line"><a name="l00433"></a><span class="lineno"> 433</span> } <a class="code" href="unionDSU__PID7__Type.html">DSU_PID7_Type</a>;</div>
|
|
<div class="line"><a name="l00434"></a><span class="lineno"> 434</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00435"></a><span class="lineno"> 435</span>  </div>
|
|
<div class="line"><a name="l00436"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a177551481d873cd49c5348a580bb583d"> 436</a></span> <span class="preprocessor">#define DSU_PID7_OFFSET 0x1FDC </span></div>
|
|
<div class="line"><a name="l00437"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a425f24c2e936c926f005cec6d504049a"> 437</a></span> <span class="preprocessor">#define DSU_PID7_RESETVALUE _U_(0x00000000) </span></div>
|
|
<div class="line"><a name="l00438"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a16cbaf00d0e9956cdbf2f3f627576ecc"> 438</a></span> <span class="preprocessor">#define DSU_PID7_MASK _U_(0x00000000) </span></div>
|
|
<div class="line"><a name="l00440"></a><span class="lineno"> 440</span> <span class="preprocessor"></span><span class="comment">/* -------- DSU_PID0 : (DSU Offset: 0x1FE0) (R/ 32) Peripheral Identification 0 -------- */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00441"></a><span class="lineno"> 441</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
|
|
<div class="line"><a name="l00442"></a><span class="lineno"><a class="line" href="unionDSU__PID0__Type.html"> 442</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
|
|
<div class="line"><a name="l00443"></a><span class="lineno"> 443</span>  <span class="keyword">struct </span>{</div>
|
|
<div class="line"><a name="l00444"></a><span class="lineno"><a class="line" href="unionDSU__PID0__Type.html#a2411582de03ec05e573cff798437b9b2"> 444</a></span>  uint32_t <a class="code" href="unionDSU__PID0__Type.html#a2411582de03ec05e573cff798437b9b2">PARTNBL</a>:8; </div>
|
|
<div class="line"><a name="l00445"></a><span class="lineno"><a class="line" href="unionDSU__PID0__Type.html#a254b243c9967098727101f115dde15ba"> 445</a></span>  uint32_t :24; </div>
|
|
<div class="line"><a name="l00446"></a><span class="lineno"><a class="line" href="unionDSU__PID0__Type.html#ac2def1430c6dcdb7afe458983ed1a8ec"> 446</a></span>  } bit; </div>
|
|
<div class="line"><a name="l00447"></a><span class="lineno"><a class="line" href="unionDSU__PID0__Type.html#a7db2231c24781271c48df2f5fb7805a6"> 447</a></span>  uint32_t <a class="code" href="unionDSU__PID0__Type.html#a7db2231c24781271c48df2f5fb7805a6">reg</a>; </div>
|
|
<div class="line"><a name="l00448"></a><span class="lineno"> 448</span> } <a class="code" href="unionDSU__PID0__Type.html">DSU_PID0_Type</a>;</div>
|
|
<div class="line"><a name="l00449"></a><span class="lineno"> 449</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00450"></a><span class="lineno"> 450</span>  </div>
|
|
<div class="line"><a name="l00451"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#aea9d171f0922c1d3459cd94571421b57"> 451</a></span> <span class="preprocessor">#define DSU_PID0_OFFSET 0x1FE0 </span></div>
|
|
<div class="line"><a name="l00452"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#afbf547350eaa735fb153d3b6dcc09408"> 452</a></span> <span class="preprocessor">#define DSU_PID0_RESETVALUE _U_(0x000000D0) </span></div>
|
|
<div class="line"><a name="l00454"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#af2273a145c71eec0de2c40ddd80e4283"> 454</a></span> <span class="preprocessor">#define DSU_PID0_PARTNBL_Pos 0 </span></div>
|
|
<div class="line"><a name="l00455"></a><span class="lineno"> 455</span> <span class="preprocessor">#define DSU_PID0_PARTNBL_Msk (_U_(0xFF) << DSU_PID0_PARTNBL_Pos)</span></div>
|
|
<div class="line"><a name="l00456"></a><span class="lineno"> 456</span> <span class="preprocessor">#define DSU_PID0_PARTNBL(value) (DSU_PID0_PARTNBL_Msk & ((value) << DSU_PID0_PARTNBL_Pos))</span></div>
|
|
<div class="line"><a name="l00457"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ae813809af590e3ba3aa212704b194593"> 457</a></span> <span class="preprocessor">#define DSU_PID0_MASK _U_(0x000000FF) </span></div>
|
|
<div class="line"><a name="l00459"></a><span class="lineno"> 459</span> <span class="preprocessor"></span><span class="comment">/* -------- DSU_PID1 : (DSU Offset: 0x1FE4) (R/ 32) Peripheral Identification 1 -------- */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00460"></a><span class="lineno"> 460</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
|
|
<div class="line"><a name="l00461"></a><span class="lineno"><a class="line" href="unionDSU__PID1__Type.html"> 461</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
|
|
<div class="line"><a name="l00462"></a><span class="lineno"> 462</span>  <span class="keyword">struct </span>{</div>
|
|
<div class="line"><a name="l00463"></a><span class="lineno"><a class="line" href="unionDSU__PID1__Type.html#af789ec8a7e1fa2718283e9374643cd10"> 463</a></span>  uint32_t <a class="code" href="unionDSU__PID1__Type.html#af789ec8a7e1fa2718283e9374643cd10">PARTNBH</a>:4; </div>
|
|
<div class="line"><a name="l00464"></a><span class="lineno"><a class="line" href="unionDSU__PID1__Type.html#a00638eca3237e0bfedae6c22418203e5"> 464</a></span>  uint32_t <a class="code" href="unionDSU__PID1__Type.html#a00638eca3237e0bfedae6c22418203e5">JEPIDCL</a>:4; </div>
|
|
<div class="line"><a name="l00465"></a><span class="lineno"><a class="line" href="unionDSU__PID1__Type.html#ad188bd6691a25f5edc20e2364eff096b"> 465</a></span>  uint32_t :24; </div>
|
|
<div class="line"><a name="l00466"></a><span class="lineno"><a class="line" href="unionDSU__PID1__Type.html#af8f488aaae756fa07b85b0d7b8182193"> 466</a></span>  } bit; </div>
|
|
<div class="line"><a name="l00467"></a><span class="lineno"><a class="line" href="unionDSU__PID1__Type.html#aae19e346570eb31d8eec6d0a7b093954"> 467</a></span>  uint32_t <a class="code" href="unionDSU__PID1__Type.html#aae19e346570eb31d8eec6d0a7b093954">reg</a>; </div>
|
|
<div class="line"><a name="l00468"></a><span class="lineno"> 468</span> } <a class="code" href="unionDSU__PID1__Type.html">DSU_PID1_Type</a>;</div>
|
|
<div class="line"><a name="l00469"></a><span class="lineno"> 469</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00470"></a><span class="lineno"> 470</span>  </div>
|
|
<div class="line"><a name="l00471"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a1114e2adaab2fe61ed027acf899418de"> 471</a></span> <span class="preprocessor">#define DSU_PID1_OFFSET 0x1FE4 </span></div>
|
|
<div class="line"><a name="l00472"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a257a59dab5e1bef2c233b637968f2786"> 472</a></span> <span class="preprocessor">#define DSU_PID1_RESETVALUE _U_(0x000000FC) </span></div>
|
|
<div class="line"><a name="l00474"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a6dff7e586efe49ba2aa268119a27218d"> 474</a></span> <span class="preprocessor">#define DSU_PID1_PARTNBH_Pos 0 </span></div>
|
|
<div class="line"><a name="l00475"></a><span class="lineno"> 475</span> <span class="preprocessor">#define DSU_PID1_PARTNBH_Msk (_U_(0xF) << DSU_PID1_PARTNBH_Pos)</span></div>
|
|
<div class="line"><a name="l00476"></a><span class="lineno"> 476</span> <span class="preprocessor">#define DSU_PID1_PARTNBH(value) (DSU_PID1_PARTNBH_Msk & ((value) << DSU_PID1_PARTNBH_Pos))</span></div>
|
|
<div class="line"><a name="l00477"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a64528557ce517ad0117a1416e03e0be9"> 477</a></span> <span class="preprocessor">#define DSU_PID1_JEPIDCL_Pos 4 </span></div>
|
|
<div class="line"><a name="l00478"></a><span class="lineno"> 478</span> <span class="preprocessor">#define DSU_PID1_JEPIDCL_Msk (_U_(0xF) << DSU_PID1_JEPIDCL_Pos)</span></div>
|
|
<div class="line"><a name="l00479"></a><span class="lineno"> 479</span> <span class="preprocessor">#define DSU_PID1_JEPIDCL(value) (DSU_PID1_JEPIDCL_Msk & ((value) << DSU_PID1_JEPIDCL_Pos))</span></div>
|
|
<div class="line"><a name="l00480"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a2398899995a62f2a20b4390051c5d269"> 480</a></span> <span class="preprocessor">#define DSU_PID1_MASK _U_(0x000000FF) </span></div>
|
|
<div class="line"><a name="l00482"></a><span class="lineno"> 482</span> <span class="preprocessor"></span><span class="comment">/* -------- DSU_PID2 : (DSU Offset: 0x1FE8) (R/ 32) Peripheral Identification 2 -------- */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00483"></a><span class="lineno"> 483</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
|
|
<div class="line"><a name="l00484"></a><span class="lineno"><a class="line" href="unionDSU__PID2__Type.html"> 484</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
|
|
<div class="line"><a name="l00485"></a><span class="lineno"> 485</span>  <span class="keyword">struct </span>{</div>
|
|
<div class="line"><a name="l00486"></a><span class="lineno"><a class="line" href="unionDSU__PID2__Type.html#a98d6ae81bae471444221dad368417fcb"> 486</a></span>  uint32_t <a class="code" href="unionDSU__PID2__Type.html#a98d6ae81bae471444221dad368417fcb">JEPIDCH</a>:3; </div>
|
|
<div class="line"><a name="l00487"></a><span class="lineno"><a class="line" href="unionDSU__PID2__Type.html#ae1fa34e088136d567cd1769499c50ab3"> 487</a></span>  uint32_t <a class="code" href="unionDSU__PID2__Type.html#ae1fa34e088136d567cd1769499c50ab3">JEPU</a>:1; </div>
|
|
<div class="line"><a name="l00488"></a><span class="lineno"><a class="line" href="unionDSU__PID2__Type.html#ad619ce9aa07fdb32c8d57feebaab130c"> 488</a></span>  uint32_t <a class="code" href="unionDSU__PID2__Type.html#ad619ce9aa07fdb32c8d57feebaab130c">REVISION</a>:4; </div>
|
|
<div class="line"><a name="l00489"></a><span class="lineno"><a class="line" href="unionDSU__PID2__Type.html#a51e6f715b4cd6b477dab8f10a8135629"> 489</a></span>  uint32_t :24; </div>
|
|
<div class="line"><a name="l00490"></a><span class="lineno"><a class="line" href="unionDSU__PID2__Type.html#a682be9a2e515cd0302de2a0e0eebb9f9"> 490</a></span>  } bit; </div>
|
|
<div class="line"><a name="l00491"></a><span class="lineno"><a class="line" href="unionDSU__PID2__Type.html#aa77daad8160c0503bf4348a988c1580d"> 491</a></span>  uint32_t <a class="code" href="unionDSU__PID2__Type.html#aa77daad8160c0503bf4348a988c1580d">reg</a>; </div>
|
|
<div class="line"><a name="l00492"></a><span class="lineno"> 492</span> } <a class="code" href="unionDSU__PID2__Type.html">DSU_PID2_Type</a>;</div>
|
|
<div class="line"><a name="l00493"></a><span class="lineno"> 493</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00494"></a><span class="lineno"> 494</span>  </div>
|
|
<div class="line"><a name="l00495"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ae848d742529a04e4fc64065f2bfde2d7"> 495</a></span> <span class="preprocessor">#define DSU_PID2_OFFSET 0x1FE8 </span></div>
|
|
<div class="line"><a name="l00496"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a34f08ebf29928fc5c95f018abbc6d3a3"> 496</a></span> <span class="preprocessor">#define DSU_PID2_RESETVALUE _U_(0x00000009) </span></div>
|
|
<div class="line"><a name="l00498"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a4b2aa922b81ecb07b672d813558306fc"> 498</a></span> <span class="preprocessor">#define DSU_PID2_JEPIDCH_Pos 0 </span></div>
|
|
<div class="line"><a name="l00499"></a><span class="lineno"> 499</span> <span class="preprocessor">#define DSU_PID2_JEPIDCH_Msk (_U_(0x7) << DSU_PID2_JEPIDCH_Pos)</span></div>
|
|
<div class="line"><a name="l00500"></a><span class="lineno"> 500</span> <span class="preprocessor">#define DSU_PID2_JEPIDCH(value) (DSU_PID2_JEPIDCH_Msk & ((value) << DSU_PID2_JEPIDCH_Pos))</span></div>
|
|
<div class="line"><a name="l00501"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a88346fef117d36aa2dba1ffabc5e908a"> 501</a></span> <span class="preprocessor">#define DSU_PID2_JEPU_Pos 3 </span></div>
|
|
<div class="line"><a name="l00502"></a><span class="lineno"> 502</span> <span class="preprocessor">#define DSU_PID2_JEPU (_U_(0x1) << DSU_PID2_JEPU_Pos)</span></div>
|
|
<div class="line"><a name="l00503"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#acb24de7b25b93dd1c040ed75899fd545"> 503</a></span> <span class="preprocessor">#define DSU_PID2_REVISION_Pos 4 </span></div>
|
|
<div class="line"><a name="l00504"></a><span class="lineno"> 504</span> <span class="preprocessor">#define DSU_PID2_REVISION_Msk (_U_(0xF) << DSU_PID2_REVISION_Pos)</span></div>
|
|
<div class="line"><a name="l00505"></a><span class="lineno"> 505</span> <span class="preprocessor">#define DSU_PID2_REVISION(value) (DSU_PID2_REVISION_Msk & ((value) << DSU_PID2_REVISION_Pos))</span></div>
|
|
<div class="line"><a name="l00506"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a4166d965b2c546c98a12d698fd27aa37"> 506</a></span> <span class="preprocessor">#define DSU_PID2_MASK _U_(0x000000FF) </span></div>
|
|
<div class="line"><a name="l00508"></a><span class="lineno"> 508</span> <span class="preprocessor"></span><span class="comment">/* -------- DSU_PID3 : (DSU Offset: 0x1FEC) (R/ 32) Peripheral Identification 3 -------- */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00509"></a><span class="lineno"> 509</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
|
|
<div class="line"><a name="l00510"></a><span class="lineno"><a class="line" href="unionDSU__PID3__Type.html"> 510</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
|
|
<div class="line"><a name="l00511"></a><span class="lineno"> 511</span>  <span class="keyword">struct </span>{</div>
|
|
<div class="line"><a name="l00512"></a><span class="lineno"><a class="line" href="unionDSU__PID3__Type.html#a04d461de3bfc43fdf0d13ce6bd6568fb"> 512</a></span>  uint32_t <a class="code" href="unionDSU__PID3__Type.html#a04d461de3bfc43fdf0d13ce6bd6568fb">CUSMOD</a>:4; </div>
|
|
<div class="line"><a name="l00513"></a><span class="lineno"><a class="line" href="unionDSU__PID3__Type.html#a598eacfd55f65545266573f0a4008e3b"> 513</a></span>  uint32_t <a class="code" href="unionDSU__PID3__Type.html#a598eacfd55f65545266573f0a4008e3b">REVAND</a>:4; </div>
|
|
<div class="line"><a name="l00514"></a><span class="lineno"><a class="line" href="unionDSU__PID3__Type.html#aade787ffbd28dc9ff6af87a7bcd54e49"> 514</a></span>  uint32_t :24; </div>
|
|
<div class="line"><a name="l00515"></a><span class="lineno"><a class="line" href="unionDSU__PID3__Type.html#a2aad88dc92a4be7b06436e6fb6f16a3a"> 515</a></span>  } bit; </div>
|
|
<div class="line"><a name="l00516"></a><span class="lineno"><a class="line" href="unionDSU__PID3__Type.html#a9f46417b3c6f6f6625067322d6c53e3d"> 516</a></span>  uint32_t <a class="code" href="unionDSU__PID3__Type.html#a9f46417b3c6f6f6625067322d6c53e3d">reg</a>; </div>
|
|
<div class="line"><a name="l00517"></a><span class="lineno"> 517</span> } <a class="code" href="unionDSU__PID3__Type.html">DSU_PID3_Type</a>;</div>
|
|
<div class="line"><a name="l00518"></a><span class="lineno"> 518</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00519"></a><span class="lineno"> 519</span>  </div>
|
|
<div class="line"><a name="l00520"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a0dadf53ca912be72cc37e2eddedbacfa"> 520</a></span> <span class="preprocessor">#define DSU_PID3_OFFSET 0x1FEC </span></div>
|
|
<div class="line"><a name="l00521"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#aaf4259207024e68a7734aa815f281bb2"> 521</a></span> <span class="preprocessor">#define DSU_PID3_RESETVALUE _U_(0x00000000) </span></div>
|
|
<div class="line"><a name="l00523"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ab4e2a84699bcb677236554a721bbe8f4"> 523</a></span> <span class="preprocessor">#define DSU_PID3_CUSMOD_Pos 0 </span></div>
|
|
<div class="line"><a name="l00524"></a><span class="lineno"> 524</span> <span class="preprocessor">#define DSU_PID3_CUSMOD_Msk (_U_(0xF) << DSU_PID3_CUSMOD_Pos)</span></div>
|
|
<div class="line"><a name="l00525"></a><span class="lineno"> 525</span> <span class="preprocessor">#define DSU_PID3_CUSMOD(value) (DSU_PID3_CUSMOD_Msk & ((value) << DSU_PID3_CUSMOD_Pos))</span></div>
|
|
<div class="line"><a name="l00526"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a10e1892be1ad4ad3d2eb63267999efb9"> 526</a></span> <span class="preprocessor">#define DSU_PID3_REVAND_Pos 4 </span></div>
|
|
<div class="line"><a name="l00527"></a><span class="lineno"> 527</span> <span class="preprocessor">#define DSU_PID3_REVAND_Msk (_U_(0xF) << DSU_PID3_REVAND_Pos)</span></div>
|
|
<div class="line"><a name="l00528"></a><span class="lineno"> 528</span> <span class="preprocessor">#define DSU_PID3_REVAND(value) (DSU_PID3_REVAND_Msk & ((value) << DSU_PID3_REVAND_Pos))</span></div>
|
|
<div class="line"><a name="l00529"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#aeaed416954ecb7d99c60af8c7b68b8bb"> 529</a></span> <span class="preprocessor">#define DSU_PID3_MASK _U_(0x000000FF) </span></div>
|
|
<div class="line"><a name="l00531"></a><span class="lineno"> 531</span> <span class="preprocessor"></span><span class="comment">/* -------- DSU_CID0 : (DSU Offset: 0x1FF0) (R/ 32) Component Identification 0 -------- */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00532"></a><span class="lineno"> 532</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
|
|
<div class="line"><a name="l00533"></a><span class="lineno"><a class="line" href="unionDSU__CID0__Type.html"> 533</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
|
|
<div class="line"><a name="l00534"></a><span class="lineno"> 534</span>  <span class="keyword">struct </span>{</div>
|
|
<div class="line"><a name="l00535"></a><span class="lineno"><a class="line" href="unionDSU__CID0__Type.html#a4f67dbdccd818eacce9caee8184313b6"> 535</a></span>  uint32_t <a class="code" href="unionDSU__CID0__Type.html#a4f67dbdccd818eacce9caee8184313b6">PREAMBLEB0</a>:8; </div>
|
|
<div class="line"><a name="l00536"></a><span class="lineno"><a class="line" href="unionDSU__CID0__Type.html#a9fc892dd85fbaabe6cf7ae05e436dc79"> 536</a></span>  uint32_t :24; </div>
|
|
<div class="line"><a name="l00537"></a><span class="lineno"><a class="line" href="unionDSU__CID0__Type.html#a97d9e010bda96428c9b26640f8f373dc"> 537</a></span>  } bit; </div>
|
|
<div class="line"><a name="l00538"></a><span class="lineno"><a class="line" href="unionDSU__CID0__Type.html#a8a4e4e66f3ac668edceaa595bea2b403"> 538</a></span>  uint32_t <a class="code" href="unionDSU__CID0__Type.html#a8a4e4e66f3ac668edceaa595bea2b403">reg</a>; </div>
|
|
<div class="line"><a name="l00539"></a><span class="lineno"> 539</span> } <a class="code" href="unionDSU__CID0__Type.html">DSU_CID0_Type</a>;</div>
|
|
<div class="line"><a name="l00540"></a><span class="lineno"> 540</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00541"></a><span class="lineno"> 541</span>  </div>
|
|
<div class="line"><a name="l00542"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a04d4b050a6adad9da4caf0993e010d8f"> 542</a></span> <span class="preprocessor">#define DSU_CID0_OFFSET 0x1FF0 </span></div>
|
|
<div class="line"><a name="l00543"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a614c4aa7339cc2b804cd773e20ca7bf5"> 543</a></span> <span class="preprocessor">#define DSU_CID0_RESETVALUE _U_(0x0000000D) </span></div>
|
|
<div class="line"><a name="l00545"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a684c02c36c7acb7066c55e248c85c44e"> 545</a></span> <span class="preprocessor">#define DSU_CID0_PREAMBLEB0_Pos 0 </span></div>
|
|
<div class="line"><a name="l00546"></a><span class="lineno"> 546</span> <span class="preprocessor">#define DSU_CID0_PREAMBLEB0_Msk (_U_(0xFF) << DSU_CID0_PREAMBLEB0_Pos)</span></div>
|
|
<div class="line"><a name="l00547"></a><span class="lineno"> 547</span> <span class="preprocessor">#define DSU_CID0_PREAMBLEB0(value) (DSU_CID0_PREAMBLEB0_Msk & ((value) << DSU_CID0_PREAMBLEB0_Pos))</span></div>
|
|
<div class="line"><a name="l00548"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a7c41f1841c69429dc59c6466b4fc0742"> 548</a></span> <span class="preprocessor">#define DSU_CID0_MASK _U_(0x000000FF) </span></div>
|
|
<div class="line"><a name="l00550"></a><span class="lineno"> 550</span> <span class="preprocessor"></span><span class="comment">/* -------- DSU_CID1 : (DSU Offset: 0x1FF4) (R/ 32) Component Identification 1 -------- */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00551"></a><span class="lineno"> 551</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
|
|
<div class="line"><a name="l00552"></a><span class="lineno"><a class="line" href="unionDSU__CID1__Type.html"> 552</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
|
|
<div class="line"><a name="l00553"></a><span class="lineno"> 553</span>  <span class="keyword">struct </span>{</div>
|
|
<div class="line"><a name="l00554"></a><span class="lineno"><a class="line" href="unionDSU__CID1__Type.html#a5cbc7c9fca7f9e5bb863a79ea9646a22"> 554</a></span>  uint32_t <a class="code" href="unionDSU__CID1__Type.html#a5cbc7c9fca7f9e5bb863a79ea9646a22">PREAMBLE</a>:4; </div>
|
|
<div class="line"><a name="l00555"></a><span class="lineno"><a class="line" href="unionDSU__CID1__Type.html#a6a434f2ad6ac5cfa07c0b03ca983bf4a"> 555</a></span>  uint32_t <a class="code" href="unionDSU__CID1__Type.html#a6a434f2ad6ac5cfa07c0b03ca983bf4a">CCLASS</a>:4; </div>
|
|
<div class="line"><a name="l00556"></a><span class="lineno"><a class="line" href="unionDSU__CID1__Type.html#a43f1b63bc6afc0b82ced1f70bd30a8d7"> 556</a></span>  uint32_t :24; </div>
|
|
<div class="line"><a name="l00557"></a><span class="lineno"><a class="line" href="unionDSU__CID1__Type.html#aa1ce77ee27fa29484e09d18da2e7de43"> 557</a></span>  } bit; </div>
|
|
<div class="line"><a name="l00558"></a><span class="lineno"><a class="line" href="unionDSU__CID1__Type.html#a16b80bf740c34d6627ab2ede385062bd"> 558</a></span>  uint32_t <a class="code" href="unionDSU__CID1__Type.html#a16b80bf740c34d6627ab2ede385062bd">reg</a>; </div>
|
|
<div class="line"><a name="l00559"></a><span class="lineno"> 559</span> } <a class="code" href="unionDSU__CID1__Type.html">DSU_CID1_Type</a>;</div>
|
|
<div class="line"><a name="l00560"></a><span class="lineno"> 560</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00561"></a><span class="lineno"> 561</span>  </div>
|
|
<div class="line"><a name="l00562"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a1000fee5818fa48da89833ca079a3a5c"> 562</a></span> <span class="preprocessor">#define DSU_CID1_OFFSET 0x1FF4 </span></div>
|
|
<div class="line"><a name="l00563"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a0ddd2062d17bc1957afe23b2f02a46bd"> 563</a></span> <span class="preprocessor">#define DSU_CID1_RESETVALUE _U_(0x00000010) </span></div>
|
|
<div class="line"><a name="l00565"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a7496e12eabba3a78eaef45bd496a9c89"> 565</a></span> <span class="preprocessor">#define DSU_CID1_PREAMBLE_Pos 0 </span></div>
|
|
<div class="line"><a name="l00566"></a><span class="lineno"> 566</span> <span class="preprocessor">#define DSU_CID1_PREAMBLE_Msk (_U_(0xF) << DSU_CID1_PREAMBLE_Pos)</span></div>
|
|
<div class="line"><a name="l00567"></a><span class="lineno"> 567</span> <span class="preprocessor">#define DSU_CID1_PREAMBLE(value) (DSU_CID1_PREAMBLE_Msk & ((value) << DSU_CID1_PREAMBLE_Pos))</span></div>
|
|
<div class="line"><a name="l00568"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#aa505d5dbcb38fd84adf608eaaa7948a6"> 568</a></span> <span class="preprocessor">#define DSU_CID1_CCLASS_Pos 4 </span></div>
|
|
<div class="line"><a name="l00569"></a><span class="lineno"> 569</span> <span class="preprocessor">#define DSU_CID1_CCLASS_Msk (_U_(0xF) << DSU_CID1_CCLASS_Pos)</span></div>
|
|
<div class="line"><a name="l00570"></a><span class="lineno"> 570</span> <span class="preprocessor">#define DSU_CID1_CCLASS(value) (DSU_CID1_CCLASS_Msk & ((value) << DSU_CID1_CCLASS_Pos))</span></div>
|
|
<div class="line"><a name="l00571"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ab3c48e6716c2288f0cbecf4a4991dcff"> 571</a></span> <span class="preprocessor">#define DSU_CID1_MASK _U_(0x000000FF) </span></div>
|
|
<div class="line"><a name="l00573"></a><span class="lineno"> 573</span> <span class="preprocessor"></span><span class="comment">/* -------- DSU_CID2 : (DSU Offset: 0x1FF8) (R/ 32) Component Identification 2 -------- */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00574"></a><span class="lineno"> 574</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
|
|
<div class="line"><a name="l00575"></a><span class="lineno"><a class="line" href="unionDSU__CID2__Type.html"> 575</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
|
|
<div class="line"><a name="l00576"></a><span class="lineno"> 576</span>  <span class="keyword">struct </span>{</div>
|
|
<div class="line"><a name="l00577"></a><span class="lineno"><a class="line" href="unionDSU__CID2__Type.html#a0d67e7e8f97e11bd49cc3027552f3982"> 577</a></span>  uint32_t <a class="code" href="unionDSU__CID2__Type.html#a0d67e7e8f97e11bd49cc3027552f3982">PREAMBLEB2</a>:8; </div>
|
|
<div class="line"><a name="l00578"></a><span class="lineno"><a class="line" href="unionDSU__CID2__Type.html#ab25c90ecedbc4f5e4029b461e5bcc561"> 578</a></span>  uint32_t :24; </div>
|
|
<div class="line"><a name="l00579"></a><span class="lineno"><a class="line" href="unionDSU__CID2__Type.html#aac605472191c04fd2842d985dec43322"> 579</a></span>  } bit; </div>
|
|
<div class="line"><a name="l00580"></a><span class="lineno"><a class="line" href="unionDSU__CID2__Type.html#aa92726fca48db414a4835715945680a6"> 580</a></span>  uint32_t <a class="code" href="unionDSU__CID2__Type.html#aa92726fca48db414a4835715945680a6">reg</a>; </div>
|
|
<div class="line"><a name="l00581"></a><span class="lineno"> 581</span> } <a class="code" href="unionDSU__CID2__Type.html">DSU_CID2_Type</a>;</div>
|
|
<div class="line"><a name="l00582"></a><span class="lineno"> 582</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00583"></a><span class="lineno"> 583</span>  </div>
|
|
<div class="line"><a name="l00584"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ab07b638d6710bb917955217815dcd84e"> 584</a></span> <span class="preprocessor">#define DSU_CID2_OFFSET 0x1FF8 </span></div>
|
|
<div class="line"><a name="l00585"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a0276c33d43081b5c8cd478b611723f36"> 585</a></span> <span class="preprocessor">#define DSU_CID2_RESETVALUE _U_(0x00000005) </span></div>
|
|
<div class="line"><a name="l00587"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a755afb0dc289f0eeaaf805636836da72"> 587</a></span> <span class="preprocessor">#define DSU_CID2_PREAMBLEB2_Pos 0 </span></div>
|
|
<div class="line"><a name="l00588"></a><span class="lineno"> 588</span> <span class="preprocessor">#define DSU_CID2_PREAMBLEB2_Msk (_U_(0xFF) << DSU_CID2_PREAMBLEB2_Pos)</span></div>
|
|
<div class="line"><a name="l00589"></a><span class="lineno"> 589</span> <span class="preprocessor">#define DSU_CID2_PREAMBLEB2(value) (DSU_CID2_PREAMBLEB2_Msk & ((value) << DSU_CID2_PREAMBLEB2_Pos))</span></div>
|
|
<div class="line"><a name="l00590"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#aedee750a7bad4de75131402ddea84c91"> 590</a></span> <span class="preprocessor">#define DSU_CID2_MASK _U_(0x000000FF) </span></div>
|
|
<div class="line"><a name="l00592"></a><span class="lineno"> 592</span> <span class="preprocessor"></span><span class="comment">/* -------- DSU_CID3 : (DSU Offset: 0x1FFC) (R/ 32) Component Identification 3 -------- */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00593"></a><span class="lineno"> 593</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
|
|
<div class="line"><a name="l00594"></a><span class="lineno"><a class="line" href="unionDSU__CID3__Type.html"> 594</a></span> <span class="keyword">typedef</span> <span class="keyword">union </span>{</div>
|
|
<div class="line"><a name="l00595"></a><span class="lineno"> 595</span>  <span class="keyword">struct </span>{</div>
|
|
<div class="line"><a name="l00596"></a><span class="lineno"><a class="line" href="unionDSU__CID3__Type.html#a60cd69bfe21330ce7858e113b8da44ae"> 596</a></span>  uint32_t <a class="code" href="unionDSU__CID3__Type.html#a60cd69bfe21330ce7858e113b8da44ae">PREAMBLEB3</a>:8; </div>
|
|
<div class="line"><a name="l00597"></a><span class="lineno"><a class="line" href="unionDSU__CID3__Type.html#ab19860ea692b13ae19bf330d41833d94"> 597</a></span>  uint32_t :24; </div>
|
|
<div class="line"><a name="l00598"></a><span class="lineno"><a class="line" href="unionDSU__CID3__Type.html#aae37a04e2a970cbe7c3cf59e4dc2f240"> 598</a></span>  } bit; </div>
|
|
<div class="line"><a name="l00599"></a><span class="lineno"><a class="line" href="unionDSU__CID3__Type.html#afeb585a31166086d971e8b8fb779bb9d"> 599</a></span>  uint32_t <a class="code" href="unionDSU__CID3__Type.html#afeb585a31166086d971e8b8fb779bb9d">reg</a>; </div>
|
|
<div class="line"><a name="l00600"></a><span class="lineno"> 600</span> } <a class="code" href="unionDSU__CID3__Type.html">DSU_CID3_Type</a>;</div>
|
|
<div class="line"><a name="l00601"></a><span class="lineno"> 601</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00602"></a><span class="lineno"> 602</span>  </div>
|
|
<div class="line"><a name="l00603"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a9863199733ba4498f102f28fc2c40021"> 603</a></span> <span class="preprocessor">#define DSU_CID3_OFFSET 0x1FFC </span></div>
|
|
<div class="line"><a name="l00604"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a8cfe3b4da150c87da70eccd4c07280f4"> 604</a></span> <span class="preprocessor">#define DSU_CID3_RESETVALUE _U_(0x000000B1) </span></div>
|
|
<div class="line"><a name="l00606"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#ad11a14455b5f888c07616d9c56808b09"> 606</a></span> <span class="preprocessor">#define DSU_CID3_PREAMBLEB3_Pos 0 </span></div>
|
|
<div class="line"><a name="l00607"></a><span class="lineno"> 607</span> <span class="preprocessor">#define DSU_CID3_PREAMBLEB3_Msk (_U_(0xFF) << DSU_CID3_PREAMBLEB3_Pos)</span></div>
|
|
<div class="line"><a name="l00608"></a><span class="lineno"> 608</span> <span class="preprocessor">#define DSU_CID3_PREAMBLEB3(value) (DSU_CID3_PREAMBLEB3_Msk & ((value) << DSU_CID3_PREAMBLEB3_Pos))</span></div>
|
|
<div class="line"><a name="l00609"></a><span class="lineno"><a class="line" href="component_2dsu_8h.html#a7b551efb4b690585f91a21e36b24215f"> 609</a></span> <span class="preprocessor">#define DSU_CID3_MASK _U_(0x000000FF) </span></div>
|
|
<div class="line"><a name="l00612"></a><span class="lineno"> 612</span> <span class="preprocessor">#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
|
|
<div class="line"><a name="l00613"></a><span class="lineno"><a class="line" href="structDsu.html"> 613</a></span> <span class="keyword">typedef</span> <span class="keyword">struct </span>{</div>
|
|
<div class="line"><a name="l00614"></a><span class="lineno"><a class="line" href="structDsu.html#a37a45b5734e68c25515884abbc7354bc"> 614</a></span>  __O <a class="code" href="unionDSU__CTRL__Type.html">DSU_CTRL_Type</a> <a class="code" href="structDsu.html#a37a45b5734e68c25515884abbc7354bc">CTRL</a>; </div>
|
|
<div class="line"><a name="l00615"></a><span class="lineno"><a class="line" href="structDsu.html#af251ab6944603f4ffcc03a04c3a591af"> 615</a></span>  __IO <a class="code" href="unionDSU__STATUSA__Type.html">DSU_STATUSA_Type</a> <a class="code" href="structDsu.html#af251ab6944603f4ffcc03a04c3a591af">STATUSA</a>; </div>
|
|
<div class="line"><a name="l00616"></a><span class="lineno"><a class="line" href="structDsu.html#aff3083b68480ee6d95d4213577136659"> 616</a></span>  __I <a class="code" href="unionDSU__STATUSB__Type.html">DSU_STATUSB_Type</a> <a class="code" href="structDsu.html#aff3083b68480ee6d95d4213577136659">STATUSB</a>; </div>
|
|
<div class="line"><a name="l00617"></a><span class="lineno"> 617</span>  <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved1[0x1];</div>
|
|
<div class="line"><a name="l00618"></a><span class="lineno"><a class="line" href="structDsu.html#a453e7beb133d9b05320a24aba312f7f0"> 618</a></span>  __IO <a class="code" href="unionDSU__ADDR__Type.html">DSU_ADDR_Type</a> <a class="code" href="structDsu.html#a453e7beb133d9b05320a24aba312f7f0">ADDR</a>; </div>
|
|
<div class="line"><a name="l00619"></a><span class="lineno"><a class="line" href="structDsu.html#af13eeff822c0542965939b8a078bc496"> 619</a></span>  __IO <a class="code" href="unionDSU__LENGTH__Type.html">DSU_LENGTH_Type</a> <a class="code" href="structDsu.html#af13eeff822c0542965939b8a078bc496">LENGTH</a>; </div>
|
|
<div class="line"><a name="l00620"></a><span class="lineno"><a class="line" href="structDsu.html#a0a0cae05796695f78b4e5536792c8953"> 620</a></span>  __IO <a class="code" href="unionDSU__DATA__Type.html">DSU_DATA_Type</a> <a class="code" href="structDsu.html#a0a0cae05796695f78b4e5536792c8953">DATA</a>; </div>
|
|
<div class="line"><a name="l00621"></a><span class="lineno"><a class="line" href="structDsu.html#a8cd3250ce850a65d90af4f8b31c6293c"> 621</a></span>  __IO <a class="code" href="unionDSU__DCC__Type.html">DSU_DCC_Type</a> DCC[2]; </div>
|
|
<div class="line"><a name="l00622"></a><span class="lineno"><a class="line" href="structDsu.html#ae8a2a4525dd77831e3bba601b5eaf924"> 622</a></span>  __I <a class="code" href="unionDSU__DID__Type.html">DSU_DID_Type</a> <a class="code" href="structDsu.html#ae8a2a4525dd77831e3bba601b5eaf924">DID</a>; </div>
|
|
<div class="line"><a name="l00623"></a><span class="lineno"><a class="line" href="structDsu.html#a0a408f4b65eefa0933f2cce115230e3d"> 623</a></span>  __IO <a class="code" href="unionDSU__CFG__Type.html">DSU_CFG_Type</a> <a class="code" href="structDsu.html#a0a408f4b65eefa0933f2cce115230e3d">CFG</a>; </div>
|
|
<div class="line"><a name="l00624"></a><span class="lineno"> 624</span>  <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved2[0xFE0];</div>
|
|
<div class="line"><a name="l00625"></a><span class="lineno"><a class="line" href="structDsu.html#a42805e1dcd37f9686cf024f3ab13e486"> 625</a></span>  __I <a class="code" href="unionDSU__ENTRY0__Type.html">DSU_ENTRY0_Type</a> <a class="code" href="structDsu.html#a42805e1dcd37f9686cf024f3ab13e486">ENTRY0</a>; </div>
|
|
<div class="line"><a name="l00626"></a><span class="lineno"><a class="line" href="structDsu.html#a8d46a28676e73cd6c269d047ca71550e"> 626</a></span>  __I <a class="code" href="unionDSU__ENTRY1__Type.html">DSU_ENTRY1_Type</a> <a class="code" href="structDsu.html#a8d46a28676e73cd6c269d047ca71550e">ENTRY1</a>; </div>
|
|
<div class="line"><a name="l00627"></a><span class="lineno"><a class="line" href="structDsu.html#ae320db89e4b834b02befb5aa2867ce09"> 627</a></span>  __I <a class="code" href="unionDSU__END__Type.html">DSU_END_Type</a> <a class="code" href="structDsu.html#ae320db89e4b834b02befb5aa2867ce09">END</a>; </div>
|
|
<div class="line"><a name="l00628"></a><span class="lineno"> 628</span>  <a class="code" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> Reserved3[0xFC0];</div>
|
|
<div class="line"><a name="l00629"></a><span class="lineno"><a class="line" href="structDsu.html#a408d8afc257ed78a3169ca958d24a5aa"> 629</a></span>  __I <a class="code" href="unionDSU__MEMTYPE__Type.html">DSU_MEMTYPE_Type</a> <a class="code" href="structDsu.html#a408d8afc257ed78a3169ca958d24a5aa">MEMTYPE</a>; </div>
|
|
<div class="line"><a name="l00630"></a><span class="lineno"><a class="line" href="structDsu.html#af1aef1af23b9c04fa51bb38d3d49d980"> 630</a></span>  __I <a class="code" href="unionDSU__PID4__Type.html">DSU_PID4_Type</a> <a class="code" href="structDsu.html#af1aef1af23b9c04fa51bb38d3d49d980">PID4</a>; </div>
|
|
<div class="line"><a name="l00631"></a><span class="lineno"><a class="line" href="structDsu.html#a96116374ab1f4811e73ce3b53b2a4908"> 631</a></span>  __I <a class="code" href="unionDSU__PID5__Type.html">DSU_PID5_Type</a> <a class="code" href="structDsu.html#a96116374ab1f4811e73ce3b53b2a4908">PID5</a>; </div>
|
|
<div class="line"><a name="l00632"></a><span class="lineno"><a class="line" href="structDsu.html#affd7dad98096b621d482b72f42fce5e8"> 632</a></span>  __I <a class="code" href="unionDSU__PID6__Type.html">DSU_PID6_Type</a> <a class="code" href="structDsu.html#affd7dad98096b621d482b72f42fce5e8">PID6</a>; </div>
|
|
<div class="line"><a name="l00633"></a><span class="lineno"><a class="line" href="structDsu.html#a8a733fbde9d20baf89a47df500770071"> 633</a></span>  __I <a class="code" href="unionDSU__PID7__Type.html">DSU_PID7_Type</a> <a class="code" href="structDsu.html#a8a733fbde9d20baf89a47df500770071">PID7</a>; </div>
|
|
<div class="line"><a name="l00634"></a><span class="lineno"><a class="line" href="structDsu.html#a60c2a9199ffaae85c76de6c28fc15ec1"> 634</a></span>  __I <a class="code" href="unionDSU__PID0__Type.html">DSU_PID0_Type</a> <a class="code" href="structDsu.html#a60c2a9199ffaae85c76de6c28fc15ec1">PID0</a>; </div>
|
|
<div class="line"><a name="l00635"></a><span class="lineno"><a class="line" href="structDsu.html#aeafe6f433e6983dedb1b78efe1508991"> 635</a></span>  __I <a class="code" href="unionDSU__PID1__Type.html">DSU_PID1_Type</a> <a class="code" href="structDsu.html#aeafe6f433e6983dedb1b78efe1508991">PID1</a>; </div>
|
|
<div class="line"><a name="l00636"></a><span class="lineno"><a class="line" href="structDsu.html#ae7543be9132a30e1a0a3d2585fa74ad7"> 636</a></span>  __I <a class="code" href="unionDSU__PID2__Type.html">DSU_PID2_Type</a> <a class="code" href="structDsu.html#ae7543be9132a30e1a0a3d2585fa74ad7">PID2</a>; </div>
|
|
<div class="line"><a name="l00637"></a><span class="lineno"><a class="line" href="structDsu.html#a12e3fc61b1f37f213768fded01011226"> 637</a></span>  __I <a class="code" href="unionDSU__PID3__Type.html">DSU_PID3_Type</a> <a class="code" href="structDsu.html#a12e3fc61b1f37f213768fded01011226">PID3</a>; </div>
|
|
<div class="line"><a name="l00638"></a><span class="lineno"><a class="line" href="structDsu.html#acd4b45b637efcb62b9f67c877dcbb4ce"> 638</a></span>  __I <a class="code" href="unionDSU__CID0__Type.html">DSU_CID0_Type</a> <a class="code" href="structDsu.html#acd4b45b637efcb62b9f67c877dcbb4ce">CID0</a>; </div>
|
|
<div class="line"><a name="l00639"></a><span class="lineno"><a class="line" href="structDsu.html#afeea7b5b5fee7f91ca2886b616f3d4c3"> 639</a></span>  __I <a class="code" href="unionDSU__CID1__Type.html">DSU_CID1_Type</a> <a class="code" href="structDsu.html#afeea7b5b5fee7f91ca2886b616f3d4c3">CID1</a>; </div>
|
|
<div class="line"><a name="l00640"></a><span class="lineno"><a class="line" href="structDsu.html#afaa3b33371d8b21883936c53a879d61f"> 640</a></span>  __I <a class="code" href="unionDSU__CID2__Type.html">DSU_CID2_Type</a> <a class="code" href="structDsu.html#afaa3b33371d8b21883936c53a879d61f">CID2</a>; </div>
|
|
<div class="line"><a name="l00641"></a><span class="lineno"><a class="line" href="structDsu.html#a8ce289f77dfa3331bc94ae699c6031d7"> 641</a></span>  __I <a class="code" href="unionDSU__CID3__Type.html">DSU_CID3_Type</a> <a class="code" href="structDsu.html#a8ce289f77dfa3331bc94ae699c6031d7">CID3</a>; </div>
|
|
<div class="line"><a name="l00642"></a><span class="lineno"> 642</span> } <a class="code" href="structDsu.html">Dsu</a>;</div>
|
|
<div class="line"><a name="l00643"></a><span class="lineno"> 643</span> <span class="preprocessor">#endif </span><span class="comment">/* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
|
|
<div class="line"><a name="l00644"></a><span class="lineno"> 644</span>  </div>
|
|
<div class="line"><a name="l00647"></a><span class="lineno"> 647</span> <span class="preprocessor">#endif </span><span class="comment">/* _SAME54_DSU_COMPONENT_ */</span><span class="preprocessor"></span></div>
|
|
</div><!-- fragment --></div><!-- contents -->
|
|
<div class="ttc" id="aunionDSU__DATA__Type_html_a0793b4370bb1175b9222fa2ec65667b7"><div class="ttname"><a href="unionDSU__DATA__Type.html#a0793b4370bb1175b9222fa2ec65667b7">DSU_DATA_Type::DATA</a></div><div class="ttdeci">uint32_t DATA</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00192">dsu.h:192</a></div></div>
|
|
<div class="ttc" id="aunionDSU__CID3__Type_html"><div class="ttname"><a href="unionDSU__CID3__Type.html">DSU_CID3_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00594">dsu.h:594</a></div></div>
|
|
<div class="ttc" id="aunionDSU__ADDR__Type_html_af80527c464042fc13266915c73e62ef4"><div class="ttname"><a href="unionDSU__ADDR__Type.html#af80527c464042fc13266915c73e62ef4">DSU_ADDR_Type::ADDR</a></div><div class="ttdeci">uint32_t ADDR</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00152">dsu.h:152</a></div></div>
|
|
<div class="ttc" id="aunionDSU__PID1__Type_html_a00638eca3237e0bfedae6c22418203e5"><div class="ttname"><a href="unionDSU__PID1__Type.html#a00638eca3237e0bfedae6c22418203e5">DSU_PID1_Type::JEPIDCL</a></div><div class="ttdeci">uint32_t JEPIDCL</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00464">dsu.h:464</a></div></div>
|
|
<div class="ttc" id="astructDsu_html_afaa3b33371d8b21883936c53a879d61f"><div class="ttname"><a href="structDsu.html#afaa3b33371d8b21883936c53a879d61f">Dsu::CID2</a></div><div class="ttdeci">__I DSU_CID2_Type CID2</div><div class="ttdoc">Offset: 0x1FF8 (R/ 32) Component Identification 2.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00640">dsu.h:640</a></div></div>
|
|
<div class="ttc" id="aunionDSU__STATUSA__Type_html_a23415dfa2ba81d7e98774bd358c40db8"><div class="ttname"><a href="unionDSU__STATUSA__Type.html#a23415dfa2ba81d7e98774bd358c40db8">DSU_STATUSA_Type::BERR</a></div><div class="ttdeci">uint8_t BERR</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00082">dsu.h:82</a></div></div>
|
|
<div class="ttc" id="aunionDSU__PID3__Type_html"><div class="ttname"><a href="unionDSU__PID3__Type.html">DSU_PID3_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00510">dsu.h:510</a></div></div>
|
|
<div class="ttc" id="astructDsu_html_ae7543be9132a30e1a0a3d2585fa74ad7"><div class="ttname"><a href="structDsu.html#ae7543be9132a30e1a0a3d2585fa74ad7">Dsu::PID2</a></div><div class="ttdeci">__I DSU_PID2_Type PID2</div><div class="ttdoc">Offset: 0x1FE8 (R/ 32) Peripheral Identification 2.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00636">dsu.h:636</a></div></div>
|
|
<div class="ttc" id="aunionDSU__CID1__Type_html_a6a434f2ad6ac5cfa07c0b03ca983bf4a"><div class="ttname"><a href="unionDSU__CID1__Type.html#a6a434f2ad6ac5cfa07c0b03ca983bf4a">DSU_CID1_Type::CCLASS</a></div><div class="ttdeci">uint32_t CCLASS</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00555">dsu.h:555</a></div></div>
|
|
<div class="ttc" id="aunionDSU__ENTRY0__Type_html"><div class="ttname"><a href="unionDSU__ENTRY0__Type.html">DSU_ENTRY0_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00314">dsu.h:314</a></div></div>
|
|
<div class="ttc" id="aunionDSU__PID3__Type_html_a598eacfd55f65545266573f0a4008e3b"><div class="ttname"><a href="unionDSU__PID3__Type.html#a598eacfd55f65545266573f0a4008e3b">DSU_PID3_Type::REVAND</a></div><div class="ttdeci">uint32_t REVAND</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00513">dsu.h:513</a></div></div>
|
|
<div class="ttc" id="aunionDSU__CID0__Type_html"><div class="ttname"><a href="unionDSU__CID0__Type.html">DSU_CID0_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00533">dsu.h:533</a></div></div>
|
|
<div class="ttc" id="aunionDSU__PID3__Type_html_a9f46417b3c6f6f6625067322d6c53e3d"><div class="ttname"><a href="unionDSU__PID3__Type.html#a9f46417b3c6f6f6625067322d6c53e3d">DSU_PID3_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00516">dsu.h:516</a></div></div>
|
|
<div class="ttc" id="aunionDSU__CTRL__Type_html_aead0ceef9a72bc2e2e07d865be80b89c"><div class="ttname"><a href="unionDSU__CTRL__Type.html#aead0ceef9a72bc2e2e07d865be80b89c">DSU_CTRL_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00055">dsu.h:55</a></div></div>
|
|
<div class="ttc" id="astructDsu_html_a12e3fc61b1f37f213768fded01011226"><div class="ttname"><a href="structDsu.html#a12e3fc61b1f37f213768fded01011226">Dsu::PID3</a></div><div class="ttdeci">__I DSU_PID3_Type PID3</div><div class="ttdoc">Offset: 0x1FEC (R/ 32) Peripheral Identification 3.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00637">dsu.h:637</a></div></div>
|
|
<div class="ttc" id="aunionDSU__DID__Type_html_aa98a458040daf79582a83e77c0a55a5d"><div class="ttname"><a href="unionDSU__DID__Type.html#aa98a458040daf79582a83e77c0a55a5d">DSU_DID_Type::DIE</a></div><div class="ttdeci">uint32_t DIE</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00230">dsu.h:230</a></div></div>
|
|
<div class="ttc" id="aunionDSU__PID0__Type_html"><div class="ttname"><a href="unionDSU__PID0__Type.html">DSU_PID0_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00442">dsu.h:442</a></div></div>
|
|
<div class="ttc" id="aunionDSU__ADDR__Type_html_a21c57af42627a2ac52a4e1599582c241"><div class="ttname"><a href="unionDSU__ADDR__Type.html#a21c57af42627a2ac52a4e1599582c241">DSU_ADDR_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00154">dsu.h:154</a></div></div>
|
|
<div class="ttc" id="aunionDSU__CID2__Type_html_aa92726fca48db414a4835715945680a6"><div class="ttname"><a href="unionDSU__CID2__Type.html#aa92726fca48db414a4835715945680a6">DSU_CID2_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00580">dsu.h:580</a></div></div>
|
|
<div class="ttc" id="aunionDSU__MEMTYPE__Type_html_a9811ad777bc9653aaa34c9c298031513"><div class="ttname"><a href="unionDSU__MEMTYPE__Type.html#a9811ad777bc9653aaa34c9c298031513">DSU_MEMTYPE_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00373">dsu.h:373</a></div></div>
|
|
<div class="ttc" id="aunionDSU__CTRL__Type_html_a9a351c7d3ed4db72fe199f29441b24e4"><div class="ttname"><a href="unionDSU__CTRL__Type.html#a9a351c7d3ed4db72fe199f29441b24e4">DSU_CTRL_Type::CRC</a></div><div class="ttdeci">uint8_t CRC</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00048">dsu.h:48</a></div></div>
|
|
<div class="ttc" id="astructDsu_html_aff3083b68480ee6d95d4213577136659"><div class="ttname"><a href="structDsu.html#aff3083b68480ee6d95d4213577136659">Dsu::STATUSB</a></div><div class="ttdeci">__I DSU_STATUSB_Type STATUSB</div><div class="ttdoc">Offset: 0x0002 (R/ 8) Status B.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00616">dsu.h:616</a></div></div>
|
|
<div class="ttc" id="astructDsu_html_af13eeff822c0542965939b8a078bc496"><div class="ttname"><a href="structDsu.html#af13eeff822c0542965939b8a078bc496">Dsu::LENGTH</a></div><div class="ttdeci">__IO DSU_LENGTH_Type LENGTH</div><div class="ttdoc">Offset: 0x0008 (R/W 32) Length.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00619">dsu.h:619</a></div></div>
|
|
<div class="ttc" id="aunionDSU__END__Type_html_a24ad2e64ac7f159c62d9e1d30184432b"><div class="ttname"><a href="unionDSU__END__Type.html#a24ad2e64ac7f159c62d9e1d30184432b">DSU_END_Type::END</a></div><div class="ttdeci">uint32_t END</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00352">dsu.h:352</a></div></div>
|
|
<div class="ttc" id="astructDsu_html_a453e7beb133d9b05320a24aba312f7f0"><div class="ttname"><a href="structDsu.html#a453e7beb133d9b05320a24aba312f7f0">Dsu::ADDR</a></div><div class="ttdeci">__IO DSU_ADDR_Type ADDR</div><div class="ttdoc">Offset: 0x0004 (R/W 32) Address.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00618">dsu.h:618</a></div></div>
|
|
<div class="ttc" id="aunionDSU__CID3__Type_html_afeb585a31166086d971e8b8fb779bb9d"><div class="ttname"><a href="unionDSU__CID3__Type.html#afeb585a31166086d971e8b8fb779bb9d">DSU_CID3_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00599">dsu.h:599</a></div></div>
|
|
<div class="ttc" id="aunionDSU__DID__Type_html_a6b84fbd4364f870cc96a9da2fe7fe02b"><div class="ttname"><a href="unionDSU__DID__Type.html#a6b84fbd4364f870cc96a9da2fe7fe02b">DSU_DID_Type::DEVSEL</a></div><div class="ttdeci">uint32_t DEVSEL</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00228">dsu.h:228</a></div></div>
|
|
<div class="ttc" id="astructDsu_html_a96116374ab1f4811e73ce3b53b2a4908"><div class="ttname"><a href="structDsu.html#a96116374ab1f4811e73ce3b53b2a4908">Dsu::PID5</a></div><div class="ttdeci">__I DSU_PID5_Type PID5</div><div class="ttdoc">Offset: 0x1FD4 (R/ 32) Peripheral Identification 5.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00631">dsu.h:631</a></div></div>
|
|
<div class="ttc" id="aunionDSU__ENTRY0__Type_html_aa3926f1f9527552a50337fd2b24716ff"><div class="ttname"><a href="unionDSU__ENTRY0__Type.html#aa3926f1f9527552a50337fd2b24716ff">DSU_ENTRY0_Type::FMT</a></div><div class="ttdeci">uint32_t FMT</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00317">dsu.h:317</a></div></div>
|
|
<div class="ttc" id="aunionDSU__PID7__Type_html"><div class="ttname"><a href="unionDSU__PID7__Type.html">DSU_PID7_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00431">dsu.h:431</a></div></div>
|
|
<div class="ttc" id="astructDsu_html_a8a733fbde9d20baf89a47df500770071"><div class="ttname"><a href="structDsu.html#a8a733fbde9d20baf89a47df500770071">Dsu::PID7</a></div><div class="ttdeci">__I DSU_PID7_Type PID7</div><div class="ttdoc">Offset: 0x1FDC (R/ 32) Peripheral Identification 7.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00633">dsu.h:633</a></div></div>
|
|
<div class="ttc" id="aunionDSU__CID2__Type_html_a0d67e7e8f97e11bd49cc3027552f3982"><div class="ttname"><a href="unionDSU__CID2__Type.html#a0d67e7e8f97e11bd49cc3027552f3982">DSU_CID2_Type::PREAMBLEB2</a></div><div class="ttdeci">uint32_t PREAMBLEB2</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00577">dsu.h:577</a></div></div>
|
|
<div class="ttc" id="astructDsu_html_a37a45b5734e68c25515884abbc7354bc"><div class="ttname"><a href="structDsu.html#a37a45b5734e68c25515884abbc7354bc">Dsu::CTRL</a></div><div class="ttdeci">__O DSU_CTRL_Type CTRL</div><div class="ttdoc">Offset: 0x0000 ( /W 8) Control.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00614">dsu.h:614</a></div></div>
|
|
<div class="ttc" id="aunionDSU__PID6__Type_html_a5c9f3720d55b56e6aef2b71ac0b50a13"><div class="ttname"><a href="unionDSU__PID6__Type.html#a5c9f3720d55b56e6aef2b71ac0b50a13">DSU_PID6_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00421">dsu.h:421</a></div></div>
|
|
<div class="ttc" id="aunionDSU__PID5__Type_html_a381ed71ad8950e0059bf48ed20c78e9d"><div class="ttname"><a href="unionDSU__PID5__Type.html#a381ed71ad8950e0059bf48ed20c78e9d">DSU_PID5_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00410">dsu.h:410</a></div></div>
|
|
<div class="ttc" id="aunionDSU__PID4__Type_html_a6fdd5fe268e92ffe333394c0eb34431a"><div class="ttname"><a href="unionDSU__PID4__Type.html#a6fdd5fe268e92ffe333394c0eb34431a">DSU_PID4_Type::FKBC</a></div><div class="ttdeci">uint32_t FKBC</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00389">dsu.h:389</a></div></div>
|
|
<div class="ttc" id="astructDsu_html_a8d46a28676e73cd6c269d047ca71550e"><div class="ttname"><a href="structDsu.html#a8d46a28676e73cd6c269d047ca71550e">Dsu::ENTRY1</a></div><div class="ttdeci">__I DSU_ENTRY1_Type ENTRY1</div><div class="ttdoc">Offset: 0x1004 (R/ 32) CoreSight ROM Table Entry 1.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00626">dsu.h:626</a></div></div>
|
|
<div class="ttc" id="astructDsu_html_a60c2a9199ffaae85c76de6c28fc15ec1"><div class="ttname"><a href="structDsu.html#a60c2a9199ffaae85c76de6c28fc15ec1">Dsu::PID0</a></div><div class="ttdeci">__I DSU_PID0_Type PID0</div><div class="ttdoc">Offset: 0x1FE0 (R/ 32) Peripheral Identification 0.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00634">dsu.h:634</a></div></div>
|
|
<div class="ttc" id="aunionDSU__CID2__Type_html"><div class="ttname"><a href="unionDSU__CID2__Type.html">DSU_CID2_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00575">dsu.h:575</a></div></div>
|
|
<div class="ttc" id="aunionDSU__CTRL__Type_html_a65fe38370088ef03ea4be1a7e98d91b6"><div class="ttname"><a href="unionDSU__CTRL__Type.html#a65fe38370088ef03ea4be1a7e98d91b6">DSU_CTRL_Type::ARR</a></div><div class="ttdeci">uint8_t ARR</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00052">dsu.h:52</a></div></div>
|
|
<div class="ttc" id="astructDsu_html_afeea7b5b5fee7f91ca2886b616f3d4c3"><div class="ttname"><a href="structDsu.html#afeea7b5b5fee7f91ca2886b616f3d4c3">Dsu::CID1</a></div><div class="ttdeci">__I DSU_CID1_Type CID1</div><div class="ttdoc">Offset: 0x1FF4 (R/ 32) Component Identification 1.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00639">dsu.h:639</a></div></div>
|
|
<div class="ttc" id="aunionDSU__PID2__Type_html_ae1fa34e088136d567cd1769499c50ab3"><div class="ttname"><a href="unionDSU__PID2__Type.html#ae1fa34e088136d567cd1769499c50ab3">DSU_PID2_Type::JEPU</a></div><div class="ttdeci">uint32_t JEPU</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00487">dsu.h:487</a></div></div>
|
|
<div class="ttc" id="aunionDSU__PID2__Type_html"><div class="ttname"><a href="unionDSU__PID2__Type.html">DSU_PID2_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00484">dsu.h:484</a></div></div>
|
|
<div class="ttc" id="aunionDSU__DCC__Type_html_ae3e5ccae0e39ab81ad4667dc5dab6f66"><div class="ttname"><a href="unionDSU__DCC__Type.html#ae3e5ccae0e39ab81ad4667dc5dab6f66">DSU_DCC_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00212">dsu.h:212</a></div></div>
|
|
<div class="ttc" id="aunionDSU__PID1__Type_html_af789ec8a7e1fa2718283e9374643cd10"><div class="ttname"><a href="unionDSU__PID1__Type.html#af789ec8a7e1fa2718283e9374643cd10">DSU_PID1_Type::PARTNBH</a></div><div class="ttdeci">uint32_t PARTNBH</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00463">dsu.h:463</a></div></div>
|
|
<div class="ttc" id="astructDsu_html_a0a0cae05796695f78b4e5536792c8953"><div class="ttname"><a href="structDsu.html#a0a0cae05796695f78b4e5536792c8953">Dsu::DATA</a></div><div class="ttdeci">__IO DSU_DATA_Type DATA</div><div class="ttdoc">Offset: 0x000C (R/W 32) Data.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00620">dsu.h:620</a></div></div>
|
|
<div class="ttc" id="aunionDSU__ENTRY0__Type_html_a3f265550e3d4a038a1e359d8ae807c48"><div class="ttname"><a href="unionDSU__ENTRY0__Type.html#a3f265550e3d4a038a1e359d8ae807c48">DSU_ENTRY0_Type::EPRES</a></div><div class="ttdeci">uint32_t EPRES</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00316">dsu.h:316</a></div></div>
|
|
<div class="ttc" id="aunionDSU__STATUSB__Type_html_a9db72198105203a1f2a2408e0cea70d9"><div class="ttname"><a href="unionDSU__STATUSB__Type.html#a9db72198105203a1f2a2408e0cea70d9">DSU_STATUSB_Type::PROT</a></div><div class="ttdeci">uint8_t PROT</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00110">dsu.h:110</a></div></div>
|
|
<div class="ttc" id="astructDsu_html_af1aef1af23b9c04fa51bb38d3d49d980"><div class="ttname"><a href="structDsu.html#af1aef1af23b9c04fa51bb38d3d49d980">Dsu::PID4</a></div><div class="ttdeci">__I DSU_PID4_Type PID4</div><div class="ttdoc">Offset: 0x1FD0 (R/ 32) Peripheral Identification 4.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00630">dsu.h:630</a></div></div>
|
|
<div class="ttc" id="aunionDSU__STATUSA__Type_html_a6c012a1306fb8f409347e5a8a333998a"><div class="ttname"><a href="unionDSU__STATUSA__Type.html#a6c012a1306fb8f409347e5a8a333998a">DSU_STATUSA_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00087">dsu.h:87</a></div></div>
|
|
<div class="ttc" id="aunionDSU__PID6__Type_html"><div class="ttname"><a href="unionDSU__PID6__Type.html">DSU_PID6_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00420">dsu.h:420</a></div></div>
|
|
<div class="ttc" id="aunionDSU__PID4__Type_html_a351cf48be2b0e2845a7a8987c3c869f8"><div class="ttname"><a href="unionDSU__PID4__Type.html#a351cf48be2b0e2845a7a8987c3c869f8">DSU_PID4_Type::JEPCC</a></div><div class="ttdeci">uint32_t JEPCC</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00388">dsu.h:388</a></div></div>
|
|
<div class="ttc" id="aunionDSU__ENTRY1__Type_html"><div class="ttname"><a href="unionDSU__ENTRY1__Type.html">DSU_ENTRY1_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00339">dsu.h:339</a></div></div>
|
|
<div class="ttc" id="aunionDSU__CTRL__Type_html_a88845326ae957d9f9ce3c15a0cac4963"><div class="ttname"><a href="unionDSU__CTRL__Type.html#a88845326ae957d9f9ce3c15a0cac4963">DSU_CTRL_Type::SMSA</a></div><div class="ttdeci">uint8_t SMSA</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00053">dsu.h:53</a></div></div>
|
|
<div class="ttc" id="aunionDSU__PID0__Type_html_a7db2231c24781271c48df2f5fb7805a6"><div class="ttname"><a href="unionDSU__PID0__Type.html#a7db2231c24781271c48df2f5fb7805a6">DSU_PID0_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00447">dsu.h:447</a></div></div>
|
|
<div class="ttc" id="aunionDSU__CID3__Type_html_a60cd69bfe21330ce7858e113b8da44ae"><div class="ttname"><a href="unionDSU__CID3__Type.html#a60cd69bfe21330ce7858e113b8da44ae">DSU_CID3_Type::PREAMBLEB3</a></div><div class="ttdeci">uint32_t PREAMBLEB3</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00596">dsu.h:596</a></div></div>
|
|
<div class="ttc" id="aunionDSU__CFG__Type_html_a9fc453e5a388cd9ce3a67d9fb80aa3ff"><div class="ttname"><a href="unionDSU__CFG__Type.html#a9fc453e5a388cd9ce3a67d9fb80aa3ff">DSU_CFG_Type::DCCDMALEVEL</a></div><div class="ttdeci">uint32_t DCCDMALEVEL</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00287">dsu.h:287</a></div></div>
|
|
<div class="ttc" id="aunionDSU__PID2__Type_html_aa77daad8160c0503bf4348a988c1580d"><div class="ttname"><a href="unionDSU__PID2__Type.html#aa77daad8160c0503bf4348a988c1580d">DSU_PID2_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00491">dsu.h:491</a></div></div>
|
|
<div class="ttc" id="astructDsu_html_ae320db89e4b834b02befb5aa2867ce09"><div class="ttname"><a href="structDsu.html#ae320db89e4b834b02befb5aa2867ce09">Dsu::END</a></div><div class="ttdeci">__I DSU_END_Type END</div><div class="ttdoc">Offset: 0x1008 (R/ 32) CoreSight ROM Table End.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00627">dsu.h:627</a></div></div>
|
|
<div class="ttc" id="aunionDSU__ADDR__Type_html"><div class="ttname"><a href="unionDSU__ADDR__Type.html">DSU_ADDR_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00149">dsu.h:149</a></div></div>
|
|
<div class="ttc" id="aunionDSU__LENGTH__Type_html_a6c1bdd63165dd29edf1dc8a4d775cffb"><div class="ttname"><a href="unionDSU__LENGTH__Type.html#a6c1bdd63165dd29edf1dc8a4d775cffb">DSU_LENGTH_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00176">dsu.h:176</a></div></div>
|
|
<div class="ttc" id="aunionDSU__ENTRY0__Type_html_ac8df1fef5c69a4e75d67608e8e100b47"><div class="ttname"><a href="unionDSU__ENTRY0__Type.html#ac8df1fef5c69a4e75d67608e8e100b47">DSU_ENTRY0_Type::ADDOFF</a></div><div class="ttdeci">uint32_t ADDOFF</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00319">dsu.h:319</a></div></div>
|
|
<div class="ttc" id="aunionDSU__STATUSB__Type_html_aeeaaab9cca0305cf41d31c2861a3190b"><div class="ttname"><a href="unionDSU__STATUSB__Type.html#aeeaaab9cca0305cf41d31c2861a3190b">DSU_STATUSB_Type::CELCK</a></div><div class="ttdeci">uint8_t CELCK</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00115">dsu.h:115</a></div></div>
|
|
<div class="ttc" id="aunionDSU__CFG__Type_html_a00254ef2e9f3500e5c6b3e338eb2ad5c"><div class="ttname"><a href="unionDSU__CFG__Type.html#a00254ef2e9f3500e5c6b3e338eb2ad5c">DSU_CFG_Type::ETBRAMEN</a></div><div class="ttdeci">uint32_t ETBRAMEN</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00288">dsu.h:288</a></div></div>
|
|
<div class="ttc" id="aunionDSU__PID5__Type_html"><div class="ttname"><a href="unionDSU__PID5__Type.html">DSU_PID5_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00409">dsu.h:409</a></div></div>
|
|
<div class="ttc" id="astructDsu_html_a42805e1dcd37f9686cf024f3ab13e486"><div class="ttname"><a href="structDsu.html#a42805e1dcd37f9686cf024f3ab13e486">Dsu::ENTRY0</a></div><div class="ttdeci">__I DSU_ENTRY0_Type ENTRY0</div><div class="ttdoc">Offset: 0x1000 (R/ 32) CoreSight ROM Table Entry 0.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00625">dsu.h:625</a></div></div>
|
|
<div class="ttc" id="aunionDSU__PID2__Type_html_a98d6ae81bae471444221dad368417fcb"><div class="ttname"><a href="unionDSU__PID2__Type.html#a98d6ae81bae471444221dad368417fcb">DSU_PID2_Type::JEPIDCH</a></div><div class="ttdeci">uint32_t JEPIDCH</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00486">dsu.h:486</a></div></div>
|
|
<div class="ttc" id="aunionDSU__CID0__Type_html_a4f67dbdccd818eacce9caee8184313b6"><div class="ttname"><a href="unionDSU__CID0__Type.html#a4f67dbdccd818eacce9caee8184313b6">DSU_CID0_Type::PREAMBLEB0</a></div><div class="ttdeci">uint32_t PREAMBLEB0</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00535">dsu.h:535</a></div></div>
|
|
<div class="ttc" id="aunionDSU__STATUSB__Type_html_aad7ae489397e242eeaa42e11e32654ec"><div class="ttname"><a href="unionDSU__STATUSB__Type.html#aad7ae489397e242eeaa42e11e32654ec">DSU_STATUSB_Type::DBGPRES</a></div><div class="ttdeci">uint8_t DBGPRES</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00111">dsu.h:111</a></div></div>
|
|
<div class="ttc" id="aunionDSU__STATUSA__Type_html_aba8f270d5cf8d7fee472b5888bea81b8"><div class="ttname"><a href="unionDSU__STATUSA__Type.html#aba8f270d5cf8d7fee472b5888bea81b8">DSU_STATUSA_Type::FAIL</a></div><div class="ttdeci">uint8_t FAIL</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00083">dsu.h:83</a></div></div>
|
|
<div class="ttc" id="aunionDSU__LENGTH__Type_html_adadf43167c8c012916cd60e1916a93f3"><div class="ttname"><a href="unionDSU__LENGTH__Type.html#adadf43167c8c012916cd60e1916a93f3">DSU_LENGTH_Type::LENGTH</a></div><div class="ttdeci">uint32_t LENGTH</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00174">dsu.h:174</a></div></div>
|
|
<div class="ttc" id="aunionDSU__ADDR__Type_html_a3504f788bdf784989bb670de25fd26a7"><div class="ttname"><a href="unionDSU__ADDR__Type.html#a3504f788bdf784989bb670de25fd26a7">DSU_ADDR_Type::AMOD</a></div><div class="ttdeci">uint32_t AMOD</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00151">dsu.h:151</a></div></div>
|
|
<div class="ttc" id="aunionDSU__DID__Type_html_a0705eab15d8481c0a60ae42e3443e260"><div class="ttname"><a href="unionDSU__DID__Type.html#a0705eab15d8481c0a60ae42e3443e260">DSU_DID_Type::SERIES</a></div><div class="ttdeci">uint32_t SERIES</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00231">dsu.h:231</a></div></div>
|
|
<div class="ttc" id="astructDsu_html_a408d8afc257ed78a3169ca958d24a5aa"><div class="ttname"><a href="structDsu.html#a408d8afc257ed78a3169ca958d24a5aa">Dsu::MEMTYPE</a></div><div class="ttdeci">__I DSU_MEMTYPE_Type MEMTYPE</div><div class="ttdoc">Offset: 0x1FCC (R/ 32) CoreSight ROM Table Memory Type.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00629">dsu.h:629</a></div></div>
|
|
<div class="ttc" id="aunionDSU__MEMTYPE__Type_html"><div class="ttname"><a href="unionDSU__MEMTYPE__Type.html">DSU_MEMTYPE_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00368">dsu.h:368</a></div></div>
|
|
<div class="ttc" id="aunionDSU__DCC__Type_html_a7be3abb1e94c3dae4c10b6a4ce5253de"><div class="ttname"><a href="unionDSU__DCC__Type.html#a7be3abb1e94c3dae4c10b6a4ce5253de">DSU_DCC_Type::DATA</a></div><div class="ttdeci">uint32_t DATA</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00210">dsu.h:210</a></div></div>
|
|
<div class="ttc" id="aunionDSU__ENTRY0__Type_html_ad57b888a19f61bf49aea7ab2058ea9f0"><div class="ttname"><a href="unionDSU__ENTRY0__Type.html#ad57b888a19f61bf49aea7ab2058ea9f0">DSU_ENTRY0_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00321">dsu.h:321</a></div></div>
|
|
<div class="ttc" id="aunionDSU__STATUSB__Type_html_a952de07a52a1d8d6e928126ebcbc6d7b"><div class="ttname"><a href="unionDSU__STATUSB__Type.html#a952de07a52a1d8d6e928126ebcbc6d7b">DSU_STATUSB_Type::DCCD</a></div><div class="ttdeci">uint8_t DCCD</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00120">dsu.h:120</a></div></div>
|
|
<div class="ttc" id="aunionDSU__DID__Type_html"><div class="ttname"><a href="unionDSU__DID__Type.html">DSU_DID_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00226">dsu.h:226</a></div></div>
|
|
<div class="ttc" id="aunionDSU__DATA__Type_html"><div class="ttname"><a href="unionDSU__DATA__Type.html">DSU_DATA_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00190">dsu.h:190</a></div></div>
|
|
<div class="ttc" id="astructDsu_html_affd7dad98096b621d482b72f42fce5e8"><div class="ttname"><a href="structDsu.html#affd7dad98096b621d482b72f42fce5e8">Dsu::PID6</a></div><div class="ttdeci">__I DSU_PID6_Type PID6</div><div class="ttdoc">Offset: 0x1FD8 (R/ 32) Peripheral Identification 6.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00632">dsu.h:632</a></div></div>
|
|
<div class="ttc" id="aunionDSU__PID4__Type_html"><div class="ttname"><a href="unionDSU__PID4__Type.html">DSU_PID4_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00386">dsu.h:386</a></div></div>
|
|
<div class="ttc" id="aunionDSU__CID1__Type_html_a5cbc7c9fca7f9e5bb863a79ea9646a22"><div class="ttname"><a href="unionDSU__CID1__Type.html#a5cbc7c9fca7f9e5bb863a79ea9646a22">DSU_CID1_Type::PREAMBLE</a></div><div class="ttdeci">uint32_t PREAMBLE</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00554">dsu.h:554</a></div></div>
|
|
<div class="ttc" id="aunionDSU__PID0__Type_html_a2411582de03ec05e573cff798437b9b2"><div class="ttname"><a href="unionDSU__PID0__Type.html#a2411582de03ec05e573cff798437b9b2">DSU_PID0_Type::PARTNBL</a></div><div class="ttdeci">uint32_t PARTNBL</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00444">dsu.h:444</a></div></div>
|
|
<div class="ttc" id="aunionDSU__PID2__Type_html_ad619ce9aa07fdb32c8d57feebaab130c"><div class="ttname"><a href="unionDSU__PID2__Type.html#ad619ce9aa07fdb32c8d57feebaab130c">DSU_PID2_Type::REVISION</a></div><div class="ttdeci">uint32_t REVISION</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00488">dsu.h:488</a></div></div>
|
|
<div class="ttc" id="aunionDSU__STATUSB__Type_html"><div class="ttname"><a href="unionDSU__STATUSB__Type.html">DSU_STATUSB_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00108">dsu.h:108</a></div></div>
|
|
<div class="ttc" id="aunionDSU__CTRL__Type_html_a197b7e23186112885542ca537e8083ba"><div class="ttname"><a href="unionDSU__CTRL__Type.html#a197b7e23186112885542ca537e8083ba">DSU_CTRL_Type::CE</a></div><div class="ttdeci">uint8_t CE</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00050">dsu.h:50</a></div></div>
|
|
<div class="ttc" id="aunionDSU__PID3__Type_html_a04d461de3bfc43fdf0d13ce6bd6568fb"><div class="ttname"><a href="unionDSU__PID3__Type.html#a04d461de3bfc43fdf0d13ce6bd6568fb">DSU_PID3_Type::CUSMOD</a></div><div class="ttdeci">uint32_t CUSMOD</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00512">dsu.h:512</a></div></div>
|
|
<div class="ttc" id="aunionDSU__PID7__Type_html_a6a2b728de75e4bee6b44a6e2c50305bc"><div class="ttname"><a href="unionDSU__PID7__Type.html#a6a2b728de75e4bee6b44a6e2c50305bc">DSU_PID7_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00432">dsu.h:432</a></div></div>
|
|
<div class="ttc" id="aunionDSU__STATUSB__Type_html_aa96f9c8c3695cc1a4535a02983201946"><div class="ttname"><a href="unionDSU__STATUSB__Type.html#aa96f9c8c3695cc1a4535a02983201946">DSU_STATUSB_Type::reg</a></div><div class="ttdeci">uint8_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00123">dsu.h:123</a></div></div>
|
|
<div class="ttc" id="aunionDSU__LENGTH__Type_html"><div class="ttname"><a href="unionDSU__LENGTH__Type.html">DSU_LENGTH_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00171">dsu.h:171</a></div></div>
|
|
<div class="ttc" id="aunionDSU__CFG__Type_html"><div class="ttname"><a href="unionDSU__CFG__Type.html">DSU_CFG_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00284">dsu.h:284</a></div></div>
|
|
<div class="ttc" id="aunionDSU__DATA__Type_html_a951faee0c32af5210e62a071cc0afe96"><div class="ttname"><a href="unionDSU__DATA__Type.html#a951faee0c32af5210e62a071cc0afe96">DSU_DATA_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00194">dsu.h:194</a></div></div>
|
|
<div class="ttc" id="aunionDSU__DID__Type_html_aa5a2580fa69f97b349dba6650dfec919"><div class="ttname"><a href="unionDSU__DID__Type.html#aa5a2580fa69f97b349dba6650dfec919">DSU_DID_Type::REVISION</a></div><div class="ttdeci">uint32_t REVISION</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00229">dsu.h:229</a></div></div>
|
|
<div class="ttc" id="aunionDSU__STATUSA__Type_html"><div class="ttname"><a href="unionDSU__STATUSA__Type.html">DSU_STATUSA_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00078">dsu.h:78</a></div></div>
|
|
<div class="ttc" id="aunionDSU__PID1__Type_html_aae19e346570eb31d8eec6d0a7b093954"><div class="ttname"><a href="unionDSU__PID1__Type.html#aae19e346570eb31d8eec6d0a7b093954">DSU_PID1_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00467">dsu.h:467</a></div></div>
|
|
<div class="ttc" id="aunionDSU__STATUSA__Type_html_a8fefe4470a39f6ef4547a501dbf028b0"><div class="ttname"><a href="unionDSU__STATUSA__Type.html#a8fefe4470a39f6ef4547a501dbf028b0">DSU_STATUSA_Type::PERR</a></div><div class="ttdeci">uint8_t PERR</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00084">dsu.h:84</a></div></div>
|
|
<div class="ttc" id="aunionDSU__CTRL__Type_html"><div class="ttname"><a href="unionDSU__CTRL__Type.html">DSU_CTRL_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00044">dsu.h:44</a></div></div>
|
|
<div class="ttc" id="aunionDSU__CID0__Type_html_a8a4e4e66f3ac668edceaa595bea2b403"><div class="ttname"><a href="unionDSU__CID0__Type.html#a8a4e4e66f3ac668edceaa595bea2b403">DSU_CID0_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00538">dsu.h:538</a></div></div>
|
|
<div class="ttc" id="aunionDSU__DCC__Type_html"><div class="ttname"><a href="unionDSU__DCC__Type.html">DSU_DCC_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00208">dsu.h:208</a></div></div>
|
|
<div class="ttc" id="aunionDSU__CFG__Type_html_a18afece2cb799c73b84f7d33a2cadb73"><div class="ttname"><a href="unionDSU__CFG__Type.html#a18afece2cb799c73b84f7d33a2cadb73">DSU_CFG_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00291">dsu.h:291</a></div></div>
|
|
<div class="ttc" id="aunionDSU__STATUSB__Type_html_a8d1bbe448ed8ffb57221323c43f585c3"><div class="ttname"><a href="unionDSU__STATUSB__Type.html#a8d1bbe448ed8ffb57221323c43f585c3">DSU_STATUSB_Type::HPE</a></div><div class="ttdeci">uint8_t HPE</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00114">dsu.h:114</a></div></div>
|
|
<div class="ttc" id="asame54n19a_8h_html_a0d957f1433aaf5d70e4dc2b68288442d"><div class="ttname"><a href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a></div><div class="ttdeci">volatile const uint8_t RoReg8</div><div class="ttdef"><b>Definition:</b> <a href="same54n19a_8h_source.html#l00053">same54n19a.h:53</a></div></div>
|
|
<div class="ttc" id="aunionDSU__ENTRY1__Type_html_a524ab8d2471aafcf1a353ae5626de59c"><div class="ttname"><a href="unionDSU__ENTRY1__Type.html#a524ab8d2471aafcf1a353ae5626de59c">DSU_ENTRY1_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00340">dsu.h:340</a></div></div>
|
|
<div class="ttc" id="aunionDSU__PID4__Type_html_aff254cb82f68cb64e7f09f0e49aff7f6"><div class="ttname"><a href="unionDSU__PID4__Type.html#aff254cb82f68cb64e7f09f0e49aff7f6">DSU_PID4_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00392">dsu.h:392</a></div></div>
|
|
<div class="ttc" id="aunionDSU__CFG__Type_html_a1707b3b281a6dfc43f5b9413a63b3876"><div class="ttname"><a href="unionDSU__CFG__Type.html#a1707b3b281a6dfc43f5b9413a63b3876">DSU_CFG_Type::LQOS</a></div><div class="ttdeci">uint32_t LQOS</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00286">dsu.h:286</a></div></div>
|
|
<div class="ttc" id="aunionDSU__DID__Type_html_a56e43c203792644e8b50621c3d1dd7d6"><div class="ttname"><a href="unionDSU__DID__Type.html#a56e43c203792644e8b50621c3d1dd7d6">DSU_DID_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00236">dsu.h:236</a></div></div>
|
|
<div class="ttc" id="aunionDSU__CID1__Type_html"><div class="ttname"><a href="unionDSU__CID1__Type.html">DSU_CID1_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00552">dsu.h:552</a></div></div>
|
|
<div class="ttc" id="astructDsu_html"><div class="ttname"><a href="structDsu.html">Dsu</a></div><div class="ttdoc">DSU hardware registers.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00613">dsu.h:613</a></div></div>
|
|
<div class="ttc" id="aunionDSU__CTRL__Type_html_a73a94d5d5c3dc5b218c6bc1e4bc6165d"><div class="ttname"><a href="unionDSU__CTRL__Type.html#a73a94d5d5c3dc5b218c6bc1e4bc6165d">DSU_CTRL_Type::SWRST</a></div><div class="ttdeci">uint8_t SWRST</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00046">dsu.h:46</a></div></div>
|
|
<div class="ttc" id="astructDsu_html_aeafe6f433e6983dedb1b78efe1508991"><div class="ttname"><a href="structDsu.html#aeafe6f433e6983dedb1b78efe1508991">Dsu::PID1</a></div><div class="ttdeci">__I DSU_PID1_Type PID1</div><div class="ttdoc">Offset: 0x1FE4 (R/ 32) Peripheral Identification 1.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00635">dsu.h:635</a></div></div>
|
|
<div class="ttc" id="astructDsu_html_a8ce289f77dfa3331bc94ae699c6031d7"><div class="ttname"><a href="structDsu.html#a8ce289f77dfa3331bc94ae699c6031d7">Dsu::CID3</a></div><div class="ttdeci">__I DSU_CID3_Type CID3</div><div class="ttdoc">Offset: 0x1FFC (R/ 32) Component Identification 3.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00641">dsu.h:641</a></div></div>
|
|
<div class="ttc" id="aunionDSU__PID1__Type_html"><div class="ttname"><a href="unionDSU__PID1__Type.html">DSU_PID1_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00461">dsu.h:461</a></div></div>
|
|
<div class="ttc" id="aunionDSU__STATUSB__Type_html_a3d465bfe936ba897bb74af320f5cc41a"><div class="ttname"><a href="unionDSU__STATUSB__Type.html#a3d465bfe936ba897bb74af320f5cc41a">DSU_STATUSB_Type::DCCD1</a></div><div class="ttdeci">uint8_t DCCD1</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00113">dsu.h:113</a></div></div>
|
|
<div class="ttc" id="aunionDSU__DID__Type_html_a391b0d47c1bbd48442298eaabe71ca61"><div class="ttname"><a href="unionDSU__DID__Type.html#a391b0d47c1bbd48442298eaabe71ca61">DSU_DID_Type::FAMILY</a></div><div class="ttdeci">uint32_t FAMILY</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00233">dsu.h:233</a></div></div>
|
|
<div class="ttc" id="aunionDSU__STATUSB__Type_html_ad3344aa28fed34c08fe7c730282fb40d"><div class="ttname"><a href="unionDSU__STATUSB__Type.html#ad3344aa28fed34c08fe7c730282fb40d">DSU_STATUSB_Type::DCCD0</a></div><div class="ttdeci">uint8_t DCCD0</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00112">dsu.h:112</a></div></div>
|
|
<div class="ttc" id="aunionDSU__CID1__Type_html_a16b80bf740c34d6627ab2ede385062bd"><div class="ttname"><a href="unionDSU__CID1__Type.html#a16b80bf740c34d6627ab2ede385062bd">DSU_CID1_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00558">dsu.h:558</a></div></div>
|
|
<div class="ttc" id="aunionDSU__END__Type_html"><div class="ttname"><a href="unionDSU__END__Type.html">DSU_END_Type</a></div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00350">dsu.h:350</a></div></div>
|
|
<div class="ttc" id="astructDsu_html_af251ab6944603f4ffcc03a04c3a591af"><div class="ttname"><a href="structDsu.html#af251ab6944603f4ffcc03a04c3a591af">Dsu::STATUSA</a></div><div class="ttdeci">__IO DSU_STATUSA_Type STATUSA</div><div class="ttdoc">Offset: 0x0001 (R/W 8) Status A.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00615">dsu.h:615</a></div></div>
|
|
<div class="ttc" id="aunionDSU__STATUSA__Type_html_aff619e1a118784b3e8600a50128db18c"><div class="ttname"><a href="unionDSU__STATUSA__Type.html#aff619e1a118784b3e8600a50128db18c">DSU_STATUSA_Type::DONE</a></div><div class="ttdeci">uint8_t DONE</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00080">dsu.h:80</a></div></div>
|
|
<div class="ttc" id="astructDsu_html_acd4b45b637efcb62b9f67c877dcbb4ce"><div class="ttname"><a href="structDsu.html#acd4b45b637efcb62b9f67c877dcbb4ce">Dsu::CID0</a></div><div class="ttdeci">__I DSU_CID0_Type CID0</div><div class="ttdoc">Offset: 0x1FF0 (R/ 32) Component Identification 0.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00638">dsu.h:638</a></div></div>
|
|
<div class="ttc" id="astructDsu_html_ae8a2a4525dd77831e3bba601b5eaf924"><div class="ttname"><a href="structDsu.html#ae8a2a4525dd77831e3bba601b5eaf924">Dsu::DID</a></div><div class="ttdeci">__I DSU_DID_Type DID</div><div class="ttdoc">Offset: 0x0018 (R/ 32) Device Identification.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00622">dsu.h:622</a></div></div>
|
|
<div class="ttc" id="aunionDSU__STATUSA__Type_html_aa8f9dffc31935fc4537884bf167786df"><div class="ttname"><a href="unionDSU__STATUSA__Type.html#aa8f9dffc31935fc4537884bf167786df">DSU_STATUSA_Type::CRSTEXT</a></div><div class="ttdeci">uint8_t CRSTEXT</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00081">dsu.h:81</a></div></div>
|
|
<div class="ttc" id="aunionDSU__MEMTYPE__Type_html_a3dca5becd5a8a8e28fe39180c824eaaf"><div class="ttname"><a href="unionDSU__MEMTYPE__Type.html#a3dca5becd5a8a8e28fe39180c824eaaf">DSU_MEMTYPE_Type::SMEMP</a></div><div class="ttdeci">uint32_t SMEMP</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00370">dsu.h:370</a></div></div>
|
|
<div class="ttc" id="aunionDSU__DID__Type_html_a090fd5a629b80d2adfcb388b825b8dd8"><div class="ttname"><a href="unionDSU__DID__Type.html#a090fd5a629b80d2adfcb388b825b8dd8">DSU_DID_Type::PROCESSOR</a></div><div class="ttdeci">uint32_t PROCESSOR</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00234">dsu.h:234</a></div></div>
|
|
<div class="ttc" id="aunionDSU__CTRL__Type_html_a0b11d4226d2417422ef909e10ed17bc9"><div class="ttname"><a href="unionDSU__CTRL__Type.html#a0b11d4226d2417422ef909e10ed17bc9">DSU_CTRL_Type::MBIST</a></div><div class="ttdeci">uint8_t MBIST</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00049">dsu.h:49</a></div></div>
|
|
<div class="ttc" id="aunionDSU__END__Type_html_a0d914056a7cd5c80c5b2204a15ae09ae"><div class="ttname"><a href="unionDSU__END__Type.html#a0d914056a7cd5c80c5b2204a15ae09ae">DSU_END_Type::reg</a></div><div class="ttdeci">uint32_t reg</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00354">dsu.h:354</a></div></div>
|
|
<div class="ttc" id="astructDsu_html_a0a408f4b65eefa0933f2cce115230e3d"><div class="ttname"><a href="structDsu.html#a0a408f4b65eefa0933f2cce115230e3d">Dsu::CFG</a></div><div class="ttdeci">__IO DSU_CFG_Type CFG</div><div class="ttdoc">Offset: 0x001C (R/W 32) Configuration.</div><div class="ttdef"><b>Definition:</b> <a href="component_2dsu_8h_source.html#l00623">dsu.h:623</a></div></div>
|
|
<!-- start footer part -->
|
|
<hr class="footer"/><address class="footer"><small>
|
|
Generated by <a href="http://www.doxygen.org/index.html"><img class="footer" src="doxygen.svg" width="104" height="31" alt="doxygen"/></a> 1.8.20
|
|
</small></address>
|
|
</body>
|
|
</html>
|