You cannot select more than 25 topics
Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
967 lines
149 KiB
HTML
967 lines
149 KiB
HTML
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "https://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
|
|
<html xmlns="http://www.w3.org/1999/xhtml">
|
|
<head>
|
|
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
|
|
<meta http-equiv="X-UA-Compatible" content="IE=9"/>
|
|
<meta name="generator" content="Doxygen 1.8.20"/>
|
|
<meta name="viewport" content="width=device-width, initial-scale=1"/>
|
|
<title>SAME54P20A Test Project: /storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/component/dac.h File Reference</title>
|
|
<link href="tabs.css" rel="stylesheet" type="text/css"/>
|
|
<script type="text/javascript" src="jquery.js"></script>
|
|
<script type="text/javascript" src="dynsections.js"></script>
|
|
<link href="search/search.css" rel="stylesheet" type="text/css"/>
|
|
<script type="text/javascript" src="search/searchdata.js"></script>
|
|
<script type="text/javascript" src="search/search.js"></script>
|
|
<link href="doxygen.css" rel="stylesheet" type="text/css" />
|
|
</head>
|
|
<body>
|
|
<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
|
|
<div id="titlearea">
|
|
<table cellspacing="0" cellpadding="0">
|
|
<tbody>
|
|
<tr style="height: 56px;">
|
|
<td id="projectalign" style="padding-left: 0.5em;">
|
|
<div id="projectname">SAME54P20A Test Project
|
|
</div>
|
|
</td>
|
|
</tr>
|
|
</tbody>
|
|
</table>
|
|
</div>
|
|
<!-- end header part -->
|
|
<!-- Generated by Doxygen 1.8.20 -->
|
|
<script type="text/javascript">
|
|
/* @license magnet:?xt=urn:btih:cf05388f2679ee054f2beb29a391d25f4e673ac3&dn=gpl-2.0.txt GPL-v2 */
|
|
var searchBox = new SearchBox("searchBox", "search",false,'Search');
|
|
/* @license-end */
|
|
</script>
|
|
<script type="text/javascript" src="menudata.js"></script>
|
|
<script type="text/javascript" src="menu.js"></script>
|
|
<script type="text/javascript">
|
|
/* @license magnet:?xt=urn:btih:cf05388f2679ee054f2beb29a391d25f4e673ac3&dn=gpl-2.0.txt GPL-v2 */
|
|
$(function() {
|
|
initMenu('',true,false,'search.php','Search');
|
|
$(document).ready(function() { init_search(); });
|
|
});
|
|
/* @license-end */</script>
|
|
<div id="main-nav"></div>
|
|
<!-- window showing the filter options -->
|
|
<div id="MSearchSelectWindow"
|
|
onmouseover="return searchBox.OnSearchSelectShow()"
|
|
onmouseout="return searchBox.OnSearchSelectHide()"
|
|
onkeydown="return searchBox.OnSearchSelectKey(event)">
|
|
</div>
|
|
|
|
<!-- iframe showing the search results (closed by default) -->
|
|
<div id="MSearchResultsWindow">
|
|
<iframe src="javascript:void(0)" frameborder="0"
|
|
name="MSearchResults" id="MSearchResults">
|
|
</iframe>
|
|
</div>
|
|
|
|
<div id="nav-path" class="navpath">
|
|
<ul>
|
|
<li class="navelem"><a class="el" href="dir_ea9599923402ca8ab47fc3e495999dea.html">arch</a></li><li class="navelem"><a class="el" href="dir_9e929c73feaf15d3695ce4c76b483065.html">arm</a></li><li class="navelem"><a class="el" href="dir_58955c0f35a9c3d48181d2be53994c7b.html">SAME54</a></li><li class="navelem"><a class="el" href="dir_09e97e512ca7d4e6cd359f1c5497eeba.html">SAME54A</a></li><li class="navelem"><a class="el" href="dir_4b38d63e5c584a4d6c9001c789e1829f.html">mcu</a></li><li class="navelem"><a class="el" href="dir_d4fc57b996dc082ef023092a5b7d90fc.html">inc</a></li><li class="navelem"><a class="el" href="dir_2bb2e10400507f879251f0324a0a8c7c.html">component</a></li> </ul>
|
|
</div>
|
|
</div><!-- top -->
|
|
<div class="header">
|
|
<div class="summary">
|
|
<a href="#nested-classes">Data Structures</a> |
|
|
<a href="#define-members">Macros</a> </div>
|
|
<div class="headertitle">
|
|
<div class="title">dac.h File Reference</div> </div>
|
|
</div><!--header-->
|
|
<div class="contents">
|
|
|
|
<p>Component description for DAC.
|
|
<a href="#details">More...</a></p>
|
|
|
|
<p><a href="component_2dac_8h_source.html">Go to the source code of this file.</a></p>
|
|
<table class="memberdecls">
|
|
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="nested-classes"></a>
|
|
Data Structures</h2></td></tr>
|
|
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionDAC__CTRLA__Type.html">DAC_CTRLA_Type</a></td></tr>
|
|
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionDAC__CTRLB__Type.html">DAC_CTRLB_Type</a></td></tr>
|
|
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionDAC__EVCTRL__Type.html">DAC_EVCTRL_Type</a></td></tr>
|
|
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionDAC__INTENCLR__Type.html">DAC_INTENCLR_Type</a></td></tr>
|
|
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionDAC__INTENSET__Type.html">DAC_INTENSET_Type</a></td></tr>
|
|
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionDAC__INTFLAG__Type.html">DAC_INTFLAG_Type</a></td></tr>
|
|
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionDAC__STATUS__Type.html">DAC_STATUS_Type</a></td></tr>
|
|
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionDAC__SYNCBUSY__Type.html">DAC_SYNCBUSY_Type</a></td></tr>
|
|
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionDAC__DACCTRL__Type.html">DAC_DACCTRL_Type</a></td></tr>
|
|
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionDAC__DATA__Type.html">DAC_DATA_Type</a></td></tr>
|
|
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionDAC__DATABUF__Type.html">DAC_DATABUF_Type</a></td></tr>
|
|
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionDAC__DBGCTRL__Type.html">DAC_DBGCTRL_Type</a></td></tr>
|
|
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">union  </td><td class="memItemRight" valign="bottom"><a class="el" href="unionDAC__RESULT__Type.html">DAC_RESULT_Type</a></td></tr>
|
|
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="structDac.html">Dac</a></td></tr>
|
|
<tr class="memdesc:"><td class="mdescLeft"> </td><td class="mdescRight">DAC hardware registers. <a href="structDac.html#details">More...</a><br /></td></tr>
|
|
<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr>
|
|
</table><table class="memberdecls">
|
|
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
|
|
Macros</h2></td></tr>
|
|
<tr class="memitem:a29e7929927f9cccb23bfdf80dfab86b0"><td class="memItemLeft" align="right" valign="top"><a id="a29e7929927f9cccb23bfdf80dfab86b0"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_U2502</b></td></tr>
|
|
<tr class="separator:a29e7929927f9cccb23bfdf80dfab86b0"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a49409e81a9642d61cb82d3f664c44844"><td class="memItemLeft" align="right" valign="top"><a id="a49409e81a9642d61cb82d3f664c44844"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>REV_DAC</b>   0x100</td></tr>
|
|
<tr class="separator:a49409e81a9642d61cb82d3f664c44844"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:aebd4a25fcf855e7d3824acf7f9d3ac83"><td class="memItemLeft" align="right" valign="top"><a id="aebd4a25fcf855e7d3824acf7f9d3ac83"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#aebd4a25fcf855e7d3824acf7f9d3ac83">DAC_CTRLA_OFFSET</a>   0x00</td></tr>
|
|
<tr class="memdesc:aebd4a25fcf855e7d3824acf7f9d3ac83"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_CTRLA offset) Control A <br /></td></tr>
|
|
<tr class="separator:aebd4a25fcf855e7d3824acf7f9d3ac83"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a5b2a0ad82560fded073e6276046facfc"><td class="memItemLeft" align="right" valign="top"><a id="a5b2a0ad82560fded073e6276046facfc"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a5b2a0ad82560fded073e6276046facfc">DAC_CTRLA_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
|
|
<tr class="memdesc:a5b2a0ad82560fded073e6276046facfc"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_CTRLA reset_value) Control A <br /></td></tr>
|
|
<tr class="separator:a5b2a0ad82560fded073e6276046facfc"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:afa3f0f563ba0dcc229026ca6d3effdcc"><td class="memItemLeft" align="right" valign="top"><a id="afa3f0f563ba0dcc229026ca6d3effdcc"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#afa3f0f563ba0dcc229026ca6d3effdcc">DAC_CTRLA_SWRST_Pos</a>   0</td></tr>
|
|
<tr class="memdesc:afa3f0f563ba0dcc229026ca6d3effdcc"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_CTRLA) Software Reset <br /></td></tr>
|
|
<tr class="separator:afa3f0f563ba0dcc229026ca6d3effdcc"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ab50aae3a8aa2d5bcfb9892d87f425fd8"><td class="memItemLeft" align="right" valign="top"><a id="ab50aae3a8aa2d5bcfb9892d87f425fd8"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_CTRLA_SWRST</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2dac_8h.html#afa3f0f563ba0dcc229026ca6d3effdcc">DAC_CTRLA_SWRST_Pos</a>)</td></tr>
|
|
<tr class="separator:ab50aae3a8aa2d5bcfb9892d87f425fd8"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:afa6e69ab386a0acc15ec18b0584091f9"><td class="memItemLeft" align="right" valign="top"><a id="afa6e69ab386a0acc15ec18b0584091f9"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#afa6e69ab386a0acc15ec18b0584091f9">DAC_CTRLA_ENABLE_Pos</a>   1</td></tr>
|
|
<tr class="memdesc:afa6e69ab386a0acc15ec18b0584091f9"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_CTRLA) Enable DAC Controller <br /></td></tr>
|
|
<tr class="separator:afa6e69ab386a0acc15ec18b0584091f9"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:abdbf590aa240a8a85a49f13e27872353"><td class="memItemLeft" align="right" valign="top"><a id="abdbf590aa240a8a85a49f13e27872353"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_CTRLA_ENABLE</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2dac_8h.html#afa6e69ab386a0acc15ec18b0584091f9">DAC_CTRLA_ENABLE_Pos</a>)</td></tr>
|
|
<tr class="separator:abdbf590aa240a8a85a49f13e27872353"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a3194764eec2b07936137bbd3afbde5d2"><td class="memItemLeft" align="right" valign="top"><a id="a3194764eec2b07936137bbd3afbde5d2"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a3194764eec2b07936137bbd3afbde5d2">DAC_CTRLA_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x03)</td></tr>
|
|
<tr class="memdesc:a3194764eec2b07936137bbd3afbde5d2"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_CTRLA) MASK Register <br /></td></tr>
|
|
<tr class="separator:a3194764eec2b07936137bbd3afbde5d2"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a77355709810c770d457b0206b73e12c2"><td class="memItemLeft" align="right" valign="top"><a id="a77355709810c770d457b0206b73e12c2"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a77355709810c770d457b0206b73e12c2">DAC_CTRLB_OFFSET</a>   0x01</td></tr>
|
|
<tr class="memdesc:a77355709810c770d457b0206b73e12c2"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_CTRLB offset) Control B <br /></td></tr>
|
|
<tr class="separator:a77355709810c770d457b0206b73e12c2"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ac2138055bf74ac2fccda007458cdca1d"><td class="memItemLeft" align="right" valign="top"><a id="ac2138055bf74ac2fccda007458cdca1d"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ac2138055bf74ac2fccda007458cdca1d">DAC_CTRLB_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x02)</td></tr>
|
|
<tr class="memdesc:ac2138055bf74ac2fccda007458cdca1d"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_CTRLB reset_value) Control B <br /></td></tr>
|
|
<tr class="separator:ac2138055bf74ac2fccda007458cdca1d"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:abbf790da9956c2dd5f02756f9187989c"><td class="memItemLeft" align="right" valign="top"><a id="abbf790da9956c2dd5f02756f9187989c"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#abbf790da9956c2dd5f02756f9187989c">DAC_CTRLB_DIFF_Pos</a>   0</td></tr>
|
|
<tr class="memdesc:abbf790da9956c2dd5f02756f9187989c"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_CTRLB) Differential mode enable <br /></td></tr>
|
|
<tr class="separator:abbf790da9956c2dd5f02756f9187989c"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a03edadd68f47c3766a9b49135a8dc321"><td class="memItemLeft" align="right" valign="top"><a id="a03edadd68f47c3766a9b49135a8dc321"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_CTRLB_DIFF</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2dac_8h.html#abbf790da9956c2dd5f02756f9187989c">DAC_CTRLB_DIFF_Pos</a>)</td></tr>
|
|
<tr class="separator:a03edadd68f47c3766a9b49135a8dc321"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ace1da3ee1cda6efe12a220080a718b99"><td class="memItemLeft" align="right" valign="top"><a id="ace1da3ee1cda6efe12a220080a718b99"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ace1da3ee1cda6efe12a220080a718b99">DAC_CTRLB_REFSEL_Pos</a>   1</td></tr>
|
|
<tr class="memdesc:ace1da3ee1cda6efe12a220080a718b99"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_CTRLB) Reference Selection for DAC0/1 <br /></td></tr>
|
|
<tr class="separator:ace1da3ee1cda6efe12a220080a718b99"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a257979650aa6e806ad98f4095f58dd52"><td class="memItemLeft" align="right" valign="top"><a id="a257979650aa6e806ad98f4095f58dd52"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_CTRLB_REFSEL_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2dac_8h.html#ace1da3ee1cda6efe12a220080a718b99">DAC_CTRLB_REFSEL_Pos</a>)</td></tr>
|
|
<tr class="separator:a257979650aa6e806ad98f4095f58dd52"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ab75aa87cd7f0a1813d5e73f2dba5057e"><td class="memItemLeft" align="right" valign="top"><a id="ab75aa87cd7f0a1813d5e73f2dba5057e"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_CTRLB_REFSEL</b>(value)   (DAC_CTRLB_REFSEL_Msk & ((value) << <a class="el" href="component_2dac_8h.html#ace1da3ee1cda6efe12a220080a718b99">DAC_CTRLB_REFSEL_Pos</a>))</td></tr>
|
|
<tr class="separator:ab75aa87cd7f0a1813d5e73f2dba5057e"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a1fa8cea85f63628846fe1cffd66ce84d"><td class="memItemLeft" align="right" valign="top"><a id="a1fa8cea85f63628846fe1cffd66ce84d"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a1fa8cea85f63628846fe1cffd66ce84d">DAC_CTRLB_REFSEL_VREFPU_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
|
|
<tr class="memdesc:a1fa8cea85f63628846fe1cffd66ce84d"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_CTRLB) External reference unbuffered <br /></td></tr>
|
|
<tr class="separator:a1fa8cea85f63628846fe1cffd66ce84d"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ae326fd37097c45092004ad8658ef7e64"><td class="memItemLeft" align="right" valign="top"><a id="ae326fd37097c45092004ad8658ef7e64"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ae326fd37097c45092004ad8658ef7e64">DAC_CTRLB_REFSEL_VDDANA_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
|
|
<tr class="memdesc:ae326fd37097c45092004ad8658ef7e64"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_CTRLB) Analog supply <br /></td></tr>
|
|
<tr class="separator:ae326fd37097c45092004ad8658ef7e64"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:af0266310f4ffdab4a62aed8023e5507c"><td class="memItemLeft" align="right" valign="top"><a id="af0266310f4ffdab4a62aed8023e5507c"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#af0266310f4ffdab4a62aed8023e5507c">DAC_CTRLB_REFSEL_VREFPB_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
|
|
<tr class="memdesc:af0266310f4ffdab4a62aed8023e5507c"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_CTRLB) External reference buffered <br /></td></tr>
|
|
<tr class="separator:af0266310f4ffdab4a62aed8023e5507c"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a23d7b33954fbff27f8d3dcdcf389c185"><td class="memItemLeft" align="right" valign="top"><a id="a23d7b33954fbff27f8d3dcdcf389c185"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a23d7b33954fbff27f8d3dcdcf389c185">DAC_CTRLB_REFSEL_INTREF_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3)</td></tr>
|
|
<tr class="memdesc:a23d7b33954fbff27f8d3dcdcf389c185"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_CTRLB) Internal bandgap reference <br /></td></tr>
|
|
<tr class="separator:a23d7b33954fbff27f8d3dcdcf389c185"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:aef02c21f93e4fae94b1c888a61309666"><td class="memItemLeft" align="right" valign="top"><a id="aef02c21f93e4fae94b1c888a61309666"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_CTRLB_REFSEL_VREFPU</b>   (<a class="el" href="component_2dac_8h.html#a1fa8cea85f63628846fe1cffd66ce84d">DAC_CTRLB_REFSEL_VREFPU_Val</a> << <a class="el" href="component_2dac_8h.html#ace1da3ee1cda6efe12a220080a718b99">DAC_CTRLB_REFSEL_Pos</a>)</td></tr>
|
|
<tr class="separator:aef02c21f93e4fae94b1c888a61309666"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ace95cc93c9a20d42d81460f53b69d380"><td class="memItemLeft" align="right" valign="top"><a id="ace95cc93c9a20d42d81460f53b69d380"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_CTRLB_REFSEL_VDDANA</b>   (<a class="el" href="component_2dac_8h.html#ae326fd37097c45092004ad8658ef7e64">DAC_CTRLB_REFSEL_VDDANA_Val</a> << <a class="el" href="component_2dac_8h.html#ace1da3ee1cda6efe12a220080a718b99">DAC_CTRLB_REFSEL_Pos</a>)</td></tr>
|
|
<tr class="separator:ace95cc93c9a20d42d81460f53b69d380"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ae2b32bff7e12d34e015fb70bd522e7b5"><td class="memItemLeft" align="right" valign="top"><a id="ae2b32bff7e12d34e015fb70bd522e7b5"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_CTRLB_REFSEL_VREFPB</b>   (<a class="el" href="component_2dac_8h.html#af0266310f4ffdab4a62aed8023e5507c">DAC_CTRLB_REFSEL_VREFPB_Val</a> << <a class="el" href="component_2dac_8h.html#ace1da3ee1cda6efe12a220080a718b99">DAC_CTRLB_REFSEL_Pos</a>)</td></tr>
|
|
<tr class="separator:ae2b32bff7e12d34e015fb70bd522e7b5"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:af28703bc73b38b9ab5d0b56fb9a3e951"><td class="memItemLeft" align="right" valign="top"><a id="af28703bc73b38b9ab5d0b56fb9a3e951"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_CTRLB_REFSEL_INTREF</b>   (<a class="el" href="component_2dac_8h.html#a23d7b33954fbff27f8d3dcdcf389c185">DAC_CTRLB_REFSEL_INTREF_Val</a> << <a class="el" href="component_2dac_8h.html#ace1da3ee1cda6efe12a220080a718b99">DAC_CTRLB_REFSEL_Pos</a>)</td></tr>
|
|
<tr class="separator:af28703bc73b38b9ab5d0b56fb9a3e951"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:aa12ea04e34d8557ae1e628862714e207"><td class="memItemLeft" align="right" valign="top"><a id="aa12ea04e34d8557ae1e628862714e207"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#aa12ea04e34d8557ae1e628862714e207">DAC_CTRLB_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x07)</td></tr>
|
|
<tr class="memdesc:aa12ea04e34d8557ae1e628862714e207"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_CTRLB) MASK Register <br /></td></tr>
|
|
<tr class="separator:aa12ea04e34d8557ae1e628862714e207"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a554a475582005e674b535a88927abc9f"><td class="memItemLeft" align="right" valign="top"><a id="a554a475582005e674b535a88927abc9f"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a554a475582005e674b535a88927abc9f">DAC_EVCTRL_OFFSET</a>   0x02</td></tr>
|
|
<tr class="memdesc:a554a475582005e674b535a88927abc9f"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_EVCTRL offset) Event Control <br /></td></tr>
|
|
<tr class="separator:a554a475582005e674b535a88927abc9f"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ae95bd54234ae16d3e9ee3291b4c883c5"><td class="memItemLeft" align="right" valign="top"><a id="ae95bd54234ae16d3e9ee3291b4c883c5"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ae95bd54234ae16d3e9ee3291b4c883c5">DAC_EVCTRL_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
|
|
<tr class="memdesc:ae95bd54234ae16d3e9ee3291b4c883c5"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_EVCTRL reset_value) Event Control <br /></td></tr>
|
|
<tr class="separator:ae95bd54234ae16d3e9ee3291b4c883c5"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a307b56241053d43fae08abd64c6b0f58"><td class="memItemLeft" align="right" valign="top"><a id="a307b56241053d43fae08abd64c6b0f58"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a307b56241053d43fae08abd64c6b0f58">DAC_EVCTRL_STARTEI0_Pos</a>   0</td></tr>
|
|
<tr class="memdesc:a307b56241053d43fae08abd64c6b0f58"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_EVCTRL) Start Conversion Event Input DAC 0 <br /></td></tr>
|
|
<tr class="separator:a307b56241053d43fae08abd64c6b0f58"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a7587f957948231289d39e22423e48e87"><td class="memItemLeft" align="right" valign="top"><a id="a7587f957948231289d39e22423e48e87"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_EVCTRL_STARTEI0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#a307b56241053d43fae08abd64c6b0f58">DAC_EVCTRL_STARTEI0_Pos</a>)</td></tr>
|
|
<tr class="separator:a7587f957948231289d39e22423e48e87"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a23961f1cee221c2823691dc06ee3ed65"><td class="memItemLeft" align="right" valign="top"><a id="a23961f1cee221c2823691dc06ee3ed65"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a23961f1cee221c2823691dc06ee3ed65">DAC_EVCTRL_STARTEI1_Pos</a>   1</td></tr>
|
|
<tr class="memdesc:a23961f1cee221c2823691dc06ee3ed65"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_EVCTRL) Start Conversion Event Input DAC 1 <br /></td></tr>
|
|
<tr class="separator:a23961f1cee221c2823691dc06ee3ed65"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a3c8790c8afc9d96cbd57afe2bcfea742"><td class="memItemLeft" align="right" valign="top"><a id="a3c8790c8afc9d96cbd57afe2bcfea742"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_EVCTRL_STARTEI1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#a23961f1cee221c2823691dc06ee3ed65">DAC_EVCTRL_STARTEI1_Pos</a>)</td></tr>
|
|
<tr class="separator:a3c8790c8afc9d96cbd57afe2bcfea742"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a31ff6c0f7fef665224fcf1068cd3f3fd"><td class="memItemLeft" align="right" valign="top"><a id="a31ff6c0f7fef665224fcf1068cd3f3fd"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a31ff6c0f7fef665224fcf1068cd3f3fd">DAC_EVCTRL_STARTEI_Pos</a>   0</td></tr>
|
|
<tr class="memdesc:a31ff6c0f7fef665224fcf1068cd3f3fd"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_EVCTRL) Start Conversion Event Input DAC x <br /></td></tr>
|
|
<tr class="separator:a31ff6c0f7fef665224fcf1068cd3f3fd"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a6057a110d8ba07faa5c6ed70955b9ffd"><td class="memItemLeft" align="right" valign="top"><a id="a6057a110d8ba07faa5c6ed70955b9ffd"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_EVCTRL_STARTEI_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2dac_8h.html#a31ff6c0f7fef665224fcf1068cd3f3fd">DAC_EVCTRL_STARTEI_Pos</a>)</td></tr>
|
|
<tr class="separator:a6057a110d8ba07faa5c6ed70955b9ffd"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a6b512270a7756fc1b5a039928b5c9c27"><td class="memItemLeft" align="right" valign="top"><a id="a6b512270a7756fc1b5a039928b5c9c27"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_EVCTRL_STARTEI</b>(value)   (DAC_EVCTRL_STARTEI_Msk & ((value) << <a class="el" href="component_2dac_8h.html#a31ff6c0f7fef665224fcf1068cd3f3fd">DAC_EVCTRL_STARTEI_Pos</a>))</td></tr>
|
|
<tr class="separator:a6b512270a7756fc1b5a039928b5c9c27"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a539b4b5ee23b56a9277d8d35786f1c3a"><td class="memItemLeft" align="right" valign="top"><a id="a539b4b5ee23b56a9277d8d35786f1c3a"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a539b4b5ee23b56a9277d8d35786f1c3a">DAC_EVCTRL_EMPTYEO0_Pos</a>   2</td></tr>
|
|
<tr class="memdesc:a539b4b5ee23b56a9277d8d35786f1c3a"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_EVCTRL) Data Buffer Empty Event Output DAC 0 <br /></td></tr>
|
|
<tr class="separator:a539b4b5ee23b56a9277d8d35786f1c3a"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:aa3c612fe18d84e24264635af0c69b7a8"><td class="memItemLeft" align="right" valign="top"><a id="aa3c612fe18d84e24264635af0c69b7a8"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_EVCTRL_EMPTYEO0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#a539b4b5ee23b56a9277d8d35786f1c3a">DAC_EVCTRL_EMPTYEO0_Pos</a>)</td></tr>
|
|
<tr class="separator:aa3c612fe18d84e24264635af0c69b7a8"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:aa44f1da02c684b654a656fc7efc9dc62"><td class="memItemLeft" align="right" valign="top"><a id="aa44f1da02c684b654a656fc7efc9dc62"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#aa44f1da02c684b654a656fc7efc9dc62">DAC_EVCTRL_EMPTYEO1_Pos</a>   3</td></tr>
|
|
<tr class="memdesc:aa44f1da02c684b654a656fc7efc9dc62"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_EVCTRL) Data Buffer Empty Event Output DAC 1 <br /></td></tr>
|
|
<tr class="separator:aa44f1da02c684b654a656fc7efc9dc62"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a0c38faed44b669dc00d031c58fd1d615"><td class="memItemLeft" align="right" valign="top"><a id="a0c38faed44b669dc00d031c58fd1d615"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_EVCTRL_EMPTYEO1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#aa44f1da02c684b654a656fc7efc9dc62">DAC_EVCTRL_EMPTYEO1_Pos</a>)</td></tr>
|
|
<tr class="separator:a0c38faed44b669dc00d031c58fd1d615"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a97e13ff75733b38e502c88e75cba9f3d"><td class="memItemLeft" align="right" valign="top"><a id="a97e13ff75733b38e502c88e75cba9f3d"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a97e13ff75733b38e502c88e75cba9f3d">DAC_EVCTRL_EMPTYEO_Pos</a>   2</td></tr>
|
|
<tr class="memdesc:a97e13ff75733b38e502c88e75cba9f3d"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_EVCTRL) Data Buffer Empty Event Output DAC x <br /></td></tr>
|
|
<tr class="separator:a97e13ff75733b38e502c88e75cba9f3d"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:acc0ac331b3cac4dc6736f568990cf5fa"><td class="memItemLeft" align="right" valign="top"><a id="acc0ac331b3cac4dc6736f568990cf5fa"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_EVCTRL_EMPTYEO_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2dac_8h.html#a97e13ff75733b38e502c88e75cba9f3d">DAC_EVCTRL_EMPTYEO_Pos</a>)</td></tr>
|
|
<tr class="separator:acc0ac331b3cac4dc6736f568990cf5fa"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a391bc00af4bc72d2e6632cced2369864"><td class="memItemLeft" align="right" valign="top"><a id="a391bc00af4bc72d2e6632cced2369864"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_EVCTRL_EMPTYEO</b>(value)   (DAC_EVCTRL_EMPTYEO_Msk & ((value) << <a class="el" href="component_2dac_8h.html#a97e13ff75733b38e502c88e75cba9f3d">DAC_EVCTRL_EMPTYEO_Pos</a>))</td></tr>
|
|
<tr class="separator:a391bc00af4bc72d2e6632cced2369864"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:aedf1c4a8e40d019a88fe9e5dd7090e48"><td class="memItemLeft" align="right" valign="top"><a id="aedf1c4a8e40d019a88fe9e5dd7090e48"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#aedf1c4a8e40d019a88fe9e5dd7090e48">DAC_EVCTRL_INVEI0_Pos</a>   4</td></tr>
|
|
<tr class="memdesc:aedf1c4a8e40d019a88fe9e5dd7090e48"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_EVCTRL) Enable Invertion of DAC 0 input event <br /></td></tr>
|
|
<tr class="separator:aedf1c4a8e40d019a88fe9e5dd7090e48"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ab0b79a1e785242a77dbeb9d5ba7ca02b"><td class="memItemLeft" align="right" valign="top"><a id="ab0b79a1e785242a77dbeb9d5ba7ca02b"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_EVCTRL_INVEI0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#aedf1c4a8e40d019a88fe9e5dd7090e48">DAC_EVCTRL_INVEI0_Pos</a>)</td></tr>
|
|
<tr class="separator:ab0b79a1e785242a77dbeb9d5ba7ca02b"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ae64023a88f14c6fab237d0d7f4ecb6de"><td class="memItemLeft" align="right" valign="top"><a id="ae64023a88f14c6fab237d0d7f4ecb6de"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ae64023a88f14c6fab237d0d7f4ecb6de">DAC_EVCTRL_INVEI1_Pos</a>   5</td></tr>
|
|
<tr class="memdesc:ae64023a88f14c6fab237d0d7f4ecb6de"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_EVCTRL) Enable Invertion of DAC 1 input event <br /></td></tr>
|
|
<tr class="separator:ae64023a88f14c6fab237d0d7f4ecb6de"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:af381bef6f9318f5414564170de647a1c"><td class="memItemLeft" align="right" valign="top"><a id="af381bef6f9318f5414564170de647a1c"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_EVCTRL_INVEI1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#ae64023a88f14c6fab237d0d7f4ecb6de">DAC_EVCTRL_INVEI1_Pos</a>)</td></tr>
|
|
<tr class="separator:af381bef6f9318f5414564170de647a1c"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:aefbcfa90869ef66266567b81682f3f0e"><td class="memItemLeft" align="right" valign="top"><a id="aefbcfa90869ef66266567b81682f3f0e"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#aefbcfa90869ef66266567b81682f3f0e">DAC_EVCTRL_INVEI_Pos</a>   4</td></tr>
|
|
<tr class="memdesc:aefbcfa90869ef66266567b81682f3f0e"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_EVCTRL) Enable Invertion of DAC x input event <br /></td></tr>
|
|
<tr class="separator:aefbcfa90869ef66266567b81682f3f0e"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ab11b98b9466b5bad084d7761f9bfbd0b"><td class="memItemLeft" align="right" valign="top"><a id="ab11b98b9466b5bad084d7761f9bfbd0b"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_EVCTRL_INVEI_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2dac_8h.html#aefbcfa90869ef66266567b81682f3f0e">DAC_EVCTRL_INVEI_Pos</a>)</td></tr>
|
|
<tr class="separator:ab11b98b9466b5bad084d7761f9bfbd0b"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:acca8d551c8bf333ef032192e9e25f60b"><td class="memItemLeft" align="right" valign="top"><a id="acca8d551c8bf333ef032192e9e25f60b"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_EVCTRL_INVEI</b>(value)   (DAC_EVCTRL_INVEI_Msk & ((value) << <a class="el" href="component_2dac_8h.html#aefbcfa90869ef66266567b81682f3f0e">DAC_EVCTRL_INVEI_Pos</a>))</td></tr>
|
|
<tr class="separator:acca8d551c8bf333ef032192e9e25f60b"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:aca95cca7b4c752931b4ac9c0bd784309"><td class="memItemLeft" align="right" valign="top"><a id="aca95cca7b4c752931b4ac9c0bd784309"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#aca95cca7b4c752931b4ac9c0bd784309">DAC_EVCTRL_RESRDYEO0_Pos</a>   6</td></tr>
|
|
<tr class="memdesc:aca95cca7b4c752931b4ac9c0bd784309"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_EVCTRL) Result Ready Event Output 0 <br /></td></tr>
|
|
<tr class="separator:aca95cca7b4c752931b4ac9c0bd784309"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a2b06e4e9d253dea008a7597509effd70"><td class="memItemLeft" align="right" valign="top"><a id="a2b06e4e9d253dea008a7597509effd70"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_EVCTRL_RESRDYEO0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#aca95cca7b4c752931b4ac9c0bd784309">DAC_EVCTRL_RESRDYEO0_Pos</a>)</td></tr>
|
|
<tr class="separator:a2b06e4e9d253dea008a7597509effd70"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ad4995cd4bb9caa1071696b0cec3cc6e9"><td class="memItemLeft" align="right" valign="top"><a id="ad4995cd4bb9caa1071696b0cec3cc6e9"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ad4995cd4bb9caa1071696b0cec3cc6e9">DAC_EVCTRL_RESRDYEO1_Pos</a>   7</td></tr>
|
|
<tr class="memdesc:ad4995cd4bb9caa1071696b0cec3cc6e9"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_EVCTRL) Result Ready Event Output 1 <br /></td></tr>
|
|
<tr class="separator:ad4995cd4bb9caa1071696b0cec3cc6e9"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ad1f8190aa945d0d3c681282d2ea2918d"><td class="memItemLeft" align="right" valign="top"><a id="ad1f8190aa945d0d3c681282d2ea2918d"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_EVCTRL_RESRDYEO1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#ad4995cd4bb9caa1071696b0cec3cc6e9">DAC_EVCTRL_RESRDYEO1_Pos</a>)</td></tr>
|
|
<tr class="separator:ad1f8190aa945d0d3c681282d2ea2918d"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ab07dbe9a9135a4c67c5c59a151027718"><td class="memItemLeft" align="right" valign="top"><a id="ab07dbe9a9135a4c67c5c59a151027718"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ab07dbe9a9135a4c67c5c59a151027718">DAC_EVCTRL_RESRDYEO_Pos</a>   6</td></tr>
|
|
<tr class="memdesc:ab07dbe9a9135a4c67c5c59a151027718"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_EVCTRL) Result Ready Event Output x <br /></td></tr>
|
|
<tr class="separator:ab07dbe9a9135a4c67c5c59a151027718"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a880a98d952079e938cc568f05993c235"><td class="memItemLeft" align="right" valign="top"><a id="a880a98d952079e938cc568f05993c235"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_EVCTRL_RESRDYEO_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2dac_8h.html#ab07dbe9a9135a4c67c5c59a151027718">DAC_EVCTRL_RESRDYEO_Pos</a>)</td></tr>
|
|
<tr class="separator:a880a98d952079e938cc568f05993c235"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a538062d21c6bc5b655630dfdc698d188"><td class="memItemLeft" align="right" valign="top"><a id="a538062d21c6bc5b655630dfdc698d188"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_EVCTRL_RESRDYEO</b>(value)   (DAC_EVCTRL_RESRDYEO_Msk & ((value) << <a class="el" href="component_2dac_8h.html#ab07dbe9a9135a4c67c5c59a151027718">DAC_EVCTRL_RESRDYEO_Pos</a>))</td></tr>
|
|
<tr class="separator:a538062d21c6bc5b655630dfdc698d188"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a8290fa8981af7c9f3374d64bfd643575"><td class="memItemLeft" align="right" valign="top"><a id="a8290fa8981af7c9f3374d64bfd643575"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a8290fa8981af7c9f3374d64bfd643575">DAC_EVCTRL_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFF)</td></tr>
|
|
<tr class="memdesc:a8290fa8981af7c9f3374d64bfd643575"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_EVCTRL) MASK Register <br /></td></tr>
|
|
<tr class="separator:a8290fa8981af7c9f3374d64bfd643575"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a4b29525af7de15de08715677c874b359"><td class="memItemLeft" align="right" valign="top"><a id="a4b29525af7de15de08715677c874b359"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a4b29525af7de15de08715677c874b359">DAC_INTENCLR_OFFSET</a>   0x04</td></tr>
|
|
<tr class="memdesc:a4b29525af7de15de08715677c874b359"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTENCLR offset) Interrupt Enable Clear <br /></td></tr>
|
|
<tr class="separator:a4b29525af7de15de08715677c874b359"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a0052bdf4a77d5d851ff2dc3981b47f84"><td class="memItemLeft" align="right" valign="top"><a id="a0052bdf4a77d5d851ff2dc3981b47f84"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a0052bdf4a77d5d851ff2dc3981b47f84">DAC_INTENCLR_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
|
|
<tr class="memdesc:a0052bdf4a77d5d851ff2dc3981b47f84"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTENCLR reset_value) Interrupt Enable Clear <br /></td></tr>
|
|
<tr class="separator:a0052bdf4a77d5d851ff2dc3981b47f84"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:af014e05835054e1c9f63e9a4cf8ff275"><td class="memItemLeft" align="right" valign="top"><a id="af014e05835054e1c9f63e9a4cf8ff275"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#af014e05835054e1c9f63e9a4cf8ff275">DAC_INTENCLR_UNDERRUN0_Pos</a>   0</td></tr>
|
|
<tr class="memdesc:af014e05835054e1c9f63e9a4cf8ff275"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTENCLR) Underrun 0 Interrupt Enable <br /></td></tr>
|
|
<tr class="separator:af014e05835054e1c9f63e9a4cf8ff275"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ab26a91de109d45f13cb1a09a697ef2d6"><td class="memItemLeft" align="right" valign="top"><a id="ab26a91de109d45f13cb1a09a697ef2d6"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTENCLR_UNDERRUN0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#af014e05835054e1c9f63e9a4cf8ff275">DAC_INTENCLR_UNDERRUN0_Pos</a>)</td></tr>
|
|
<tr class="separator:ab26a91de109d45f13cb1a09a697ef2d6"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a7cf06d6965801dd4129c2951435cf4cc"><td class="memItemLeft" align="right" valign="top"><a id="a7cf06d6965801dd4129c2951435cf4cc"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a7cf06d6965801dd4129c2951435cf4cc">DAC_INTENCLR_UNDERRUN1_Pos</a>   1</td></tr>
|
|
<tr class="memdesc:a7cf06d6965801dd4129c2951435cf4cc"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTENCLR) Underrun 1 Interrupt Enable <br /></td></tr>
|
|
<tr class="separator:a7cf06d6965801dd4129c2951435cf4cc"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:aaa2eb25d29830511584d2206d3dd0cf3"><td class="memItemLeft" align="right" valign="top"><a id="aaa2eb25d29830511584d2206d3dd0cf3"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTENCLR_UNDERRUN1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#a7cf06d6965801dd4129c2951435cf4cc">DAC_INTENCLR_UNDERRUN1_Pos</a>)</td></tr>
|
|
<tr class="separator:aaa2eb25d29830511584d2206d3dd0cf3"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a1a17f5ec1b6b1d51eb7caa0e41fd01f8"><td class="memItemLeft" align="right" valign="top"><a id="a1a17f5ec1b6b1d51eb7caa0e41fd01f8"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a1a17f5ec1b6b1d51eb7caa0e41fd01f8">DAC_INTENCLR_UNDERRUN_Pos</a>   0</td></tr>
|
|
<tr class="memdesc:a1a17f5ec1b6b1d51eb7caa0e41fd01f8"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTENCLR) Underrun x Interrupt Enable <br /></td></tr>
|
|
<tr class="separator:a1a17f5ec1b6b1d51eb7caa0e41fd01f8"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a7180d3cd0ea848af08e9029f18cd86c3"><td class="memItemLeft" align="right" valign="top"><a id="a7180d3cd0ea848af08e9029f18cd86c3"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTENCLR_UNDERRUN_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2dac_8h.html#a1a17f5ec1b6b1d51eb7caa0e41fd01f8">DAC_INTENCLR_UNDERRUN_Pos</a>)</td></tr>
|
|
<tr class="separator:a7180d3cd0ea848af08e9029f18cd86c3"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a6a6af8e619efc694b4d94376525db88d"><td class="memItemLeft" align="right" valign="top"><a id="a6a6af8e619efc694b4d94376525db88d"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTENCLR_UNDERRUN</b>(value)   (DAC_INTENCLR_UNDERRUN_Msk & ((value) << <a class="el" href="component_2dac_8h.html#a1a17f5ec1b6b1d51eb7caa0e41fd01f8">DAC_INTENCLR_UNDERRUN_Pos</a>))</td></tr>
|
|
<tr class="separator:a6a6af8e619efc694b4d94376525db88d"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a1de573071bd6e76fc8364ced19f28830"><td class="memItemLeft" align="right" valign="top"><a id="a1de573071bd6e76fc8364ced19f28830"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a1de573071bd6e76fc8364ced19f28830">DAC_INTENCLR_EMPTY0_Pos</a>   2</td></tr>
|
|
<tr class="memdesc:a1de573071bd6e76fc8364ced19f28830"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTENCLR) Data Buffer 0 Empty Interrupt Enable <br /></td></tr>
|
|
<tr class="separator:a1de573071bd6e76fc8364ced19f28830"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a973835f2893ebe5567daf20837032a28"><td class="memItemLeft" align="right" valign="top"><a id="a973835f2893ebe5567daf20837032a28"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTENCLR_EMPTY0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#a1de573071bd6e76fc8364ced19f28830">DAC_INTENCLR_EMPTY0_Pos</a>)</td></tr>
|
|
<tr class="separator:a973835f2893ebe5567daf20837032a28"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:acc84fea126c3689c58e3e4675fd3f7eb"><td class="memItemLeft" align="right" valign="top"><a id="acc84fea126c3689c58e3e4675fd3f7eb"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#acc84fea126c3689c58e3e4675fd3f7eb">DAC_INTENCLR_EMPTY1_Pos</a>   3</td></tr>
|
|
<tr class="memdesc:acc84fea126c3689c58e3e4675fd3f7eb"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTENCLR) Data Buffer 1 Empty Interrupt Enable <br /></td></tr>
|
|
<tr class="separator:acc84fea126c3689c58e3e4675fd3f7eb"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ac9aea0a876137d7fae8f911af65a2b04"><td class="memItemLeft" align="right" valign="top"><a id="ac9aea0a876137d7fae8f911af65a2b04"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTENCLR_EMPTY1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#acc84fea126c3689c58e3e4675fd3f7eb">DAC_INTENCLR_EMPTY1_Pos</a>)</td></tr>
|
|
<tr class="separator:ac9aea0a876137d7fae8f911af65a2b04"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ae91b3684292cdb9164d07f4b2de13b80"><td class="memItemLeft" align="right" valign="top"><a id="ae91b3684292cdb9164d07f4b2de13b80"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ae91b3684292cdb9164d07f4b2de13b80">DAC_INTENCLR_EMPTY_Pos</a>   2</td></tr>
|
|
<tr class="memdesc:ae91b3684292cdb9164d07f4b2de13b80"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTENCLR) Data Buffer x Empty Interrupt Enable <br /></td></tr>
|
|
<tr class="separator:ae91b3684292cdb9164d07f4b2de13b80"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a7d29d3d94228c876c77fd92dc33b2f98"><td class="memItemLeft" align="right" valign="top"><a id="a7d29d3d94228c876c77fd92dc33b2f98"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTENCLR_EMPTY_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2dac_8h.html#ae91b3684292cdb9164d07f4b2de13b80">DAC_INTENCLR_EMPTY_Pos</a>)</td></tr>
|
|
<tr class="separator:a7d29d3d94228c876c77fd92dc33b2f98"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a43c1412f1ed316bb5aedc21cf25372d9"><td class="memItemLeft" align="right" valign="top"><a id="a43c1412f1ed316bb5aedc21cf25372d9"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTENCLR_EMPTY</b>(value)   (DAC_INTENCLR_EMPTY_Msk & ((value) << <a class="el" href="component_2dac_8h.html#ae91b3684292cdb9164d07f4b2de13b80">DAC_INTENCLR_EMPTY_Pos</a>))</td></tr>
|
|
<tr class="separator:a43c1412f1ed316bb5aedc21cf25372d9"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a4cd5f9618f7aa2cd0992ad3728ecd506"><td class="memItemLeft" align="right" valign="top"><a id="a4cd5f9618f7aa2cd0992ad3728ecd506"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a4cd5f9618f7aa2cd0992ad3728ecd506">DAC_INTENCLR_RESRDY0_Pos</a>   4</td></tr>
|
|
<tr class="memdesc:a4cd5f9618f7aa2cd0992ad3728ecd506"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTENCLR) Result 0 Ready Interrupt Enable <br /></td></tr>
|
|
<tr class="separator:a4cd5f9618f7aa2cd0992ad3728ecd506"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a8883bf270d0703ca5e66df470fd9836a"><td class="memItemLeft" align="right" valign="top"><a id="a8883bf270d0703ca5e66df470fd9836a"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTENCLR_RESRDY0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#a4cd5f9618f7aa2cd0992ad3728ecd506">DAC_INTENCLR_RESRDY0_Pos</a>)</td></tr>
|
|
<tr class="separator:a8883bf270d0703ca5e66df470fd9836a"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a37389d570aca219d6a18bf94ee291cf4"><td class="memItemLeft" align="right" valign="top"><a id="a37389d570aca219d6a18bf94ee291cf4"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a37389d570aca219d6a18bf94ee291cf4">DAC_INTENCLR_RESRDY1_Pos</a>   5</td></tr>
|
|
<tr class="memdesc:a37389d570aca219d6a18bf94ee291cf4"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTENCLR) Result 1 Ready Interrupt Enable <br /></td></tr>
|
|
<tr class="separator:a37389d570aca219d6a18bf94ee291cf4"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a807f3a232a0fcad66c2ea59a13b09b0c"><td class="memItemLeft" align="right" valign="top"><a id="a807f3a232a0fcad66c2ea59a13b09b0c"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTENCLR_RESRDY1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#a37389d570aca219d6a18bf94ee291cf4">DAC_INTENCLR_RESRDY1_Pos</a>)</td></tr>
|
|
<tr class="separator:a807f3a232a0fcad66c2ea59a13b09b0c"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:abc3e7719399aaea9a4292bd3ece497f8"><td class="memItemLeft" align="right" valign="top"><a id="abc3e7719399aaea9a4292bd3ece497f8"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#abc3e7719399aaea9a4292bd3ece497f8">DAC_INTENCLR_RESRDY_Pos</a>   4</td></tr>
|
|
<tr class="memdesc:abc3e7719399aaea9a4292bd3ece497f8"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTENCLR) Result x Ready Interrupt Enable <br /></td></tr>
|
|
<tr class="separator:abc3e7719399aaea9a4292bd3ece497f8"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a4e8308f52bf3851a257a5d97402a2851"><td class="memItemLeft" align="right" valign="top"><a id="a4e8308f52bf3851a257a5d97402a2851"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTENCLR_RESRDY_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2dac_8h.html#abc3e7719399aaea9a4292bd3ece497f8">DAC_INTENCLR_RESRDY_Pos</a>)</td></tr>
|
|
<tr class="separator:a4e8308f52bf3851a257a5d97402a2851"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ae4f70651f69d1ca4c7a53ee637c48676"><td class="memItemLeft" align="right" valign="top"><a id="ae4f70651f69d1ca4c7a53ee637c48676"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTENCLR_RESRDY</b>(value)   (DAC_INTENCLR_RESRDY_Msk & ((value) << <a class="el" href="component_2dac_8h.html#abc3e7719399aaea9a4292bd3ece497f8">DAC_INTENCLR_RESRDY_Pos</a>))</td></tr>
|
|
<tr class="separator:ae4f70651f69d1ca4c7a53ee637c48676"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a40e7c12f99e0f0bfe6f9b7c7625274b6"><td class="memItemLeft" align="right" valign="top"><a id="a40e7c12f99e0f0bfe6f9b7c7625274b6"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a40e7c12f99e0f0bfe6f9b7c7625274b6">DAC_INTENCLR_OVERRUN0_Pos</a>   6</td></tr>
|
|
<tr class="memdesc:a40e7c12f99e0f0bfe6f9b7c7625274b6"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTENCLR) Overrun 0 Interrupt Enable <br /></td></tr>
|
|
<tr class="separator:a40e7c12f99e0f0bfe6f9b7c7625274b6"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a46898519822e834ee88164a40804ac97"><td class="memItemLeft" align="right" valign="top"><a id="a46898519822e834ee88164a40804ac97"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTENCLR_OVERRUN0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#a40e7c12f99e0f0bfe6f9b7c7625274b6">DAC_INTENCLR_OVERRUN0_Pos</a>)</td></tr>
|
|
<tr class="separator:a46898519822e834ee88164a40804ac97"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ab5bf229e3363a161d79a079df7115a2e"><td class="memItemLeft" align="right" valign="top"><a id="ab5bf229e3363a161d79a079df7115a2e"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ab5bf229e3363a161d79a079df7115a2e">DAC_INTENCLR_OVERRUN1_Pos</a>   7</td></tr>
|
|
<tr class="memdesc:ab5bf229e3363a161d79a079df7115a2e"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTENCLR) Overrun 1 Interrupt Enable <br /></td></tr>
|
|
<tr class="separator:ab5bf229e3363a161d79a079df7115a2e"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a0f2d432be46ff57eca18571c2dafcb63"><td class="memItemLeft" align="right" valign="top"><a id="a0f2d432be46ff57eca18571c2dafcb63"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTENCLR_OVERRUN1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#ab5bf229e3363a161d79a079df7115a2e">DAC_INTENCLR_OVERRUN1_Pos</a>)</td></tr>
|
|
<tr class="separator:a0f2d432be46ff57eca18571c2dafcb63"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:abe04d1d326ac85acc5e348bd958e7451"><td class="memItemLeft" align="right" valign="top"><a id="abe04d1d326ac85acc5e348bd958e7451"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#abe04d1d326ac85acc5e348bd958e7451">DAC_INTENCLR_OVERRUN_Pos</a>   6</td></tr>
|
|
<tr class="memdesc:abe04d1d326ac85acc5e348bd958e7451"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTENCLR) Overrun x Interrupt Enable <br /></td></tr>
|
|
<tr class="separator:abe04d1d326ac85acc5e348bd958e7451"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a2d4281a6be4e4c11e4564ddc17b4e619"><td class="memItemLeft" align="right" valign="top"><a id="a2d4281a6be4e4c11e4564ddc17b4e619"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTENCLR_OVERRUN_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2dac_8h.html#abe04d1d326ac85acc5e348bd958e7451">DAC_INTENCLR_OVERRUN_Pos</a>)</td></tr>
|
|
<tr class="separator:a2d4281a6be4e4c11e4564ddc17b4e619"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:afc0bd68e1f05f5cda9513a222d80b9b5"><td class="memItemLeft" align="right" valign="top"><a id="afc0bd68e1f05f5cda9513a222d80b9b5"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTENCLR_OVERRUN</b>(value)   (DAC_INTENCLR_OVERRUN_Msk & ((value) << <a class="el" href="component_2dac_8h.html#abe04d1d326ac85acc5e348bd958e7451">DAC_INTENCLR_OVERRUN_Pos</a>))</td></tr>
|
|
<tr class="separator:afc0bd68e1f05f5cda9513a222d80b9b5"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a85bb6a4ca23cf5a609ff966cfe6ac6eb"><td class="memItemLeft" align="right" valign="top"><a id="a85bb6a4ca23cf5a609ff966cfe6ac6eb"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a85bb6a4ca23cf5a609ff966cfe6ac6eb">DAC_INTENCLR_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFF)</td></tr>
|
|
<tr class="memdesc:a85bb6a4ca23cf5a609ff966cfe6ac6eb"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTENCLR) MASK Register <br /></td></tr>
|
|
<tr class="separator:a85bb6a4ca23cf5a609ff966cfe6ac6eb"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a0ccf063ca605c99a4d7675883da90a35"><td class="memItemLeft" align="right" valign="top"><a id="a0ccf063ca605c99a4d7675883da90a35"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a0ccf063ca605c99a4d7675883da90a35">DAC_INTENSET_OFFSET</a>   0x05</td></tr>
|
|
<tr class="memdesc:a0ccf063ca605c99a4d7675883da90a35"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTENSET offset) Interrupt Enable Set <br /></td></tr>
|
|
<tr class="separator:a0ccf063ca605c99a4d7675883da90a35"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ac03fead9c4f7f214a3e9c0718a629b84"><td class="memItemLeft" align="right" valign="top"><a id="ac03fead9c4f7f214a3e9c0718a629b84"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ac03fead9c4f7f214a3e9c0718a629b84">DAC_INTENSET_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
|
|
<tr class="memdesc:ac03fead9c4f7f214a3e9c0718a629b84"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTENSET reset_value) Interrupt Enable Set <br /></td></tr>
|
|
<tr class="separator:ac03fead9c4f7f214a3e9c0718a629b84"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:af4044c3c930888eb9883abb4c0209232"><td class="memItemLeft" align="right" valign="top"><a id="af4044c3c930888eb9883abb4c0209232"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#af4044c3c930888eb9883abb4c0209232">DAC_INTENSET_UNDERRUN0_Pos</a>   0</td></tr>
|
|
<tr class="memdesc:af4044c3c930888eb9883abb4c0209232"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTENSET) Underrun 0 Interrupt Enable <br /></td></tr>
|
|
<tr class="separator:af4044c3c930888eb9883abb4c0209232"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a9a65c7c82e61e62657a29f3fe75e8dab"><td class="memItemLeft" align="right" valign="top"><a id="a9a65c7c82e61e62657a29f3fe75e8dab"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTENSET_UNDERRUN0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#af4044c3c930888eb9883abb4c0209232">DAC_INTENSET_UNDERRUN0_Pos</a>)</td></tr>
|
|
<tr class="separator:a9a65c7c82e61e62657a29f3fe75e8dab"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a57579d33be3bcfb3f7a9b510b91ae165"><td class="memItemLeft" align="right" valign="top"><a id="a57579d33be3bcfb3f7a9b510b91ae165"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a57579d33be3bcfb3f7a9b510b91ae165">DAC_INTENSET_UNDERRUN1_Pos</a>   1</td></tr>
|
|
<tr class="memdesc:a57579d33be3bcfb3f7a9b510b91ae165"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTENSET) Underrun 1 Interrupt Enable <br /></td></tr>
|
|
<tr class="separator:a57579d33be3bcfb3f7a9b510b91ae165"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:af7d60356b41c884c967d170894930535"><td class="memItemLeft" align="right" valign="top"><a id="af7d60356b41c884c967d170894930535"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTENSET_UNDERRUN1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#a57579d33be3bcfb3f7a9b510b91ae165">DAC_INTENSET_UNDERRUN1_Pos</a>)</td></tr>
|
|
<tr class="separator:af7d60356b41c884c967d170894930535"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a38aa2d8302976875d983b1e2c6b0ced2"><td class="memItemLeft" align="right" valign="top"><a id="a38aa2d8302976875d983b1e2c6b0ced2"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a38aa2d8302976875d983b1e2c6b0ced2">DAC_INTENSET_UNDERRUN_Pos</a>   0</td></tr>
|
|
<tr class="memdesc:a38aa2d8302976875d983b1e2c6b0ced2"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTENSET) Underrun x Interrupt Enable <br /></td></tr>
|
|
<tr class="separator:a38aa2d8302976875d983b1e2c6b0ced2"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:aee8eacc62123398f6f2165cfac7e4d0e"><td class="memItemLeft" align="right" valign="top"><a id="aee8eacc62123398f6f2165cfac7e4d0e"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTENSET_UNDERRUN_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2dac_8h.html#a38aa2d8302976875d983b1e2c6b0ced2">DAC_INTENSET_UNDERRUN_Pos</a>)</td></tr>
|
|
<tr class="separator:aee8eacc62123398f6f2165cfac7e4d0e"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a0640098b3740387e3ef1d186d9c201f1"><td class="memItemLeft" align="right" valign="top"><a id="a0640098b3740387e3ef1d186d9c201f1"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTENSET_UNDERRUN</b>(value)   (DAC_INTENSET_UNDERRUN_Msk & ((value) << <a class="el" href="component_2dac_8h.html#a38aa2d8302976875d983b1e2c6b0ced2">DAC_INTENSET_UNDERRUN_Pos</a>))</td></tr>
|
|
<tr class="separator:a0640098b3740387e3ef1d186d9c201f1"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a71699d638d22b68c3ae3d4d4bd85d3bd"><td class="memItemLeft" align="right" valign="top"><a id="a71699d638d22b68c3ae3d4d4bd85d3bd"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a71699d638d22b68c3ae3d4d4bd85d3bd">DAC_INTENSET_EMPTY0_Pos</a>   2</td></tr>
|
|
<tr class="memdesc:a71699d638d22b68c3ae3d4d4bd85d3bd"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTENSET) Data Buffer 0 Empty Interrupt Enable <br /></td></tr>
|
|
<tr class="separator:a71699d638d22b68c3ae3d4d4bd85d3bd"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a9e329b92d3ec11f8a944ebb87de1b6d0"><td class="memItemLeft" align="right" valign="top"><a id="a9e329b92d3ec11f8a944ebb87de1b6d0"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTENSET_EMPTY0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#a71699d638d22b68c3ae3d4d4bd85d3bd">DAC_INTENSET_EMPTY0_Pos</a>)</td></tr>
|
|
<tr class="separator:a9e329b92d3ec11f8a944ebb87de1b6d0"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a3404b5813c75e2017e7b3de2aa672ac1"><td class="memItemLeft" align="right" valign="top"><a id="a3404b5813c75e2017e7b3de2aa672ac1"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a3404b5813c75e2017e7b3de2aa672ac1">DAC_INTENSET_EMPTY1_Pos</a>   3</td></tr>
|
|
<tr class="memdesc:a3404b5813c75e2017e7b3de2aa672ac1"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTENSET) Data Buffer 1 Empty Interrupt Enable <br /></td></tr>
|
|
<tr class="separator:a3404b5813c75e2017e7b3de2aa672ac1"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:add5526b8e72aa555e23fcd7983b8a90b"><td class="memItemLeft" align="right" valign="top"><a id="add5526b8e72aa555e23fcd7983b8a90b"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTENSET_EMPTY1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#a3404b5813c75e2017e7b3de2aa672ac1">DAC_INTENSET_EMPTY1_Pos</a>)</td></tr>
|
|
<tr class="separator:add5526b8e72aa555e23fcd7983b8a90b"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a12375d6d098ab02a3889530b60730fc4"><td class="memItemLeft" align="right" valign="top"><a id="a12375d6d098ab02a3889530b60730fc4"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a12375d6d098ab02a3889530b60730fc4">DAC_INTENSET_EMPTY_Pos</a>   2</td></tr>
|
|
<tr class="memdesc:a12375d6d098ab02a3889530b60730fc4"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTENSET) Data Buffer x Empty Interrupt Enable <br /></td></tr>
|
|
<tr class="separator:a12375d6d098ab02a3889530b60730fc4"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:abdd31c6ff6ac6c1165d9727020b4720f"><td class="memItemLeft" align="right" valign="top"><a id="abdd31c6ff6ac6c1165d9727020b4720f"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTENSET_EMPTY_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2dac_8h.html#a12375d6d098ab02a3889530b60730fc4">DAC_INTENSET_EMPTY_Pos</a>)</td></tr>
|
|
<tr class="separator:abdd31c6ff6ac6c1165d9727020b4720f"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a72a5d71bf44ba73259156adbf9d4417e"><td class="memItemLeft" align="right" valign="top"><a id="a72a5d71bf44ba73259156adbf9d4417e"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTENSET_EMPTY</b>(value)   (DAC_INTENSET_EMPTY_Msk & ((value) << <a class="el" href="component_2dac_8h.html#a12375d6d098ab02a3889530b60730fc4">DAC_INTENSET_EMPTY_Pos</a>))</td></tr>
|
|
<tr class="separator:a72a5d71bf44ba73259156adbf9d4417e"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a663c3cd696c8d95461326c78342fd7e3"><td class="memItemLeft" align="right" valign="top"><a id="a663c3cd696c8d95461326c78342fd7e3"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a663c3cd696c8d95461326c78342fd7e3">DAC_INTENSET_RESRDY0_Pos</a>   4</td></tr>
|
|
<tr class="memdesc:a663c3cd696c8d95461326c78342fd7e3"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTENSET) Result 0 Ready Interrupt Enable <br /></td></tr>
|
|
<tr class="separator:a663c3cd696c8d95461326c78342fd7e3"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ad81607633547b8f22b467caa5e70c98d"><td class="memItemLeft" align="right" valign="top"><a id="ad81607633547b8f22b467caa5e70c98d"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTENSET_RESRDY0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#a663c3cd696c8d95461326c78342fd7e3">DAC_INTENSET_RESRDY0_Pos</a>)</td></tr>
|
|
<tr class="separator:ad81607633547b8f22b467caa5e70c98d"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a970d61c62be63706b204b363c2422f95"><td class="memItemLeft" align="right" valign="top"><a id="a970d61c62be63706b204b363c2422f95"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a970d61c62be63706b204b363c2422f95">DAC_INTENSET_RESRDY1_Pos</a>   5</td></tr>
|
|
<tr class="memdesc:a970d61c62be63706b204b363c2422f95"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTENSET) Result 1 Ready Interrupt Enable <br /></td></tr>
|
|
<tr class="separator:a970d61c62be63706b204b363c2422f95"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a30c565e6281c46e6205715846c4cfa32"><td class="memItemLeft" align="right" valign="top"><a id="a30c565e6281c46e6205715846c4cfa32"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTENSET_RESRDY1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#a970d61c62be63706b204b363c2422f95">DAC_INTENSET_RESRDY1_Pos</a>)</td></tr>
|
|
<tr class="separator:a30c565e6281c46e6205715846c4cfa32"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:aab9324e6326b7d52691a5c8da52c3444"><td class="memItemLeft" align="right" valign="top"><a id="aab9324e6326b7d52691a5c8da52c3444"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#aab9324e6326b7d52691a5c8da52c3444">DAC_INTENSET_RESRDY_Pos</a>   4</td></tr>
|
|
<tr class="memdesc:aab9324e6326b7d52691a5c8da52c3444"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTENSET) Result x Ready Interrupt Enable <br /></td></tr>
|
|
<tr class="separator:aab9324e6326b7d52691a5c8da52c3444"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a5abd904922f52cd5697e767e528ee48d"><td class="memItemLeft" align="right" valign="top"><a id="a5abd904922f52cd5697e767e528ee48d"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTENSET_RESRDY_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2dac_8h.html#aab9324e6326b7d52691a5c8da52c3444">DAC_INTENSET_RESRDY_Pos</a>)</td></tr>
|
|
<tr class="separator:a5abd904922f52cd5697e767e528ee48d"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a392041d63f4612f0ef7ee01c44e3de15"><td class="memItemLeft" align="right" valign="top"><a id="a392041d63f4612f0ef7ee01c44e3de15"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTENSET_RESRDY</b>(value)   (DAC_INTENSET_RESRDY_Msk & ((value) << <a class="el" href="component_2dac_8h.html#aab9324e6326b7d52691a5c8da52c3444">DAC_INTENSET_RESRDY_Pos</a>))</td></tr>
|
|
<tr class="separator:a392041d63f4612f0ef7ee01c44e3de15"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a8e7cb5e3e4c52fb11f03a9afbca9021b"><td class="memItemLeft" align="right" valign="top"><a id="a8e7cb5e3e4c52fb11f03a9afbca9021b"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a8e7cb5e3e4c52fb11f03a9afbca9021b">DAC_INTENSET_OVERRUN0_Pos</a>   6</td></tr>
|
|
<tr class="memdesc:a8e7cb5e3e4c52fb11f03a9afbca9021b"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTENSET) Overrun 0 Interrupt Enable <br /></td></tr>
|
|
<tr class="separator:a8e7cb5e3e4c52fb11f03a9afbca9021b"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a706ca4f89fcf78e5af00251ddb2feba9"><td class="memItemLeft" align="right" valign="top"><a id="a706ca4f89fcf78e5af00251ddb2feba9"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTENSET_OVERRUN0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#a8e7cb5e3e4c52fb11f03a9afbca9021b">DAC_INTENSET_OVERRUN0_Pos</a>)</td></tr>
|
|
<tr class="separator:a706ca4f89fcf78e5af00251ddb2feba9"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:aa29bbdbc60c3e2fc82f8bd18ff55c4aa"><td class="memItemLeft" align="right" valign="top"><a id="aa29bbdbc60c3e2fc82f8bd18ff55c4aa"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#aa29bbdbc60c3e2fc82f8bd18ff55c4aa">DAC_INTENSET_OVERRUN1_Pos</a>   7</td></tr>
|
|
<tr class="memdesc:aa29bbdbc60c3e2fc82f8bd18ff55c4aa"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTENSET) Overrun 1 Interrupt Enable <br /></td></tr>
|
|
<tr class="separator:aa29bbdbc60c3e2fc82f8bd18ff55c4aa"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a61b7e83bd47c3a7d26cde1154ad3458d"><td class="memItemLeft" align="right" valign="top"><a id="a61b7e83bd47c3a7d26cde1154ad3458d"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTENSET_OVERRUN1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#aa29bbdbc60c3e2fc82f8bd18ff55c4aa">DAC_INTENSET_OVERRUN1_Pos</a>)</td></tr>
|
|
<tr class="separator:a61b7e83bd47c3a7d26cde1154ad3458d"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ade4c9791433ae733298029a1b51f3adb"><td class="memItemLeft" align="right" valign="top"><a id="ade4c9791433ae733298029a1b51f3adb"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ade4c9791433ae733298029a1b51f3adb">DAC_INTENSET_OVERRUN_Pos</a>   6</td></tr>
|
|
<tr class="memdesc:ade4c9791433ae733298029a1b51f3adb"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTENSET) Overrun x Interrupt Enable <br /></td></tr>
|
|
<tr class="separator:ade4c9791433ae733298029a1b51f3adb"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:aef2671f1d6989d483682f9b59b54c526"><td class="memItemLeft" align="right" valign="top"><a id="aef2671f1d6989d483682f9b59b54c526"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTENSET_OVERRUN_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2dac_8h.html#ade4c9791433ae733298029a1b51f3adb">DAC_INTENSET_OVERRUN_Pos</a>)</td></tr>
|
|
<tr class="separator:aef2671f1d6989d483682f9b59b54c526"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:aae56691c28788b4f2d1b79563114d152"><td class="memItemLeft" align="right" valign="top"><a id="aae56691c28788b4f2d1b79563114d152"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTENSET_OVERRUN</b>(value)   (DAC_INTENSET_OVERRUN_Msk & ((value) << <a class="el" href="component_2dac_8h.html#ade4c9791433ae733298029a1b51f3adb">DAC_INTENSET_OVERRUN_Pos</a>))</td></tr>
|
|
<tr class="separator:aae56691c28788b4f2d1b79563114d152"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a16937f1a74d06e17331ee7d86534570a"><td class="memItemLeft" align="right" valign="top"><a id="a16937f1a74d06e17331ee7d86534570a"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a16937f1a74d06e17331ee7d86534570a">DAC_INTENSET_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFF)</td></tr>
|
|
<tr class="memdesc:a16937f1a74d06e17331ee7d86534570a"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTENSET) MASK Register <br /></td></tr>
|
|
<tr class="separator:a16937f1a74d06e17331ee7d86534570a"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:adb76074cbcb6b6dbbe088030f72d5a4b"><td class="memItemLeft" align="right" valign="top"><a id="adb76074cbcb6b6dbbe088030f72d5a4b"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#adb76074cbcb6b6dbbe088030f72d5a4b">DAC_INTFLAG_OFFSET</a>   0x06</td></tr>
|
|
<tr class="memdesc:adb76074cbcb6b6dbbe088030f72d5a4b"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTFLAG offset) Interrupt Flag Status and Clear <br /></td></tr>
|
|
<tr class="separator:adb76074cbcb6b6dbbe088030f72d5a4b"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a9f73e182aae9decbe33d83db01b2830b"><td class="memItemLeft" align="right" valign="top"><a id="a9f73e182aae9decbe33d83db01b2830b"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a9f73e182aae9decbe33d83db01b2830b">DAC_INTFLAG_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
|
|
<tr class="memdesc:a9f73e182aae9decbe33d83db01b2830b"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTFLAG reset_value) Interrupt Flag Status and Clear <br /></td></tr>
|
|
<tr class="separator:a9f73e182aae9decbe33d83db01b2830b"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a99534e1a9968859517da0d7890ceedf1"><td class="memItemLeft" align="right" valign="top"><a id="a99534e1a9968859517da0d7890ceedf1"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a99534e1a9968859517da0d7890ceedf1">DAC_INTFLAG_UNDERRUN0_Pos</a>   0</td></tr>
|
|
<tr class="memdesc:a99534e1a9968859517da0d7890ceedf1"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTFLAG) Result 0 Underrun <br /></td></tr>
|
|
<tr class="separator:a99534e1a9968859517da0d7890ceedf1"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ab0f1209d81d340c6dcc9d3b6dcb05882"><td class="memItemLeft" align="right" valign="top"><a id="ab0f1209d81d340c6dcc9d3b6dcb05882"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTFLAG_UNDERRUN0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#a99534e1a9968859517da0d7890ceedf1">DAC_INTFLAG_UNDERRUN0_Pos</a>)</td></tr>
|
|
<tr class="separator:ab0f1209d81d340c6dcc9d3b6dcb05882"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ac4c87b8b90e57a6044d2954eb478dcb6"><td class="memItemLeft" align="right" valign="top"><a id="ac4c87b8b90e57a6044d2954eb478dcb6"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ac4c87b8b90e57a6044d2954eb478dcb6">DAC_INTFLAG_UNDERRUN1_Pos</a>   1</td></tr>
|
|
<tr class="memdesc:ac4c87b8b90e57a6044d2954eb478dcb6"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTFLAG) Result 1 Underrun <br /></td></tr>
|
|
<tr class="separator:ac4c87b8b90e57a6044d2954eb478dcb6"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:aa49bdfea65580cfa6eeef451b0250d91"><td class="memItemLeft" align="right" valign="top"><a id="aa49bdfea65580cfa6eeef451b0250d91"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTFLAG_UNDERRUN1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#ac4c87b8b90e57a6044d2954eb478dcb6">DAC_INTFLAG_UNDERRUN1_Pos</a>)</td></tr>
|
|
<tr class="separator:aa49bdfea65580cfa6eeef451b0250d91"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a6c43469c26efeb772af1a2ceba6e472b"><td class="memItemLeft" align="right" valign="top"><a id="a6c43469c26efeb772af1a2ceba6e472b"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a6c43469c26efeb772af1a2ceba6e472b">DAC_INTFLAG_UNDERRUN_Pos</a>   0</td></tr>
|
|
<tr class="memdesc:a6c43469c26efeb772af1a2ceba6e472b"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTFLAG) Result x Underrun <br /></td></tr>
|
|
<tr class="separator:a6c43469c26efeb772af1a2ceba6e472b"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a07d9e8afc2c3b26a092b0e50a84cfa07"><td class="memItemLeft" align="right" valign="top"><a id="a07d9e8afc2c3b26a092b0e50a84cfa07"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTFLAG_UNDERRUN_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2dac_8h.html#a6c43469c26efeb772af1a2ceba6e472b">DAC_INTFLAG_UNDERRUN_Pos</a>)</td></tr>
|
|
<tr class="separator:a07d9e8afc2c3b26a092b0e50a84cfa07"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ac29ac5e4326d07863dba7572a1eed651"><td class="memItemLeft" align="right" valign="top"><a id="ac29ac5e4326d07863dba7572a1eed651"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTFLAG_UNDERRUN</b>(value)   (DAC_INTFLAG_UNDERRUN_Msk & ((value) << <a class="el" href="component_2dac_8h.html#a6c43469c26efeb772af1a2ceba6e472b">DAC_INTFLAG_UNDERRUN_Pos</a>))</td></tr>
|
|
<tr class="separator:ac29ac5e4326d07863dba7572a1eed651"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ad32de3852e2d2484e2832be4819d4364"><td class="memItemLeft" align="right" valign="top"><a id="ad32de3852e2d2484e2832be4819d4364"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ad32de3852e2d2484e2832be4819d4364">DAC_INTFLAG_EMPTY0_Pos</a>   2</td></tr>
|
|
<tr class="memdesc:ad32de3852e2d2484e2832be4819d4364"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTFLAG) Data Buffer 0 Empty <br /></td></tr>
|
|
<tr class="separator:ad32de3852e2d2484e2832be4819d4364"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a0dea5c850eb6905e594a704f39e96265"><td class="memItemLeft" align="right" valign="top"><a id="a0dea5c850eb6905e594a704f39e96265"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTFLAG_EMPTY0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#ad32de3852e2d2484e2832be4819d4364">DAC_INTFLAG_EMPTY0_Pos</a>)</td></tr>
|
|
<tr class="separator:a0dea5c850eb6905e594a704f39e96265"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a7e3bd4dd4fca96ba8d463b959c91d5dd"><td class="memItemLeft" align="right" valign="top"><a id="a7e3bd4dd4fca96ba8d463b959c91d5dd"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a7e3bd4dd4fca96ba8d463b959c91d5dd">DAC_INTFLAG_EMPTY1_Pos</a>   3</td></tr>
|
|
<tr class="memdesc:a7e3bd4dd4fca96ba8d463b959c91d5dd"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTFLAG) Data Buffer 1 Empty <br /></td></tr>
|
|
<tr class="separator:a7e3bd4dd4fca96ba8d463b959c91d5dd"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a3366022ba576c500769b03f891d28453"><td class="memItemLeft" align="right" valign="top"><a id="a3366022ba576c500769b03f891d28453"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTFLAG_EMPTY1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#a7e3bd4dd4fca96ba8d463b959c91d5dd">DAC_INTFLAG_EMPTY1_Pos</a>)</td></tr>
|
|
<tr class="separator:a3366022ba576c500769b03f891d28453"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a0dac29b106d18582f439752a01102763"><td class="memItemLeft" align="right" valign="top"><a id="a0dac29b106d18582f439752a01102763"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a0dac29b106d18582f439752a01102763">DAC_INTFLAG_EMPTY_Pos</a>   2</td></tr>
|
|
<tr class="memdesc:a0dac29b106d18582f439752a01102763"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTFLAG) Data Buffer x Empty <br /></td></tr>
|
|
<tr class="separator:a0dac29b106d18582f439752a01102763"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:af190df8dfe6ad43d3bb7f0066d295845"><td class="memItemLeft" align="right" valign="top"><a id="af190df8dfe6ad43d3bb7f0066d295845"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTFLAG_EMPTY_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2dac_8h.html#a0dac29b106d18582f439752a01102763">DAC_INTFLAG_EMPTY_Pos</a>)</td></tr>
|
|
<tr class="separator:af190df8dfe6ad43d3bb7f0066d295845"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a7da99f63d5a2d03f99681a95f9b793a0"><td class="memItemLeft" align="right" valign="top"><a id="a7da99f63d5a2d03f99681a95f9b793a0"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTFLAG_EMPTY</b>(value)   (DAC_INTFLAG_EMPTY_Msk & ((value) << <a class="el" href="component_2dac_8h.html#a0dac29b106d18582f439752a01102763">DAC_INTFLAG_EMPTY_Pos</a>))</td></tr>
|
|
<tr class="separator:a7da99f63d5a2d03f99681a95f9b793a0"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a427673598aab80580409cf27ad38392a"><td class="memItemLeft" align="right" valign="top"><a id="a427673598aab80580409cf27ad38392a"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a427673598aab80580409cf27ad38392a">DAC_INTFLAG_RESRDY0_Pos</a>   4</td></tr>
|
|
<tr class="memdesc:a427673598aab80580409cf27ad38392a"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTFLAG) Result 0 Ready <br /></td></tr>
|
|
<tr class="separator:a427673598aab80580409cf27ad38392a"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a8cd88556b6fde4c8bddd482f365b3633"><td class="memItemLeft" align="right" valign="top"><a id="a8cd88556b6fde4c8bddd482f365b3633"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTFLAG_RESRDY0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#a427673598aab80580409cf27ad38392a">DAC_INTFLAG_RESRDY0_Pos</a>)</td></tr>
|
|
<tr class="separator:a8cd88556b6fde4c8bddd482f365b3633"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a936fafa26e268d86c70b9902d8ea1952"><td class="memItemLeft" align="right" valign="top"><a id="a936fafa26e268d86c70b9902d8ea1952"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a936fafa26e268d86c70b9902d8ea1952">DAC_INTFLAG_RESRDY1_Pos</a>   5</td></tr>
|
|
<tr class="memdesc:a936fafa26e268d86c70b9902d8ea1952"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTFLAG) Result 1 Ready <br /></td></tr>
|
|
<tr class="separator:a936fafa26e268d86c70b9902d8ea1952"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a359c2a1802d79f2330b0dc9edf7757e7"><td class="memItemLeft" align="right" valign="top"><a id="a359c2a1802d79f2330b0dc9edf7757e7"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTFLAG_RESRDY1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#a936fafa26e268d86c70b9902d8ea1952">DAC_INTFLAG_RESRDY1_Pos</a>)</td></tr>
|
|
<tr class="separator:a359c2a1802d79f2330b0dc9edf7757e7"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:af9c101b304080de5ca7c81db6f3433d1"><td class="memItemLeft" align="right" valign="top"><a id="af9c101b304080de5ca7c81db6f3433d1"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#af9c101b304080de5ca7c81db6f3433d1">DAC_INTFLAG_RESRDY_Pos</a>   4</td></tr>
|
|
<tr class="memdesc:af9c101b304080de5ca7c81db6f3433d1"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTFLAG) Result x Ready <br /></td></tr>
|
|
<tr class="separator:af9c101b304080de5ca7c81db6f3433d1"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a5135031a40df1406c3f0c3b411343a72"><td class="memItemLeft" align="right" valign="top"><a id="a5135031a40df1406c3f0c3b411343a72"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTFLAG_RESRDY_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2dac_8h.html#af9c101b304080de5ca7c81db6f3433d1">DAC_INTFLAG_RESRDY_Pos</a>)</td></tr>
|
|
<tr class="separator:a5135031a40df1406c3f0c3b411343a72"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a36bbb64be7713f4efe39a88ebdffcd42"><td class="memItemLeft" align="right" valign="top"><a id="a36bbb64be7713f4efe39a88ebdffcd42"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTFLAG_RESRDY</b>(value)   (DAC_INTFLAG_RESRDY_Msk & ((value) << <a class="el" href="component_2dac_8h.html#af9c101b304080de5ca7c81db6f3433d1">DAC_INTFLAG_RESRDY_Pos</a>))</td></tr>
|
|
<tr class="separator:a36bbb64be7713f4efe39a88ebdffcd42"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:aeb99a9e50d4cb04a7b718c0bde593779"><td class="memItemLeft" align="right" valign="top"><a id="aeb99a9e50d4cb04a7b718c0bde593779"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#aeb99a9e50d4cb04a7b718c0bde593779">DAC_INTFLAG_OVERRUN0_Pos</a>   6</td></tr>
|
|
<tr class="memdesc:aeb99a9e50d4cb04a7b718c0bde593779"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTFLAG) Result 0 Overrun <br /></td></tr>
|
|
<tr class="separator:aeb99a9e50d4cb04a7b718c0bde593779"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ae24565cdf0e20e4c57b808f774d31aaa"><td class="memItemLeft" align="right" valign="top"><a id="ae24565cdf0e20e4c57b808f774d31aaa"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTFLAG_OVERRUN0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#aeb99a9e50d4cb04a7b718c0bde593779">DAC_INTFLAG_OVERRUN0_Pos</a>)</td></tr>
|
|
<tr class="separator:ae24565cdf0e20e4c57b808f774d31aaa"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:afcb222d8386690e91cbd4a9428a4f60e"><td class="memItemLeft" align="right" valign="top"><a id="afcb222d8386690e91cbd4a9428a4f60e"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#afcb222d8386690e91cbd4a9428a4f60e">DAC_INTFLAG_OVERRUN1_Pos</a>   7</td></tr>
|
|
<tr class="memdesc:afcb222d8386690e91cbd4a9428a4f60e"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTFLAG) Result 1 Overrun <br /></td></tr>
|
|
<tr class="separator:afcb222d8386690e91cbd4a9428a4f60e"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a2a5728b9db1621ca4dfde30f3992347d"><td class="memItemLeft" align="right" valign="top"><a id="a2a5728b9db1621ca4dfde30f3992347d"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTFLAG_OVERRUN1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#afcb222d8386690e91cbd4a9428a4f60e">DAC_INTFLAG_OVERRUN1_Pos</a>)</td></tr>
|
|
<tr class="separator:a2a5728b9db1621ca4dfde30f3992347d"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ade5afe2053ab21e01c28212eaef0fe55"><td class="memItemLeft" align="right" valign="top"><a id="ade5afe2053ab21e01c28212eaef0fe55"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ade5afe2053ab21e01c28212eaef0fe55">DAC_INTFLAG_OVERRUN_Pos</a>   6</td></tr>
|
|
<tr class="memdesc:ade5afe2053ab21e01c28212eaef0fe55"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTFLAG) Result x Overrun <br /></td></tr>
|
|
<tr class="separator:ade5afe2053ab21e01c28212eaef0fe55"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:af7868e9ac6c97d8fbf47db794e05dba3"><td class="memItemLeft" align="right" valign="top"><a id="af7868e9ac6c97d8fbf47db794e05dba3"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTFLAG_OVERRUN_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2dac_8h.html#ade5afe2053ab21e01c28212eaef0fe55">DAC_INTFLAG_OVERRUN_Pos</a>)</td></tr>
|
|
<tr class="separator:af7868e9ac6c97d8fbf47db794e05dba3"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ac608495ff02a380656109a77748455c6"><td class="memItemLeft" align="right" valign="top"><a id="ac608495ff02a380656109a77748455c6"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_INTFLAG_OVERRUN</b>(value)   (DAC_INTFLAG_OVERRUN_Msk & ((value) << <a class="el" href="component_2dac_8h.html#ade5afe2053ab21e01c28212eaef0fe55">DAC_INTFLAG_OVERRUN_Pos</a>))</td></tr>
|
|
<tr class="separator:ac608495ff02a380656109a77748455c6"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a7610b49b2915578cf29db233149cf421"><td class="memItemLeft" align="right" valign="top"><a id="a7610b49b2915578cf29db233149cf421"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a7610b49b2915578cf29db233149cf421">DAC_INTFLAG_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFF)</td></tr>
|
|
<tr class="memdesc:a7610b49b2915578cf29db233149cf421"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_INTFLAG) MASK Register <br /></td></tr>
|
|
<tr class="separator:a7610b49b2915578cf29db233149cf421"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a515f997330d2406b1230c8b83e7c5a6b"><td class="memItemLeft" align="right" valign="top"><a id="a515f997330d2406b1230c8b83e7c5a6b"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a515f997330d2406b1230c8b83e7c5a6b">DAC_STATUS_OFFSET</a>   0x07</td></tr>
|
|
<tr class="memdesc:a515f997330d2406b1230c8b83e7c5a6b"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_STATUS offset) Status <br /></td></tr>
|
|
<tr class="separator:a515f997330d2406b1230c8b83e7c5a6b"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a114959003f1b29d6a60514c7e42781e3"><td class="memItemLeft" align="right" valign="top"><a id="a114959003f1b29d6a60514c7e42781e3"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a114959003f1b29d6a60514c7e42781e3">DAC_STATUS_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
|
|
<tr class="memdesc:a114959003f1b29d6a60514c7e42781e3"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_STATUS reset_value) Status <br /></td></tr>
|
|
<tr class="separator:a114959003f1b29d6a60514c7e42781e3"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a4486c687c5a4ab1839b2a265c050585c"><td class="memItemLeft" align="right" valign="top"><a id="a4486c687c5a4ab1839b2a265c050585c"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a4486c687c5a4ab1839b2a265c050585c">DAC_STATUS_READY0_Pos</a>   0</td></tr>
|
|
<tr class="memdesc:a4486c687c5a4ab1839b2a265c050585c"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_STATUS) DAC 0 Startup Ready <br /></td></tr>
|
|
<tr class="separator:a4486c687c5a4ab1839b2a265c050585c"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a93b26c48449c852d120576cf700cace4"><td class="memItemLeft" align="right" valign="top"><a id="a93b26c48449c852d120576cf700cace4"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_STATUS_READY0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#a4486c687c5a4ab1839b2a265c050585c">DAC_STATUS_READY0_Pos</a>)</td></tr>
|
|
<tr class="separator:a93b26c48449c852d120576cf700cace4"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a18d69a63dd603174ef5ff40ea7afbb8e"><td class="memItemLeft" align="right" valign="top"><a id="a18d69a63dd603174ef5ff40ea7afbb8e"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a18d69a63dd603174ef5ff40ea7afbb8e">DAC_STATUS_READY1_Pos</a>   1</td></tr>
|
|
<tr class="memdesc:a18d69a63dd603174ef5ff40ea7afbb8e"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_STATUS) DAC 1 Startup Ready <br /></td></tr>
|
|
<tr class="separator:a18d69a63dd603174ef5ff40ea7afbb8e"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a4d9ab86b0bc5a456d3228f8a6d4c3ecc"><td class="memItemLeft" align="right" valign="top"><a id="a4d9ab86b0bc5a456d3228f8a6d4c3ecc"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_STATUS_READY1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#a18d69a63dd603174ef5ff40ea7afbb8e">DAC_STATUS_READY1_Pos</a>)</td></tr>
|
|
<tr class="separator:a4d9ab86b0bc5a456d3228f8a6d4c3ecc"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a466a35ff7aea713f86197f0fba85d7ae"><td class="memItemLeft" align="right" valign="top"><a id="a466a35ff7aea713f86197f0fba85d7ae"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a466a35ff7aea713f86197f0fba85d7ae">DAC_STATUS_READY_Pos</a>   0</td></tr>
|
|
<tr class="memdesc:a466a35ff7aea713f86197f0fba85d7ae"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_STATUS) DAC x Startup Ready <br /></td></tr>
|
|
<tr class="separator:a466a35ff7aea713f86197f0fba85d7ae"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a8e72886b6e7644dd51dd8690223262ba"><td class="memItemLeft" align="right" valign="top"><a id="a8e72886b6e7644dd51dd8690223262ba"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_STATUS_READY_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2dac_8h.html#a466a35ff7aea713f86197f0fba85d7ae">DAC_STATUS_READY_Pos</a>)</td></tr>
|
|
<tr class="separator:a8e72886b6e7644dd51dd8690223262ba"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:afdaf31debc3fa3947643da0a5897b4cb"><td class="memItemLeft" align="right" valign="top"><a id="afdaf31debc3fa3947643da0a5897b4cb"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_STATUS_READY</b>(value)   (DAC_STATUS_READY_Msk & ((value) << <a class="el" href="component_2dac_8h.html#a466a35ff7aea713f86197f0fba85d7ae">DAC_STATUS_READY_Pos</a>))</td></tr>
|
|
<tr class="separator:afdaf31debc3fa3947643da0a5897b4cb"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ae9501a2a26e724e737609569a91c03d3"><td class="memItemLeft" align="right" valign="top"><a id="ae9501a2a26e724e737609569a91c03d3"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ae9501a2a26e724e737609569a91c03d3">DAC_STATUS_EOC0_Pos</a>   2</td></tr>
|
|
<tr class="memdesc:ae9501a2a26e724e737609569a91c03d3"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_STATUS) DAC 0 End of Conversion <br /></td></tr>
|
|
<tr class="separator:ae9501a2a26e724e737609569a91c03d3"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a13a307f1049418d656379376b7adc281"><td class="memItemLeft" align="right" valign="top"><a id="a13a307f1049418d656379376b7adc281"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_STATUS_EOC0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#ae9501a2a26e724e737609569a91c03d3">DAC_STATUS_EOC0_Pos</a>)</td></tr>
|
|
<tr class="separator:a13a307f1049418d656379376b7adc281"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:aa4eeac4108e1883eb87c11c9c2f122be"><td class="memItemLeft" align="right" valign="top"><a id="aa4eeac4108e1883eb87c11c9c2f122be"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#aa4eeac4108e1883eb87c11c9c2f122be">DAC_STATUS_EOC1_Pos</a>   3</td></tr>
|
|
<tr class="memdesc:aa4eeac4108e1883eb87c11c9c2f122be"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_STATUS) DAC 1 End of Conversion <br /></td></tr>
|
|
<tr class="separator:aa4eeac4108e1883eb87c11c9c2f122be"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:aded6ad2537cc27740161c146e14b5feb"><td class="memItemLeft" align="right" valign="top"><a id="aded6ad2537cc27740161c146e14b5feb"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_STATUS_EOC1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#aa4eeac4108e1883eb87c11c9c2f122be">DAC_STATUS_EOC1_Pos</a>)</td></tr>
|
|
<tr class="separator:aded6ad2537cc27740161c146e14b5feb"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a8f0382f0b6c03183ecfbb3f71270053d"><td class="memItemLeft" align="right" valign="top"><a id="a8f0382f0b6c03183ecfbb3f71270053d"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a8f0382f0b6c03183ecfbb3f71270053d">DAC_STATUS_EOC_Pos</a>   2</td></tr>
|
|
<tr class="memdesc:a8f0382f0b6c03183ecfbb3f71270053d"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_STATUS) DAC x End of Conversion <br /></td></tr>
|
|
<tr class="separator:a8f0382f0b6c03183ecfbb3f71270053d"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a22e23520b3c1107d7c4264bb792fcad3"><td class="memItemLeft" align="right" valign="top"><a id="a22e23520b3c1107d7c4264bb792fcad3"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_STATUS_EOC_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2dac_8h.html#a8f0382f0b6c03183ecfbb3f71270053d">DAC_STATUS_EOC_Pos</a>)</td></tr>
|
|
<tr class="separator:a22e23520b3c1107d7c4264bb792fcad3"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a4038ca5f146ba3331e9a03da7a23745a"><td class="memItemLeft" align="right" valign="top"><a id="a4038ca5f146ba3331e9a03da7a23745a"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_STATUS_EOC</b>(value)   (DAC_STATUS_EOC_Msk & ((value) << <a class="el" href="component_2dac_8h.html#a8f0382f0b6c03183ecfbb3f71270053d">DAC_STATUS_EOC_Pos</a>))</td></tr>
|
|
<tr class="separator:a4038ca5f146ba3331e9a03da7a23745a"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a989b67a3f83996021dc0214e918aaddf"><td class="memItemLeft" align="right" valign="top"><a id="a989b67a3f83996021dc0214e918aaddf"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a989b67a3f83996021dc0214e918aaddf">DAC_STATUS_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0F)</td></tr>
|
|
<tr class="memdesc:a989b67a3f83996021dc0214e918aaddf"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_STATUS) MASK Register <br /></td></tr>
|
|
<tr class="separator:a989b67a3f83996021dc0214e918aaddf"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ab524594209eea0ef54d7e77a42be7863"><td class="memItemLeft" align="right" valign="top"><a id="ab524594209eea0ef54d7e77a42be7863"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ab524594209eea0ef54d7e77a42be7863">DAC_SYNCBUSY_OFFSET</a>   0x08</td></tr>
|
|
<tr class="memdesc:ab524594209eea0ef54d7e77a42be7863"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_SYNCBUSY offset) Synchronization Busy <br /></td></tr>
|
|
<tr class="separator:ab524594209eea0ef54d7e77a42be7863"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a5decef95bed07e847ab4c1b586df8f3d"><td class="memItemLeft" align="right" valign="top"><a id="a5decef95bed07e847ab4c1b586df8f3d"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a5decef95bed07e847ab4c1b586df8f3d">DAC_SYNCBUSY_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00000000)</td></tr>
|
|
<tr class="memdesc:a5decef95bed07e847ab4c1b586df8f3d"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_SYNCBUSY reset_value) Synchronization Busy <br /></td></tr>
|
|
<tr class="separator:a5decef95bed07e847ab4c1b586df8f3d"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a0ab7aff18f93be96e950be32c7cb04cb"><td class="memItemLeft" align="right" valign="top"><a id="a0ab7aff18f93be96e950be32c7cb04cb"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a0ab7aff18f93be96e950be32c7cb04cb">DAC_SYNCBUSY_SWRST_Pos</a>   0</td></tr>
|
|
<tr class="memdesc:a0ab7aff18f93be96e950be32c7cb04cb"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_SYNCBUSY) Software Reset <br /></td></tr>
|
|
<tr class="separator:a0ab7aff18f93be96e950be32c7cb04cb"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a3f95d442bc27b75e9efd372c6d60369b"><td class="memItemLeft" align="right" valign="top"><a id="a3f95d442bc27b75e9efd372c6d60369b"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_SYNCBUSY_SWRST</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2dac_8h.html#a0ab7aff18f93be96e950be32c7cb04cb">DAC_SYNCBUSY_SWRST_Pos</a>)</td></tr>
|
|
<tr class="separator:a3f95d442bc27b75e9efd372c6d60369b"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a230872861abc95e2225e3f5c4246f141"><td class="memItemLeft" align="right" valign="top"><a id="a230872861abc95e2225e3f5c4246f141"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a230872861abc95e2225e3f5c4246f141">DAC_SYNCBUSY_ENABLE_Pos</a>   1</td></tr>
|
|
<tr class="memdesc:a230872861abc95e2225e3f5c4246f141"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_SYNCBUSY) DAC Enable Status <br /></td></tr>
|
|
<tr class="separator:a230872861abc95e2225e3f5c4246f141"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:af5026eb13c31f062c9d50389a53e398b"><td class="memItemLeft" align="right" valign="top"><a id="af5026eb13c31f062c9d50389a53e398b"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_SYNCBUSY_ENABLE</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2dac_8h.html#a230872861abc95e2225e3f5c4246f141">DAC_SYNCBUSY_ENABLE_Pos</a>)</td></tr>
|
|
<tr class="separator:af5026eb13c31f062c9d50389a53e398b"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a9f415827b3ff10d6dcff38f9e03d2dd3"><td class="memItemLeft" align="right" valign="top"><a id="a9f415827b3ff10d6dcff38f9e03d2dd3"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a9f415827b3ff10d6dcff38f9e03d2dd3">DAC_SYNCBUSY_DATA0_Pos</a>   2</td></tr>
|
|
<tr class="memdesc:a9f415827b3ff10d6dcff38f9e03d2dd3"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_SYNCBUSY) Data DAC 0 <br /></td></tr>
|
|
<tr class="separator:a9f415827b3ff10d6dcff38f9e03d2dd3"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a00c7794fe3810e0ca47451c0065e953c"><td class="memItemLeft" align="right" valign="top"><a id="a00c7794fe3810e0ca47451c0065e953c"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_SYNCBUSY_DATA0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#a9f415827b3ff10d6dcff38f9e03d2dd3">DAC_SYNCBUSY_DATA0_Pos</a>)</td></tr>
|
|
<tr class="separator:a00c7794fe3810e0ca47451c0065e953c"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a42acf2c6875f6e0d2ab1997ac3cf71cd"><td class="memItemLeft" align="right" valign="top"><a id="a42acf2c6875f6e0d2ab1997ac3cf71cd"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a42acf2c6875f6e0d2ab1997ac3cf71cd">DAC_SYNCBUSY_DATA1_Pos</a>   3</td></tr>
|
|
<tr class="memdesc:a42acf2c6875f6e0d2ab1997ac3cf71cd"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_SYNCBUSY) Data DAC 1 <br /></td></tr>
|
|
<tr class="separator:a42acf2c6875f6e0d2ab1997ac3cf71cd"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a88f8fc5d398b0029f8ca24c3ed8dcddc"><td class="memItemLeft" align="right" valign="top"><a id="a88f8fc5d398b0029f8ca24c3ed8dcddc"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_SYNCBUSY_DATA1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#a42acf2c6875f6e0d2ab1997ac3cf71cd">DAC_SYNCBUSY_DATA1_Pos</a>)</td></tr>
|
|
<tr class="separator:a88f8fc5d398b0029f8ca24c3ed8dcddc"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a2c7fa799e63254f6fe31997f8d74ab69"><td class="memItemLeft" align="right" valign="top"><a id="a2c7fa799e63254f6fe31997f8d74ab69"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a2c7fa799e63254f6fe31997f8d74ab69">DAC_SYNCBUSY_DATA_Pos</a>   2</td></tr>
|
|
<tr class="memdesc:a2c7fa799e63254f6fe31997f8d74ab69"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_SYNCBUSY) Data DAC x <br /></td></tr>
|
|
<tr class="separator:a2c7fa799e63254f6fe31997f8d74ab69"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ac390d63404b6e3bf5013b0b92d867623"><td class="memItemLeft" align="right" valign="top"><a id="ac390d63404b6e3bf5013b0b92d867623"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_SYNCBUSY_DATA_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2dac_8h.html#a2c7fa799e63254f6fe31997f8d74ab69">DAC_SYNCBUSY_DATA_Pos</a>)</td></tr>
|
|
<tr class="separator:ac390d63404b6e3bf5013b0b92d867623"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a3f08dfd94ed712d8edef6231fe7775e5"><td class="memItemLeft" align="right" valign="top"><a id="a3f08dfd94ed712d8edef6231fe7775e5"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_SYNCBUSY_DATA</b>(value)   (DAC_SYNCBUSY_DATA_Msk & ((value) << <a class="el" href="component_2dac_8h.html#a2c7fa799e63254f6fe31997f8d74ab69">DAC_SYNCBUSY_DATA_Pos</a>))</td></tr>
|
|
<tr class="separator:a3f08dfd94ed712d8edef6231fe7775e5"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:abcfee0c9deae7256c79904ede1fb80f3"><td class="memItemLeft" align="right" valign="top"><a id="abcfee0c9deae7256c79904ede1fb80f3"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#abcfee0c9deae7256c79904ede1fb80f3">DAC_SYNCBUSY_DATABUF0_Pos</a>   4</td></tr>
|
|
<tr class="memdesc:abcfee0c9deae7256c79904ede1fb80f3"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_SYNCBUSY) Data Buffer DAC 0 <br /></td></tr>
|
|
<tr class="separator:abcfee0c9deae7256c79904ede1fb80f3"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a445380e41519269e114e0e4a49a24293"><td class="memItemLeft" align="right" valign="top"><a id="a445380e41519269e114e0e4a49a24293"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_SYNCBUSY_DATABUF0</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#abcfee0c9deae7256c79904ede1fb80f3">DAC_SYNCBUSY_DATABUF0_Pos</a>)</td></tr>
|
|
<tr class="separator:a445380e41519269e114e0e4a49a24293"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:af33c0e2294a830ae02a2fa7b8ace4080"><td class="memItemLeft" align="right" valign="top"><a id="af33c0e2294a830ae02a2fa7b8ace4080"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#af33c0e2294a830ae02a2fa7b8ace4080">DAC_SYNCBUSY_DATABUF1_Pos</a>   5</td></tr>
|
|
<tr class="memdesc:af33c0e2294a830ae02a2fa7b8ace4080"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_SYNCBUSY) Data Buffer DAC 1 <br /></td></tr>
|
|
<tr class="separator:af33c0e2294a830ae02a2fa7b8ace4080"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:aa645f84e37aabf255ea99f1fc6d45098"><td class="memItemLeft" align="right" valign="top"><a id="aa645f84e37aabf255ea99f1fc6d45098"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_SYNCBUSY_DATABUF1</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(1) << <a class="el" href="component_2dac_8h.html#af33c0e2294a830ae02a2fa7b8ace4080">DAC_SYNCBUSY_DATABUF1_Pos</a>)</td></tr>
|
|
<tr class="separator:aa645f84e37aabf255ea99f1fc6d45098"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a04b32c9d531c11ebc9ded7e77709d39e"><td class="memItemLeft" align="right" valign="top"><a id="a04b32c9d531c11ebc9ded7e77709d39e"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a04b32c9d531c11ebc9ded7e77709d39e">DAC_SYNCBUSY_DATABUF_Pos</a>   4</td></tr>
|
|
<tr class="memdesc:a04b32c9d531c11ebc9ded7e77709d39e"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_SYNCBUSY) Data Buffer DAC x <br /></td></tr>
|
|
<tr class="separator:a04b32c9d531c11ebc9ded7e77709d39e"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a90c66bc3b5acbc37428c0204e42ff9fc"><td class="memItemLeft" align="right" valign="top"><a id="a90c66bc3b5acbc37428c0204e42ff9fc"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_SYNCBUSY_DATABUF_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2dac_8h.html#a04b32c9d531c11ebc9ded7e77709d39e">DAC_SYNCBUSY_DATABUF_Pos</a>)</td></tr>
|
|
<tr class="separator:a90c66bc3b5acbc37428c0204e42ff9fc"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:adfb2f74717ac4791a1b8ccd0e9be9699"><td class="memItemLeft" align="right" valign="top"><a id="adfb2f74717ac4791a1b8ccd0e9be9699"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_SYNCBUSY_DATABUF</b>(value)   (DAC_SYNCBUSY_DATABUF_Msk & ((value) << <a class="el" href="component_2dac_8h.html#a04b32c9d531c11ebc9ded7e77709d39e">DAC_SYNCBUSY_DATABUF_Pos</a>))</td></tr>
|
|
<tr class="separator:adfb2f74717ac4791a1b8ccd0e9be9699"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a9f12d800862e02454c05ef89c9fb3b88"><td class="memItemLeft" align="right" valign="top"><a id="a9f12d800862e02454c05ef89c9fb3b88"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a9f12d800862e02454c05ef89c9fb3b88">DAC_SYNCBUSY_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0000003F)</td></tr>
|
|
<tr class="memdesc:a9f12d800862e02454c05ef89c9fb3b88"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_SYNCBUSY) MASK Register <br /></td></tr>
|
|
<tr class="separator:a9f12d800862e02454c05ef89c9fb3b88"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a84ebc513c3813810220d0effb64d32a6"><td class="memItemLeft" align="right" valign="top"><a id="a84ebc513c3813810220d0effb64d32a6"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a84ebc513c3813810220d0effb64d32a6">DAC_DACCTRL_OFFSET</a>   0x0C</td></tr>
|
|
<tr class="memdesc:a84ebc513c3813810220d0effb64d32a6"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_DACCTRL offset) DAC n Control <br /></td></tr>
|
|
<tr class="separator:a84ebc513c3813810220d0effb64d32a6"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a3035c8be28b7caae01f7d985eefa0240"><td class="memItemLeft" align="right" valign="top"><a id="a3035c8be28b7caae01f7d985eefa0240"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a3035c8be28b7caae01f7d985eefa0240">DAC_DACCTRL_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0000)</td></tr>
|
|
<tr class="memdesc:a3035c8be28b7caae01f7d985eefa0240"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_DACCTRL reset_value) DAC n Control <br /></td></tr>
|
|
<tr class="separator:a3035c8be28b7caae01f7d985eefa0240"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:aa211888989fa388c431ac25dea23b398"><td class="memItemLeft" align="right" valign="top"><a id="aa211888989fa388c431ac25dea23b398"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#aa211888989fa388c431ac25dea23b398">DAC_DACCTRL_LEFTADJ_Pos</a>   0</td></tr>
|
|
<tr class="memdesc:aa211888989fa388c431ac25dea23b398"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_DACCTRL) Left Adjusted Data <br /></td></tr>
|
|
<tr class="separator:aa211888989fa388c431ac25dea23b398"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ae967f060155c9faf29e8cf4efa45abb5"><td class="memItemLeft" align="right" valign="top"><a id="ae967f060155c9faf29e8cf4efa45abb5"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_DACCTRL_LEFTADJ</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2dac_8h.html#aa211888989fa388c431ac25dea23b398">DAC_DACCTRL_LEFTADJ_Pos</a>)</td></tr>
|
|
<tr class="separator:ae967f060155c9faf29e8cf4efa45abb5"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a8ff7f04caf3d817ce0400efb42538924"><td class="memItemLeft" align="right" valign="top"><a id="a8ff7f04caf3d817ce0400efb42538924"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a8ff7f04caf3d817ce0400efb42538924">DAC_DACCTRL_ENABLE_Pos</a>   1</td></tr>
|
|
<tr class="memdesc:a8ff7f04caf3d817ce0400efb42538924"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_DACCTRL) Enable DAC0 <br /></td></tr>
|
|
<tr class="separator:a8ff7f04caf3d817ce0400efb42538924"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a6ac83f6e5e81f4ceed5387bf4c971ab9"><td class="memItemLeft" align="right" valign="top"><a id="a6ac83f6e5e81f4ceed5387bf4c971ab9"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_DACCTRL_ENABLE</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2dac_8h.html#a8ff7f04caf3d817ce0400efb42538924">DAC_DACCTRL_ENABLE_Pos</a>)</td></tr>
|
|
<tr class="separator:a6ac83f6e5e81f4ceed5387bf4c971ab9"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a99c14926d2b1e10dcdf3495435242fb2"><td class="memItemLeft" align="right" valign="top"><a id="a99c14926d2b1e10dcdf3495435242fb2"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a99c14926d2b1e10dcdf3495435242fb2">DAC_DACCTRL_CCTRL_Pos</a>   2</td></tr>
|
|
<tr class="memdesc:a99c14926d2b1e10dcdf3495435242fb2"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_DACCTRL) Current Control <br /></td></tr>
|
|
<tr class="separator:a99c14926d2b1e10dcdf3495435242fb2"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a701f95bfdc7ec511991ee3f37c825f1e"><td class="memItemLeft" align="right" valign="top"><a id="a701f95bfdc7ec511991ee3f37c825f1e"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_DACCTRL_CCTRL_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x3) << <a class="el" href="component_2dac_8h.html#a99c14926d2b1e10dcdf3495435242fb2">DAC_DACCTRL_CCTRL_Pos</a>)</td></tr>
|
|
<tr class="separator:a701f95bfdc7ec511991ee3f37c825f1e"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:adee5e56871ec428bb6b3ae5744ae0b2f"><td class="memItemLeft" align="right" valign="top"><a id="adee5e56871ec428bb6b3ae5744ae0b2f"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_DACCTRL_CCTRL</b>(value)   (DAC_DACCTRL_CCTRL_Msk & ((value) << <a class="el" href="component_2dac_8h.html#a99c14926d2b1e10dcdf3495435242fb2">DAC_DACCTRL_CCTRL_Pos</a>))</td></tr>
|
|
<tr class="separator:adee5e56871ec428bb6b3ae5744ae0b2f"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a64aa7d99ee21bf0fcc63c55df258a865"><td class="memItemLeft" align="right" valign="top"><a id="a64aa7d99ee21bf0fcc63c55df258a865"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a64aa7d99ee21bf0fcc63c55df258a865">DAC_DACCTRL_CCTRL_CC100K_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0)</td></tr>
|
|
<tr class="memdesc:a64aa7d99ee21bf0fcc63c55df258a865"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_DACCTRL) GCLK_DAC ≤ 1.2MHz (100kSPS) <br /></td></tr>
|
|
<tr class="separator:a64aa7d99ee21bf0fcc63c55df258a865"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a0eae47cb1607b2737281a3839708581f"><td class="memItemLeft" align="right" valign="top"><a id="a0eae47cb1607b2737281a3839708581f"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a0eae47cb1607b2737281a3839708581f">DAC_DACCTRL_CCTRL_CC1M_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1)</td></tr>
|
|
<tr class="memdesc:a0eae47cb1607b2737281a3839708581f"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_DACCTRL) 1.2MHz < GCLK_DAC ≤ 6MHz (500kSPS) <br /></td></tr>
|
|
<tr class="separator:a0eae47cb1607b2737281a3839708581f"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a47d57d2b4da612791e27d9e1a5574926"><td class="memItemLeft" align="right" valign="top"><a id="a47d57d2b4da612791e27d9e1a5574926"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a47d57d2b4da612791e27d9e1a5574926">DAC_DACCTRL_CCTRL_CC12M_Val</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x2)</td></tr>
|
|
<tr class="memdesc:a47d57d2b4da612791e27d9e1a5574926"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_DACCTRL) 6MHz < GCLK_DAC ≤ 12MHz (1MSPS) <br /></td></tr>
|
|
<tr class="separator:a47d57d2b4da612791e27d9e1a5574926"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ab7ebf1c9eaad10a93d17ce83471472a4"><td class="memItemLeft" align="right" valign="top"><a id="ab7ebf1c9eaad10a93d17ce83471472a4"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_DACCTRL_CCTRL_CC100K</b>   (<a class="el" href="component_2dac_8h.html#a64aa7d99ee21bf0fcc63c55df258a865">DAC_DACCTRL_CCTRL_CC100K_Val</a> << <a class="el" href="component_2dac_8h.html#a99c14926d2b1e10dcdf3495435242fb2">DAC_DACCTRL_CCTRL_Pos</a>)</td></tr>
|
|
<tr class="separator:ab7ebf1c9eaad10a93d17ce83471472a4"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:aa44915d6d3ba67e9b5f5cd95c91f0dda"><td class="memItemLeft" align="right" valign="top"><a id="aa44915d6d3ba67e9b5f5cd95c91f0dda"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_DACCTRL_CCTRL_CC1M</b>   (<a class="el" href="component_2dac_8h.html#a0eae47cb1607b2737281a3839708581f">DAC_DACCTRL_CCTRL_CC1M_Val</a> << <a class="el" href="component_2dac_8h.html#a99c14926d2b1e10dcdf3495435242fb2">DAC_DACCTRL_CCTRL_Pos</a>)</td></tr>
|
|
<tr class="separator:aa44915d6d3ba67e9b5f5cd95c91f0dda"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a063ea40425fabd90ab37345e818bc448"><td class="memItemLeft" align="right" valign="top"><a id="a063ea40425fabd90ab37345e818bc448"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_DACCTRL_CCTRL_CC12M</b>   (<a class="el" href="component_2dac_8h.html#a47d57d2b4da612791e27d9e1a5574926">DAC_DACCTRL_CCTRL_CC12M_Val</a> << <a class="el" href="component_2dac_8h.html#a99c14926d2b1e10dcdf3495435242fb2">DAC_DACCTRL_CCTRL_Pos</a>)</td></tr>
|
|
<tr class="separator:a063ea40425fabd90ab37345e818bc448"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a7aacb6f50e4b47e5c436bda9c3c3d772"><td class="memItemLeft" align="right" valign="top"><a id="a7aacb6f50e4b47e5c436bda9c3c3d772"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a7aacb6f50e4b47e5c436bda9c3c3d772">DAC_DACCTRL_FEXT_Pos</a>   5</td></tr>
|
|
<tr class="memdesc:a7aacb6f50e4b47e5c436bda9c3c3d772"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_DACCTRL) Standalone Filter <br /></td></tr>
|
|
<tr class="separator:a7aacb6f50e4b47e5c436bda9c3c3d772"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a3a07c1bfd1f07aff2b5fdc2ee76843cb"><td class="memItemLeft" align="right" valign="top"><a id="a3a07c1bfd1f07aff2b5fdc2ee76843cb"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_DACCTRL_FEXT</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2dac_8h.html#a7aacb6f50e4b47e5c436bda9c3c3d772">DAC_DACCTRL_FEXT_Pos</a>)</td></tr>
|
|
<tr class="separator:a3a07c1bfd1f07aff2b5fdc2ee76843cb"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:af3ba0076e55be71014f13602c7e9de14"><td class="memItemLeft" align="right" valign="top"><a id="af3ba0076e55be71014f13602c7e9de14"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#af3ba0076e55be71014f13602c7e9de14">DAC_DACCTRL_RUNSTDBY_Pos</a>   6</td></tr>
|
|
<tr class="memdesc:af3ba0076e55be71014f13602c7e9de14"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_DACCTRL) Run in Standby <br /></td></tr>
|
|
<tr class="separator:af3ba0076e55be71014f13602c7e9de14"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ab4a6d29fd16a3ce31665c3298e6b94fc"><td class="memItemLeft" align="right" valign="top"><a id="ab4a6d29fd16a3ce31665c3298e6b94fc"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_DACCTRL_RUNSTDBY</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2dac_8h.html#af3ba0076e55be71014f13602c7e9de14">DAC_DACCTRL_RUNSTDBY_Pos</a>)</td></tr>
|
|
<tr class="separator:ab4a6d29fd16a3ce31665c3298e6b94fc"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a8f75bd83f35ebe6cd292e79233343400"><td class="memItemLeft" align="right" valign="top"><a id="a8f75bd83f35ebe6cd292e79233343400"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a8f75bd83f35ebe6cd292e79233343400">DAC_DACCTRL_DITHER_Pos</a>   7</td></tr>
|
|
<tr class="memdesc:a8f75bd83f35ebe6cd292e79233343400"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_DACCTRL) Dithering Mode <br /></td></tr>
|
|
<tr class="separator:a8f75bd83f35ebe6cd292e79233343400"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a588b9ac85119ed7dfbfeea72f77334d4"><td class="memItemLeft" align="right" valign="top"><a id="a588b9ac85119ed7dfbfeea72f77334d4"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_DACCTRL_DITHER</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2dac_8h.html#a8f75bd83f35ebe6cd292e79233343400">DAC_DACCTRL_DITHER_Pos</a>)</td></tr>
|
|
<tr class="separator:a588b9ac85119ed7dfbfeea72f77334d4"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a40153043ea62df2085c32f96ba056fca"><td class="memItemLeft" align="right" valign="top"><a id="a40153043ea62df2085c32f96ba056fca"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a40153043ea62df2085c32f96ba056fca">DAC_DACCTRL_REFRESH_Pos</a>   8</td></tr>
|
|
<tr class="memdesc:a40153043ea62df2085c32f96ba056fca"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_DACCTRL) Refresh period <br /></td></tr>
|
|
<tr class="separator:a40153043ea62df2085c32f96ba056fca"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a3d9183dbfb728784f2ed562952a60245"><td class="memItemLeft" align="right" valign="top"><a id="a3d9183dbfb728784f2ed562952a60245"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_DACCTRL_REFRESH_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xF) << <a class="el" href="component_2dac_8h.html#a40153043ea62df2085c32f96ba056fca">DAC_DACCTRL_REFRESH_Pos</a>)</td></tr>
|
|
<tr class="separator:a3d9183dbfb728784f2ed562952a60245"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a16b719fc4e853b93591bae9d5b32a1aa"><td class="memItemLeft" align="right" valign="top"><a id="a16b719fc4e853b93591bae9d5b32a1aa"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_DACCTRL_REFRESH</b>(value)   (DAC_DACCTRL_REFRESH_Msk & ((value) << <a class="el" href="component_2dac_8h.html#a40153043ea62df2085c32f96ba056fca">DAC_DACCTRL_REFRESH_Pos</a>))</td></tr>
|
|
<tr class="separator:a16b719fc4e853b93591bae9d5b32a1aa"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a3e30d4da7f6767e50a2bc4a0c959a222"><td class="memItemLeft" align="right" valign="top"><a id="a3e30d4da7f6767e50a2bc4a0c959a222"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a3e30d4da7f6767e50a2bc4a0c959a222">DAC_DACCTRL_OSR_Pos</a>   13</td></tr>
|
|
<tr class="memdesc:a3e30d4da7f6767e50a2bc4a0c959a222"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_DACCTRL) Sampling Rate <br /></td></tr>
|
|
<tr class="separator:a3e30d4da7f6767e50a2bc4a0c959a222"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ab0dd203b6bdeccb47b390b4475f603be"><td class="memItemLeft" align="right" valign="top"><a id="ab0dd203b6bdeccb47b390b4475f603be"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_DACCTRL_OSR_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x7) << <a class="el" href="component_2dac_8h.html#a3e30d4da7f6767e50a2bc4a0c959a222">DAC_DACCTRL_OSR_Pos</a>)</td></tr>
|
|
<tr class="separator:ab0dd203b6bdeccb47b390b4475f603be"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a2655266bb18ac9a445556ede50da6919"><td class="memItemLeft" align="right" valign="top"><a id="a2655266bb18ac9a445556ede50da6919"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_DACCTRL_OSR</b>(value)   (DAC_DACCTRL_OSR_Msk & ((value) << <a class="el" href="component_2dac_8h.html#a3e30d4da7f6767e50a2bc4a0c959a222">DAC_DACCTRL_OSR_Pos</a>))</td></tr>
|
|
<tr class="separator:a2655266bb18ac9a445556ede50da6919"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a3d9ce4bc003bffdea6fb98da402d2318"><td class="memItemLeft" align="right" valign="top"><a id="a3d9ce4bc003bffdea6fb98da402d2318"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a3d9ce4bc003bffdea6fb98da402d2318">DAC_DACCTRL_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xEFEF)</td></tr>
|
|
<tr class="memdesc:a3d9ce4bc003bffdea6fb98da402d2318"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_DACCTRL) MASK Register <br /></td></tr>
|
|
<tr class="separator:a3d9ce4bc003bffdea6fb98da402d2318"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a927b65fb825b37f7f7b23d90604430be"><td class="memItemLeft" align="right" valign="top"><a id="a927b65fb825b37f7f7b23d90604430be"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a927b65fb825b37f7f7b23d90604430be">DAC_DATA_OFFSET</a>   0x10</td></tr>
|
|
<tr class="memdesc:a927b65fb825b37f7f7b23d90604430be"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_DATA offset) DAC n Data <br /></td></tr>
|
|
<tr class="separator:a927b65fb825b37f7f7b23d90604430be"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a18ce37ed9fbd7ceef65e3837f2ed73ec"><td class="memItemLeft" align="right" valign="top"><a id="a18ce37ed9fbd7ceef65e3837f2ed73ec"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a18ce37ed9fbd7ceef65e3837f2ed73ec">DAC_DATA_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0000)</td></tr>
|
|
<tr class="memdesc:a18ce37ed9fbd7ceef65e3837f2ed73ec"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_DATA reset_value) DAC n Data <br /></td></tr>
|
|
<tr class="separator:a18ce37ed9fbd7ceef65e3837f2ed73ec"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:abb4ad33edb03cfa83cacba4fbfcae055"><td class="memItemLeft" align="right" valign="top"><a id="abb4ad33edb03cfa83cacba4fbfcae055"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#abb4ad33edb03cfa83cacba4fbfcae055">DAC_DATA_DATA_Pos</a>   0</td></tr>
|
|
<tr class="memdesc:abb4ad33edb03cfa83cacba4fbfcae055"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_DATA) DAC0 Data <br /></td></tr>
|
|
<tr class="separator:abb4ad33edb03cfa83cacba4fbfcae055"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a171d99dfcf0786683343dee659c78c1f"><td class="memItemLeft" align="right" valign="top"><a id="a171d99dfcf0786683343dee659c78c1f"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_DATA_DATA_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFF) << <a class="el" href="component_2dac_8h.html#abb4ad33edb03cfa83cacba4fbfcae055">DAC_DATA_DATA_Pos</a>)</td></tr>
|
|
<tr class="separator:a171d99dfcf0786683343dee659c78c1f"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a74d499bb7e6618526f4e7928cc871593"><td class="memItemLeft" align="right" valign="top"><a id="a74d499bb7e6618526f4e7928cc871593"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_DATA_DATA</b>(value)   (DAC_DATA_DATA_Msk & ((value) << <a class="el" href="component_2dac_8h.html#abb4ad33edb03cfa83cacba4fbfcae055">DAC_DATA_DATA_Pos</a>))</td></tr>
|
|
<tr class="separator:a74d499bb7e6618526f4e7928cc871593"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a1bb2391625c1bf82261cfb3a23c32181"><td class="memItemLeft" align="right" valign="top"><a id="a1bb2391625c1bf82261cfb3a23c32181"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a1bb2391625c1bf82261cfb3a23c32181">DAC_DATA_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFF)</td></tr>
|
|
<tr class="memdesc:a1bb2391625c1bf82261cfb3a23c32181"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_DATA) MASK Register <br /></td></tr>
|
|
<tr class="separator:a1bb2391625c1bf82261cfb3a23c32181"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a925e76e2151662945396d1937062bdf7"><td class="memItemLeft" align="right" valign="top"><a id="a925e76e2151662945396d1937062bdf7"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a925e76e2151662945396d1937062bdf7">DAC_DATABUF_OFFSET</a>   0x14</td></tr>
|
|
<tr class="memdesc:a925e76e2151662945396d1937062bdf7"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_DATABUF offset) DAC n Data Buffer <br /></td></tr>
|
|
<tr class="separator:a925e76e2151662945396d1937062bdf7"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a3649ae1cf9dbb0179c3a00c0e210bc23"><td class="memItemLeft" align="right" valign="top"><a id="a3649ae1cf9dbb0179c3a00c0e210bc23"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a3649ae1cf9dbb0179c3a00c0e210bc23">DAC_DATABUF_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0000)</td></tr>
|
|
<tr class="memdesc:a3649ae1cf9dbb0179c3a00c0e210bc23"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_DATABUF reset_value) DAC n Data Buffer <br /></td></tr>
|
|
<tr class="separator:a3649ae1cf9dbb0179c3a00c0e210bc23"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a3fe3d9c9181741d88429ff03b62828e5"><td class="memItemLeft" align="right" valign="top"><a id="a3fe3d9c9181741d88429ff03b62828e5"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a3fe3d9c9181741d88429ff03b62828e5">DAC_DATABUF_DATABUF_Pos</a>   0</td></tr>
|
|
<tr class="memdesc:a3fe3d9c9181741d88429ff03b62828e5"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_DATABUF) DAC0 Data Buffer <br /></td></tr>
|
|
<tr class="separator:a3fe3d9c9181741d88429ff03b62828e5"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ab9b1749e7a45e018441aa8987cc29c16"><td class="memItemLeft" align="right" valign="top"><a id="ab9b1749e7a45e018441aa8987cc29c16"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_DATABUF_DATABUF_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFF) << <a class="el" href="component_2dac_8h.html#a3fe3d9c9181741d88429ff03b62828e5">DAC_DATABUF_DATABUF_Pos</a>)</td></tr>
|
|
<tr class="separator:ab9b1749e7a45e018441aa8987cc29c16"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a4e60504cd02e632151e452ec90fa33ac"><td class="memItemLeft" align="right" valign="top"><a id="a4e60504cd02e632151e452ec90fa33ac"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_DATABUF_DATABUF</b>(value)   (DAC_DATABUF_DATABUF_Msk & ((value) << <a class="el" href="component_2dac_8h.html#a3fe3d9c9181741d88429ff03b62828e5">DAC_DATABUF_DATABUF_Pos</a>))</td></tr>
|
|
<tr class="separator:a4e60504cd02e632151e452ec90fa33ac"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a09bc5edc17c5afd32066807527a78ba1"><td class="memItemLeft" align="right" valign="top"><a id="a09bc5edc17c5afd32066807527a78ba1"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a09bc5edc17c5afd32066807527a78ba1">DAC_DATABUF_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFF)</td></tr>
|
|
<tr class="memdesc:a09bc5edc17c5afd32066807527a78ba1"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_DATABUF) MASK Register <br /></td></tr>
|
|
<tr class="separator:a09bc5edc17c5afd32066807527a78ba1"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ad921df6ba2692bf586910433879cfc97"><td class="memItemLeft" align="right" valign="top"><a id="ad921df6ba2692bf586910433879cfc97"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ad921df6ba2692bf586910433879cfc97">DAC_DBGCTRL_OFFSET</a>   0x18</td></tr>
|
|
<tr class="memdesc:ad921df6ba2692bf586910433879cfc97"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_DBGCTRL offset) Debug Control <br /></td></tr>
|
|
<tr class="separator:ad921df6ba2692bf586910433879cfc97"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ab17f08ba0800da1162482ada6b8e2624"><td class="memItemLeft" align="right" valign="top"><a id="ab17f08ba0800da1162482ada6b8e2624"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#ab17f08ba0800da1162482ada6b8e2624">DAC_DBGCTRL_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x00)</td></tr>
|
|
<tr class="memdesc:ab17f08ba0800da1162482ada6b8e2624"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_DBGCTRL reset_value) Debug Control <br /></td></tr>
|
|
<tr class="separator:ab17f08ba0800da1162482ada6b8e2624"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a942d362f9041cbc6fd9b5d70c04b3eee"><td class="memItemLeft" align="right" valign="top"><a id="a942d362f9041cbc6fd9b5d70c04b3eee"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a942d362f9041cbc6fd9b5d70c04b3eee">DAC_DBGCTRL_DBGRUN_Pos</a>   0</td></tr>
|
|
<tr class="memdesc:a942d362f9041cbc6fd9b5d70c04b3eee"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_DBGCTRL) Debug Run <br /></td></tr>
|
|
<tr class="separator:a942d362f9041cbc6fd9b5d70c04b3eee"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ad4d5fee7dbfc084260f641e79641a97e"><td class="memItemLeft" align="right" valign="top"><a id="ad4d5fee7dbfc084260f641e79641a97e"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_DBGCTRL_DBGRUN</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x1) << <a class="el" href="component_2dac_8h.html#a942d362f9041cbc6fd9b5d70c04b3eee">DAC_DBGCTRL_DBGRUN_Pos</a>)</td></tr>
|
|
<tr class="separator:ad4d5fee7dbfc084260f641e79641a97e"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:af587f004b2e652bebe2c8d2443acf5bd"><td class="memItemLeft" align="right" valign="top"><a id="af587f004b2e652bebe2c8d2443acf5bd"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#af587f004b2e652bebe2c8d2443acf5bd">DAC_DBGCTRL_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x01)</td></tr>
|
|
<tr class="memdesc:af587f004b2e652bebe2c8d2443acf5bd"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_DBGCTRL) MASK Register <br /></td></tr>
|
|
<tr class="separator:af587f004b2e652bebe2c8d2443acf5bd"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a5fa7bdf46fd439a061df15be496ce0d0"><td class="memItemLeft" align="right" valign="top"><a id="a5fa7bdf46fd439a061df15be496ce0d0"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a5fa7bdf46fd439a061df15be496ce0d0">DAC_RESULT_OFFSET</a>   0x1C</td></tr>
|
|
<tr class="memdesc:a5fa7bdf46fd439a061df15be496ce0d0"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_RESULT offset) Filter Result <br /></td></tr>
|
|
<tr class="separator:a5fa7bdf46fd439a061df15be496ce0d0"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:affd951824551823018058bba3d9ab4ee"><td class="memItemLeft" align="right" valign="top"><a id="affd951824551823018058bba3d9ab4ee"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#affd951824551823018058bba3d9ab4ee">DAC_RESULT_RESETVALUE</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0x0000)</td></tr>
|
|
<tr class="memdesc:affd951824551823018058bba3d9ab4ee"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_RESULT reset_value) Filter Result <br /></td></tr>
|
|
<tr class="separator:affd951824551823018058bba3d9ab4ee"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a8a398adb95ea7d38d15874b2d85a429a"><td class="memItemLeft" align="right" valign="top"><a id="a8a398adb95ea7d38d15874b2d85a429a"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a8a398adb95ea7d38d15874b2d85a429a">DAC_RESULT_RESULT_Pos</a>   0</td></tr>
|
|
<tr class="memdesc:a8a398adb95ea7d38d15874b2d85a429a"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_RESULT) Filter Result <br /></td></tr>
|
|
<tr class="separator:a8a398adb95ea7d38d15874b2d85a429a"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:af9906821d28a7c81d0cb155e14d0f3b6"><td class="memItemLeft" align="right" valign="top"><a id="af9906821d28a7c81d0cb155e14d0f3b6"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_RESULT_RESULT_Msk</b>   (<a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFF) << <a class="el" href="component_2dac_8h.html#a8a398adb95ea7d38d15874b2d85a429a">DAC_RESULT_RESULT_Pos</a>)</td></tr>
|
|
<tr class="separator:af9906821d28a7c81d0cb155e14d0f3b6"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:ab464be173c31aa95a3ab7e2255e4ab8d"><td class="memItemLeft" align="right" valign="top"><a id="ab464be173c31aa95a3ab7e2255e4ab8d"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><b>DAC_RESULT_RESULT</b>(value)   (DAC_RESULT_RESULT_Msk & ((value) << <a class="el" href="component_2dac_8h.html#a8a398adb95ea7d38d15874b2d85a429a">DAC_RESULT_RESULT_Pos</a>))</td></tr>
|
|
<tr class="separator:ab464be173c31aa95a3ab7e2255e4ab8d"><td class="memSeparator" colspan="2"> </td></tr>
|
|
<tr class="memitem:a902484aa6dbe487bff73b0192974f08c"><td class="memItemLeft" align="right" valign="top"><a id="a902484aa6dbe487bff73b0192974f08c"></a>
|
|
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="component_2dac_8h.html#a902484aa6dbe487bff73b0192974f08c">DAC_RESULT_MASK</a>   <a class="el" href="same54p20a_8h.html#ab21106c87e6a98f4e2833499325b2867">_U_</a>(0xFFFF)</td></tr>
|
|
<tr class="memdesc:a902484aa6dbe487bff73b0192974f08c"><td class="mdescLeft"> </td><td class="mdescRight">(DAC_RESULT) MASK Register <br /></td></tr>
|
|
<tr class="separator:a902484aa6dbe487bff73b0192974f08c"><td class="memSeparator" colspan="2"> </td></tr>
|
|
</table>
|
|
<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
|
|
<div class="textblock"><p>Component description for DAC. </p>
|
|
<p>Copyright (c) 2019 Microchip Technology Inc.</p>
|
|
<p>\asf_license_start </p>
|
|
|
|
<p class="definition">Definition in file <a class="el" href="component_2dac_8h_source.html">dac.h</a>.</p>
|
|
</div></div><!-- contents -->
|
|
<!-- start footer part -->
|
|
<hr class="footer"/><address class="footer"><small>
|
|
Generated by <a href="http://www.doxygen.org/index.html"><img class="footer" src="doxygen.svg" width="104" height="31" alt="doxygen"/></a> 1.8.20
|
|
</small></address>
|
|
</body>
|
|
</html>
|