You cannot select more than 25 topics
Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
63 lines
2.4 KiB
C
63 lines
2.4 KiB
C
#ifndef _CLOCKS_H_
|
|
#define _CLOCKS_H_
|
|
|
|
#include "core.h"
|
|
|
|
// XOSC32K Definitions
|
|
#define CONF_CORE_CLK_XOSC32KCTRL_CGM_LP_MODE (0x0)
|
|
#define CONF_CORE_CLK_XOSC32KCTRL_CGM_STD_MODE (0x1)
|
|
#define CONF_CORE_CLK_XOSC32KCTRL_CGM_HS_MODE (0x2)
|
|
|
|
#define CONF_CORE_CLK_XOSC32KCTRL_STARTUP_62592us (0x0)
|
|
#define CONF_CORE_CLK_XOSC32KCTRL_STARTUP_125092us (0x1)
|
|
#define CONF_CORE_CLK_XOSC32KCTRL_STARTUP_500092us (0x2)
|
|
#define CONF_CORE_CLK_XOSC32KCTRL_STARTUP_1000009200ns (0x3)
|
|
#define CONF_CORE_CLK_XOSC32KCTRL_STARTUP_2000009200ns (0x4)
|
|
#define CONF_CORE_CLK_XOSC32KCTRL_STARTUP_4000009200ns (0x5)
|
|
#define CONF_CORE_CLK_XOSC32KCTRL_STARTUP_8000009200ns (0x6)
|
|
|
|
// Oscillator Current Multiplier
|
|
#define CONF_CORE_CLK_XOSCCTRL_IMULT_24MHZ_TO_48MHZ (6)
|
|
#define CONF_CORE_CLK_XOSCCTRL_IMULT_16MHZ_TO_24MHZ (5)
|
|
#define CONF_CORE_CLK_XOSCCTRL_IMULT_8MHZ_TO_16MHZ (4)
|
|
#define CONF_CORE_CLK_XOSCCTRL_IMULT_8MHZ (3)
|
|
|
|
// Oscillator Current Reference
|
|
#define CONF_CORE_CLK_XOSCCTRL_IPTAT_24MHZ_TO_48MHZ (3)
|
|
#define CONF_CORE_CLK_XOSCCTRL_IPTAT_16MHZ_TO_24MHZ (3)
|
|
#define CONF_CORE_CLK_XOSCCTRL_IPTAT_8MHZ_TO_16MHZ (3)
|
|
#define CONF_CORE_CLK_XOSCCTRL_IPTAT_8MHZ (2)
|
|
|
|
// DFLL Definitions
|
|
#define CONF_CORE_CLK_DFLLCTRL_STABLE_FCALIB_NOT_FIXED (0)
|
|
#define CONF_CORE_CLK_DFLLCTRL_STABLE_FCALIB_FIXED (1)
|
|
|
|
// DPLL Definitions
|
|
#define CONF_CORE_CLK_DPLLCTRL_DCOFILTER_3210KHZ (0x0)
|
|
#define CONF_CORE_CLK_DPLLCTRL_DCOFILTER_1600KHZ (0x1)
|
|
#define CONF_CORE_CLK_DPLLCTRL_DCOFILTER_1100KHZ (0x2)
|
|
#define CONF_CORE_CLK_DPLLCTRL_DCOFILTER_800KHZ (0x3)
|
|
#define CONF_CORE_CLK_DPLLCTRL_DCOFILTER_640KHZ (0x4)
|
|
#define CONF_CORE_CLK_DPLLCTRL_DCOFILTER_550KHZ (0x5)
|
|
#define CONF_CORE_CLK_DPLLCTRL_DCOFILTER_450KHZ (0x6)
|
|
#define CONF_CORE_CLK_DPLLCTRL_DCOFILTER_400KHZ (0x7)
|
|
|
|
#define CONF_CORE_CLK_DPLLCTRL_LTIME_TIMEOUT_NONE (0x0)
|
|
#define CONF_CORE_CLK_DPLLCTRL_LTIME_TIMEOUT_800us (0x4)
|
|
#define CONF_CORE_CLK_DPLLCTRL_LTIME_TIMEOUT_900us (0x5)
|
|
#define CONF_CORE_CLK_DPLLCTRL_LTIME_TIMEOUT_1000us (0x6)
|
|
#define CONF_CORE_CLK_DPLLCTRL_LTIME_TIMEOUT_1100us (0x7)
|
|
|
|
#define CONF_CORE_CLK_DPLLCTRL_REFCLK_GCLK (0x0)
|
|
#define CONF_CORE_CLK_DPLLCTRL_REFCLK_XOSC32 (0x1)
|
|
#define CONF_CORE_CLK_DPLLCTRL_REFCLK_XOSC0 (0x2)
|
|
#define CONF_CORE_CLK_DPLLCTRL_REFCLK_XOSC1 (0x3)
|
|
|
|
void clock_osc32k_init(void);
|
|
void clock_osc_init(void);
|
|
void clock_mclk_init(void);
|
|
void clock_gclk_init(void);
|
|
void clock_dpll_init(void);
|
|
void clock_dfll_init(void);
|
|
#endif
|