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Next: <a rel="next" accesskey="n" href="PowerPC-AltiVec_002fVSX-Built_002din-Functions.html#PowerPC-AltiVec_002fVSX-Built_002din-Functions">PowerPC AltiVec/VSX Built-in Functions</a>,
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Up: <a rel="up" accesskey="u" href="Target-Builtins.html#Target-Builtins">Target Builtins</a>
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<h4 class="subsection">6.58.19 PowerPC Built-in Functions</h4>
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<p>These built-in functions are available for the PowerPC family of
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processors:
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<pre class="smallexample"> float __builtin_recipdivf (float, float);
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float __builtin_rsqrtf (float);
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double __builtin_recipdiv (double, double);
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double __builtin_rsqrt (double);
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uint64_t __builtin_ppc_get_timebase ();
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unsigned long __builtin_ppc_mftb ();
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double __builtin_unpack_longdouble (long double, int);
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long double __builtin_pack_longdouble (double, double);
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</pre>
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<p>The <code>vec_rsqrt</code>, <code>__builtin_rsqrt</code>, and
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<code>__builtin_rsqrtf</code> functions generate multiple instructions to
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implement the reciprocal sqrt functionality using reciprocal sqrt
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estimate instructions.
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<p>The <code>__builtin_recipdiv</code>, and <code>__builtin_recipdivf</code>
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functions generate multiple instructions to implement division using
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the reciprocal estimate instructions.
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<p>The <code>__builtin_ppc_get_timebase</code> and <code>__builtin_ppc_mftb</code>
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functions generate instructions to read the Time Base Register. The
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<code>__builtin_ppc_get_timebase</code> function may generate multiple
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instructions and always returns the 64 bits of the Time Base Register.
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The <code>__builtin_ppc_mftb</code> function always generates one instruction and
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returns the Time Base Register value as an unsigned long, throwing away
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the most significant word on 32-bit environments.
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<p>The following built-in functions are available for the PowerPC family
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of processors, starting with ISA 2.06 or later (<samp><span class="option">-mcpu=power7</span></samp>
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or <samp><span class="option">-mpopcntd</span></samp>):
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<pre class="smallexample"> long __builtin_bpermd (long, long);
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int __builtin_divwe (int, int);
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int __builtin_divweo (int, int);
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unsigned int __builtin_divweu (unsigned int, unsigned int);
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unsigned int __builtin_divweuo (unsigned int, unsigned int);
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long __builtin_divde (long, long);
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long __builtin_divdeo (long, long);
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unsigned long __builtin_divdeu (unsigned long, unsigned long);
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unsigned long __builtin_divdeuo (unsigned long, unsigned long);
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unsigned int cdtbcd (unsigned int);
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unsigned int cbcdtd (unsigned int);
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unsigned int addg6s (unsigned int, unsigned int);
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</pre>
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<p>The <code>__builtin_divde</code>, <code>__builtin_divdeo</code>,
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<code>__builtin_divdeu</code>, <code>__builtin_divdeou</code> functions require a
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64-bit environment support ISA 2.06 or later.
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<p>The following built-in functions are available for the PowerPC family
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of processors when hardware decimal floating point
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(<samp><span class="option">-mhard-dfp</span></samp>) is available:
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<pre class="smallexample"> _Decimal64 __builtin_dxex (_Decimal64);
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_Decimal128 __builtin_dxexq (_Decimal128);
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_Decimal64 __builtin_ddedpd (int, _Decimal64);
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_Decimal128 __builtin_ddedpdq (int, _Decimal128);
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_Decimal64 __builtin_denbcd (int, _Decimal64);
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_Decimal128 __builtin_denbcdq (int, _Decimal128);
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_Decimal64 __builtin_diex (_Decimal64, _Decimal64);
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_Decimal128 _builtin_diexq (_Decimal128, _Decimal128);
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_Decimal64 __builtin_dscli (_Decimal64, int);
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_Decimal128 __builtin_dscliq (_Decimal128, int);
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_Decimal64 __builtin_dscri (_Decimal64, int);
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_Decimal128 __builtin_dscriq (_Decimal128, int);
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unsigned long long __builtin_unpack_dec128 (_Decimal128, int);
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_Decimal128 __builtin_pack_dec128 (unsigned long long, unsigned long long);
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</pre>
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<p>The following built-in functions are available for the PowerPC family
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of processors when the Vector Scalar (vsx) instruction set is
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available:
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<pre class="smallexample"> unsigned long long __builtin_unpack_vector_int128 (vector __int128_t, int);
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vector __int128_t __builtin_pack_vector_int128 (unsigned long long,
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unsigned long long);
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</pre>
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