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Next: <a rel="next" accesskey="n" href="CR16-Options.html#CR16-Options">CR16 Options</a>,
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<h4 class="subsection">3.17.8 CRIS Options</h4>
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<p><a name="index-CRIS-Options-1491"></a>
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These options are defined specifically for the CRIS ports.
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<dl>
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<dt><code>-march=</code><var>architecture-type</var><dt><code>-mcpu=</code><var>architecture-type</var><dd><a name="index-march-1492"></a><a name="index-mcpu-1493"></a>Generate code for the specified architecture. The choices for
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<var>architecture-type</var> are ‘<samp><span class="samp">v3</span></samp>’, ‘<samp><span class="samp">v8</span></samp>’ and ‘<samp><span class="samp">v10</span></samp>’ for
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respectively ETRAX <!-- /@w -->4, ETRAX <!-- /@w -->100, and ETRAX <!-- /@w -->100 <!-- /@w -->LX.
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Default is ‘<samp><span class="samp">v0</span></samp>’ except for cris-axis-linux-gnu, where the default is
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‘<samp><span class="samp">v10</span></samp>’.
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<br><dt><code>-mtune=</code><var>architecture-type</var><dd><a name="index-mtune-1494"></a>Tune to <var>architecture-type</var> everything applicable about the generated
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code, except for the ABI and the set of available instructions. The
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choices for <var>architecture-type</var> are the same as for
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<samp><span class="option">-march=</span><var>architecture-type</var></samp>.
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<br><dt><code>-mmax-stack-frame=</code><var>n</var><dd><a name="index-mmax_002dstack_002dframe-1495"></a>Warn when the stack frame of a function exceeds <var>n</var> bytes.
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<br><dt><code>-metrax4</code><dt><code>-metrax100</code><dd><a name="index-metrax4-1496"></a><a name="index-metrax100-1497"></a>The options <samp><span class="option">-metrax4</span></samp> and <samp><span class="option">-metrax100</span></samp> are synonyms for
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<samp><span class="option">-march=v3</span></samp> and <samp><span class="option">-march=v8</span></samp> respectively.
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<br><dt><code>-mmul-bug-workaround</code><dt><code>-mno-mul-bug-workaround</code><dd><a name="index-mmul_002dbug_002dworkaround-1498"></a><a name="index-mno_002dmul_002dbug_002dworkaround-1499"></a>Work around a bug in the <code>muls</code> and <code>mulu</code> instructions for CPU
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models where it applies. This option is active by default.
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<br><dt><code>-mpdebug</code><dd><a name="index-mpdebug-1500"></a>Enable CRIS-specific verbose debug-related information in the assembly
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code. This option also has the effect of turning off the ‘<samp><span class="samp">#NO_APP</span></samp>’
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formatted-code indicator to the assembler at the beginning of the
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assembly file.
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<br><dt><code>-mcc-init</code><dd><a name="index-mcc_002dinit-1501"></a>Do not use condition-code results from previous instruction; always emit
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compare and test instructions before use of condition codes.
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<br><dt><code>-mno-side-effects</code><dd><a name="index-mno_002dside_002deffects-1502"></a>Do not emit instructions with side effects in addressing modes other than
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post-increment.
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<br><dt><code>-mstack-align</code><dt><code>-mno-stack-align</code><dt><code>-mdata-align</code><dt><code>-mno-data-align</code><dt><code>-mconst-align</code><dt><code>-mno-const-align</code><dd><a name="index-mstack_002dalign-1503"></a><a name="index-mno_002dstack_002dalign-1504"></a><a name="index-mdata_002dalign-1505"></a><a name="index-mno_002ddata_002dalign-1506"></a><a name="index-mconst_002dalign-1507"></a><a name="index-mno_002dconst_002dalign-1508"></a>These options (‘<samp><span class="samp">no-</span></samp>’ options) arrange (eliminate arrangements) for the
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stack frame, individual data and constants to be aligned for the maximum
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single data access size for the chosen CPU model. The default is to
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arrange for 32-bit alignment. ABI details such as structure layout are
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not affected by these options.
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<br><dt><code>-m32-bit</code><dt><code>-m16-bit</code><dt><code>-m8-bit</code><dd><a name="index-m32_002dbit-1509"></a><a name="index-m16_002dbit-1510"></a><a name="index-m8_002dbit-1511"></a>Similar to the stack- data- and const-align options above, these options
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arrange for stack frame, writable data and constants to all be 32-bit,
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16-bit or 8-bit aligned. The default is 32-bit alignment.
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<br><dt><code>-mno-prologue-epilogue</code><dt><code>-mprologue-epilogue</code><dd><a name="index-mno_002dprologue_002depilogue-1512"></a><a name="index-mprologue_002depilogue-1513"></a>With <samp><span class="option">-mno-prologue-epilogue</span></samp>, the normal function prologue and
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epilogue which set up the stack frame are omitted and no return
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instructions or return sequences are generated in the code. Use this
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option only together with visual inspection of the compiled code: no
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warnings or errors are generated when call-saved registers must be saved,
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or storage for local variables needs to be allocated.
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<br><dt><code>-mno-gotplt</code><dt><code>-mgotplt</code><dd><a name="index-mno_002dgotplt-1514"></a><a name="index-mgotplt-1515"></a>With <samp><span class="option">-fpic</span></samp> and <samp><span class="option">-fPIC</span></samp>, don't generate (do generate)
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instruction sequences that load addresses for functions from the PLT part
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of the GOT rather than (traditional on other architectures) calls to the
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PLT. The default is <samp><span class="option">-mgotplt</span></samp>.
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<br><dt><code>-melf</code><dd><a name="index-melf-1516"></a>Legacy no-op option only recognized with the cris-axis-elf and
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cris-axis-linux-gnu targets.
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<br><dt><code>-mlinux</code><dd><a name="index-mlinux-1517"></a>Legacy no-op option only recognized with the cris-axis-linux-gnu target.
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<br><dt><code>-sim</code><dd><a name="index-sim-1518"></a>This option, recognized for the cris-axis-elf, arranges
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to link with input-output functions from a simulator library. Code,
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initialized data and zero-initialized data are allocated consecutively.
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<br><dt><code>-sim2</code><dd><a name="index-sim2-1519"></a>Like <samp><span class="option">-sim</span></samp>, but pass linker options to locate initialized data at
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0x40000000 and zero-initialized data at 0x80000000.
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</dl>
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