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84 lines
3.4 KiB
C
84 lines
3.4 KiB
C
#ifndef _CLOCKS_H_
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#define _CLOCKS_H_
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#include "core.h"
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// XOSC32K Definitions
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#define CORE_CONF_CLK_XOSC32KCTRL_CGM_LP_MODE (0x0)
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#define CORE_CONF_CLK_XOSC32KCTRL_CGM_STD_MODE (0x1)
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#define CORE_CONF_CLK_XOSC32KCTRL_CGM_HS_MODE (0x2)
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#define CORE_CONF_CLK_XOSC32KCTRL_STARTUP_62592us (0x0)
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#define CORE_CONF_CLK_XOSC32KCTRL_STARTUP_125092us (0x1)
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#define CORE_CONF_CLK_XOSC32KCTRL_STARTUP_500092us (0x2)
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#define CORE_CONF_CLK_XOSC32KCTRL_STARTUP_1000009200ns (0x3)
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#define CORE_CONF_CLK_XOSC32KCTRL_STARTUP_2000009200ns (0x4)
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#define CORE_CONF_CLK_XOSC32KCTRL_STARTUP_4000009200ns (0x5)
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#define CORE_CONF_CLK_XOSC32KCTRL_STARTUP_8000009200ns (0x6)
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// XOSCx Definitions
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#define CORE_CONF_CLK_XOSCCTRL_STARTUP_31us 0x0
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#define CORE_CONF_CLK_XOSCCTRL_STARTUP_61us 0x1
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#define CORE_CONF_CLK_XOSCCTRL_STARTUP_122us 0x2
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#define CORE_CONF_CLK_XOSCCTRL_STARTUP_244us 0x3
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#define CORE_CONF_CLK_XOSCCTRL_STARTUP_488us 0x4
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#define CORE_CONF_CLK_XOSCCTRL_STARTUP_977us 0x5
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#define CORE_CONF_CLK_XOSCCTRL_STARTUP_1953us 0x6
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#define CORE_CONF_CLK_XOSCCTRL_STARTUP_3906us 0x7
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#define CORE_CONF_CLK_XOSCCTRL_STARTUP_7813us 0x8
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#define CORE_CONF_CLK_XOSCCTRL_STARTUP_15625us 0x9
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#define CORE_CONF_CLK_XOSCCTRL_STARTUP_31250us 0xA
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#define CORE_CONF_CLK_XOSCCTRL_STARTUP_62500us 0xB
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#define CORE_CONF_CLK_XOSCCTRL_STARTUP_125000us 0xC
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#define CORE_CONF_CLK_XOSCCTRL_STARTUP_250000us 0xD
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#define CORE_CONF_CLK_XOSCCTRL_STARTUP_500000us 0xE
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#define CORE_CONF_CLK_XOSCCTRL_STARTUP_1000000us 0xF
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// Oscillator Current Multiplier
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#define CORE_CONF_CLK_XOSCCTRL_IMULT_24MHZ_TO_48MHZ (6)
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#define CORE_CONF_CLK_XOSCCTRL_IMULT_16MHZ_TO_24MHZ (5)
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#define CORE_CONF_CLK_XOSCCTRL_IMULT_8MHZ_TO_16MHZ (4)
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#define CORE_CONF_CLK_XOSCCTRL_IMULT_8MHZ (3)
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// Oscillator Current Reference
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#define CORE_CONF_CLK_XOSCCTRL_IPTAT_24MHZ_TO_48MHZ (3)
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#define CORE_CONF_CLK_XOSCCTRL_IPTAT_16MHZ_TO_24MHZ (3)
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#define CORE_CONF_CLK_XOSCCTRL_IPTAT_8MHZ_TO_16MHZ (3)
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#define CORE_CONF_CLK_XOSCCTRL_IPTAT_8MHZ (2)
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// DFLL Definitions
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#define CORE_CONF_CLK_DFLLCTRL_STABLE_FCALIB_NOT_FIXED (0)
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#define CORE_CONF_CLK_DFLLCTRL_STABLE_FCALIB_FIXED (1)
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#define CORE_CONF_CLK_DFLLCTRL_MODE_CLOSED_LOOP (1)
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#define CORE_CONF_CLK_DFLLCTRL_MODE_OPEN_LOOP (0)
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// DPLL Definitions
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#define CORE_CONF_CLK_DPLLCTRL_DCOFILTER_3210KHZ (0x0)
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#define CORE_CONF_CLK_DPLLCTRL_DCOFILTER_1600KHZ (0x1)
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#define CORE_CONF_CLK_DPLLCTRL_DCOFILTER_1100KHZ (0x2)
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#define CORE_CONF_CLK_DPLLCTRL_DCOFILTER_800KHZ (0x3)
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#define CORE_CONF_CLK_DPLLCTRL_DCOFILTER_640KHZ (0x4)
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#define CORE_CONF_CLK_DPLLCTRL_DCOFILTER_550KHZ (0x5)
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#define CORE_CONF_CLK_DPLLCTRL_DCOFILTER_450KHZ (0x6)
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#define CORE_CONF_CLK_DPLLCTRL_DCOFILTER_400KHZ (0x7)
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#define CORE_CONF_CLK_DPLLCTRL_LTIME_TIMEOUT_NONE (0x0)
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#define CORE_CONF_CLK_DPLLCTRL_LTIME_TIMEOUT_800us (0x4)
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#define CORE_CONF_CLK_DPLLCTRL_LTIME_TIMEOUT_900us (0x5)
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#define CORE_CONF_CLK_DPLLCTRL_LTIME_TIMEOUT_1000us (0x6)
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#define CORE_CONF_CLK_DPLLCTRL_LTIME_TIMEOUT_1100us (0x7)
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#define CORE_CONF_CLK_DPLLCTRL_REFCLK_GCLK (0x0)
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#define CORE_CONF_CLK_DPLLCTRL_REFCLK_XOSC32 (0x1)
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#define CORE_CONF_CLK_DPLLCTRL_REFCLK_XOSC0 (0x2)
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#define CORE_CONF_CLK_DPLLCTRL_REFCLK_XOSC1 (0x3)
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void clock_osc32k_init(void);
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void clock_osc_init(void);
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void clock_mclk_init(void);
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void clock_gclk_init(void);
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void clock_dpll_init(void);
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void clock_dfll_init(void);
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#endif
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