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<h4 class="subsection">15.8.7 SIMD Instructions</h4>
<a name="index-Assembly-SIMD"></a>
<p>The single-instruction multiple-data support in current microprocessors is
aimed at signal processing algorithms where each data point can be treated
more or less independently. There&rsquo;s generally not much support for
propagating the sort of carries that arise in GMP.
</p>
<p>SIMD multiplications of say four 16x16 bit multiplies only do as much
work as one 32x32 from GMP&rsquo;s point of view, and need some shifts and
adds besides. But of course if say the SIMD form is fully pipelined and uses
less instruction decoding then it may still be worthwhile.
</p>
<p>On the x86 chips, MMX has so far found a use in <code>mpn_rshift</code> and
<code>mpn_lshift</code>, and is used in a special case for 16-bit multipliers in the
P55 <code>mpn_mul_1</code>. SSE2 is used for Pentium 4 <code>mpn_mul_1</code>,
<code>mpn_addmul_1</code>, and <code>mpn_submul_1</code>.
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