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96 lines
4.6 KiB
HTML
96 lines
4.6 KiB
HTML
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<head>
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<title>NDS32 Features (Debugging with GDB)</title>
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<link href="Concept-Index.html#Concept-Index" rel="index" title="Concept Index">
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<link href="index.html#SEC_Contents" rel="contents" title="Table of Contents">
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<link href="Standard-Target-Features.html#Standard-Target-Features" rel="up" title="Standard Target Features">
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<link href="Nios-II-Features.html#Nios-II-Features" rel="next" title="Nios II Features">
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<a name="NDS32-Features"></a>
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<div class="header">
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<p>
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Next: <a href="Nios-II-Features.html#Nios-II-Features" accesskey="n" rel="next">Nios II Features</a>, Previous: <a href="M68K-Features.html#M68K-Features" accesskey="p" rel="prev">M68K Features</a>, Up: <a href="Standard-Target-Features.html#Standard-Target-Features" accesskey="u" rel="up">Standard Target Features</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Concept-Index.html#Concept-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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<hr>
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<a name="NDS32-Features-1"></a>
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<h4 class="subsection">G.5.8 NDS32 Features</h4>
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<a name="index-target-descriptions_002c-NDS32-features"></a>
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<p>The ‘<samp>org.gnu.gdb.nds32.core</samp>’ feature is required for NDS32
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targets. It should contain at least registers ‘<samp>r0</samp>’ through
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‘<samp>r10</samp>’, ‘<samp>r15</samp>’, ‘<samp>fp</samp>’, ‘<samp>gp</samp>’, ‘<samp>lp</samp>’, ‘<samp>sp</samp>’,
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and ‘<samp>pc</samp>’.
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</p>
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<p>The ‘<samp>org.gnu.gdb.nds32.fpu</samp>’ feature is optional. If present,
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it should contain 64-bit double-precision floating-point registers
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‘<samp>fd0</samp>’ through <em>fdN</em>, which should be ‘<samp>fd3</samp>’, ‘<samp>fd7</samp>’,
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‘<samp>fd15</samp>’, or ‘<samp>fd31</samp>’ based on the FPU configuration implemented.
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</p>
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<p><em>Note:</em> The first sixteen 64-bit double-precision floating-point
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registers are overlapped with the thirty-two 32-bit single-precision
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floating-point registers. The 32-bit single-precision registers, if
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not being listed explicitly, will be synthesized from halves of the
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overlapping 64-bit double-precision registers. Listing 32-bit
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single-precision registers explicitly is deprecated, and the
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support to it could be totally removed some day.
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</p>
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</html>
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