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195 lines
8.6 KiB
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<head>
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<title>RL78 Options (Using the GNU Compiler Collection (GCC))</title>
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<link href="index.html#Top" rel="start" title="Top">
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<link href="Option-Index.html#Option-Index" rel="index" title="Option Index">
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<link href="index.html#SEC_Contents" rel="contents" title="Table of Contents">
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<link href="Submodel-Options.html#Submodel-Options" rel="up" title="Submodel Options">
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<link href="RS_002f6000-and-PowerPC-Options.html#RS_002f6000-and-PowerPC-Options" rel="next" title="RS/6000 and PowerPC Options">
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<link href="RISC_002dV-Options.html#RISC_002dV-Options" rel="prev" title="RISC-V Options">
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</head>
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<a name="RL78-Options"></a>
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<div class="header">
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<p>
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Next: <a href="RS_002f6000-and-PowerPC-Options.html#RS_002f6000-and-PowerPC-Options" accesskey="n" rel="next">RS/6000 and PowerPC Options</a>, Previous: <a href="RISC_002dV-Options.html#RISC_002dV-Options" accesskey="p" rel="prev">RISC-V Options</a>, Up: <a href="Submodel-Options.html#Submodel-Options" accesskey="u" rel="up">Submodel Options</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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<hr>
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<a name="RL78-Options-1"></a>
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<h4 class="subsection">3.18.39 RL78 Options</h4>
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<a name="index-RL78-Options"></a>
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<dl compact="compact">
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<dt><code>-msim</code></dt>
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<dd><a name="index-msim-8"></a>
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<p>Links in additional target libraries to support operation within a
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simulator.
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</p>
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</dd>
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<dt><code>-mmul=none</code></dt>
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<dt><code>-mmul=g10</code></dt>
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<dt><code>-mmul=g13</code></dt>
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<dt><code>-mmul=g14</code></dt>
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<dt><code>-mmul=rl78</code></dt>
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<dd><a name="index-mmul"></a>
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<p>Specifies the type of hardware multiplication and division support to
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be used. The simplest is <code>none</code>, which uses software for both
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multiplication and division. This is the default. The <code>g13</code>
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value is for the hardware multiply/divide peripheral found on the
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RL78/G13 (S2 core) targets. The <code>g14</code> value selects the use of
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the multiplication and division instructions supported by the RL78/G14
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(S3 core) parts. The value <code>rl78</code> is an alias for <code>g14</code> and
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the value <code>mg10</code> is an alias for <code>none</code>.
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</p>
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<p>In addition a C preprocessor macro is defined, based upon the setting
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of this option. Possible values are: <code>__RL78_MUL_NONE__</code>,
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<code>__RL78_MUL_G13__</code> or <code>__RL78_MUL_G14__</code>.
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</p>
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</dd>
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<dt><code>-mcpu=g10</code></dt>
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<dt><code>-mcpu=g13</code></dt>
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<dt><code>-mcpu=g14</code></dt>
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<dt><code>-mcpu=rl78</code></dt>
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<dd><a name="index-mcpu-9"></a>
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<p>Specifies the RL78 core to target. The default is the G14 core, also
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known as an S3 core or just RL78. The G13 or S2 core does not have
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multiply or divide instructions, instead it uses a hardware peripheral
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for these operations. The G10 or S1 core does not have register
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banks, so it uses a different calling convention.
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</p>
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<p>If this option is set it also selects the type of hardware multiply
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support to use, unless this is overridden by an explicit
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<samp>-mmul=none</samp> option on the command line. Thus specifying
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<samp>-mcpu=g13</samp> enables the use of the G13 hardware multiply
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peripheral and specifying <samp>-mcpu=g10</samp> disables the use of
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hardware multiplications altogether.
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</p>
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<p>Note, although the RL78/G14 core is the default target, specifying
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<samp>-mcpu=g14</samp> or <samp>-mcpu=rl78</samp> on the command line does
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change the behavior of the toolchain since it also enables G14
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hardware multiply support. If these options are not specified on the
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command line then software multiplication routines will be used even
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though the code targets the RL78 core. This is for backwards
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compatibility with older toolchains which did not have hardware
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multiply and divide support.
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</p>
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<p>In addition a C preprocessor macro is defined, based upon the setting
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of this option. Possible values are: <code>__RL78_G10__</code>,
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<code>__RL78_G13__</code> or <code>__RL78_G14__</code>.
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</p>
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</dd>
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<dt><code>-mg10</code></dt>
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<dt><code>-mg13</code></dt>
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<dt><code>-mg14</code></dt>
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<dt><code>-mrl78</code></dt>
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<dd><a name="index-mg10"></a>
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<a name="index-mg13"></a>
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<a name="index-mg14"></a>
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<a name="index-mrl78"></a>
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<p>These are aliases for the corresponding <samp>-mcpu=</samp> option. They
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are provided for backwards compatibility.
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</p>
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</dd>
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<dt><code>-mallregs</code></dt>
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<dd><a name="index-mallregs"></a>
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<p>Allow the compiler to use all of the available registers. By default
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registers <code>r24..r31</code> are reserved for use in interrupt handlers.
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With this option enabled these registers can be used in ordinary
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functions as well.
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</p>
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</dd>
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<dt><code>-m64bit-doubles</code></dt>
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<dt><code>-m32bit-doubles</code></dt>
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<dd><a name="index-m64bit_002ddoubles"></a>
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<a name="index-m32bit_002ddoubles"></a>
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<p>Make the <code>double</code> data type be 64 bits (<samp>-m64bit-doubles</samp>)
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or 32 bits (<samp>-m32bit-doubles</samp>) in size. The default is
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<samp>-m32bit-doubles</samp>.
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</p>
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</dd>
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<dt><code>-msave-mduc-in-interrupts</code></dt>
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<dt><code>-mno-save-mduc-in-interrupts</code></dt>
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<dd><a name="index-msave_002dmduc_002din_002dinterrupts"></a>
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<a name="index-mno_002dsave_002dmduc_002din_002dinterrupts"></a>
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<p>Specifies that interrupt handler functions should preserve the
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MDUC registers. This is only necessary if normal code might use
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the MDUC registers, for example because it performs multiplication
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and division operations. The default is to ignore the MDUC registers
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as this makes the interrupt handlers faster. The target option -mg13
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needs to be passed for this to work as this feature is only available
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on the G13 target (S2 core). The MDUC registers will only be saved
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if the interrupt handler performs a multiplication or division
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operation or it calls another function.
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</p>
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</dd>
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</dl>
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<hr>
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<div class="header">
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<p>
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Next: <a href="RS_002f6000-and-PowerPC-Options.html#RS_002f6000-and-PowerPC-Options" accesskey="n" rel="next">RS/6000 and PowerPC Options</a>, Previous: <a href="RISC_002dV-Options.html#RISC_002dV-Options" accesskey="p" rel="prev">RISC-V Options</a>, Up: <a href="Submodel-Options.html#Submodel-Options" accesskey="u" rel="up">Submodel Options</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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</body>
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