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230 lines
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230 lines
9.5 KiB
HTML
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<!-- Created by GNU Texinfo 6.4, http://www.gnu.org/software/texinfo/ -->
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<head>
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<title>CRIS Options (Using the GNU Compiler Collection (GCC))</title>
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<meta name="description" content="CRIS Options (Using the GNU Compiler Collection (GCC))">
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<link href="index.html#Top" rel="start" title="Top">
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<link href="Option-Index.html#Option-Index" rel="index" title="Option Index">
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<link href="index.html#SEC_Contents" rel="contents" title="Table of Contents">
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<link href="Submodel-Options.html#Submodel-Options" rel="up" title="Submodel Options">
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<link href="CR16-Options.html#CR16-Options" rel="next" title="CR16 Options">
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<link href="C6X-Options.html#C6X-Options" rel="prev" title="C6X Options">
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</head>
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<body lang="en">
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<a name="CRIS-Options"></a>
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<div class="header">
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<p>
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Next: <a href="CR16-Options.html#CR16-Options" accesskey="n" rel="next">CR16 Options</a>, Previous: <a href="C6X-Options.html#C6X-Options" accesskey="p" rel="prev">C6X Options</a>, Up: <a href="Submodel-Options.html#Submodel-Options" accesskey="u" rel="up">Submodel Options</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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<hr>
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<a name="CRIS-Options-1"></a>
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<h4 class="subsection">3.18.8 CRIS Options</h4>
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<a name="index-CRIS-Options"></a>
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<p>These options are defined specifically for the CRIS ports.
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</p>
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<dl compact="compact">
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<dt><code>-march=<var>architecture-type</var></code></dt>
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<dt><code>-mcpu=<var>architecture-type</var></code></dt>
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<dd><a name="index-march-3"></a>
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<a name="index-mcpu-3"></a>
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<p>Generate code for the specified architecture. The choices for
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<var>architecture-type</var> are ‘<samp>v3</samp>’, ‘<samp>v8</samp>’ and ‘<samp>v10</samp>’ for
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respectively ETRAX <!-- /@w -->4, ETRAX <!-- /@w -->100, and ETRAX <!-- /@w -->100 <!-- /@w -->LX.
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Default is ‘<samp>v0</samp>’ except for cris-axis-linux-gnu, where the default is
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‘<samp>v10</samp>’.
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</p>
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</dd>
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<dt><code>-mtune=<var>architecture-type</var></code></dt>
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<dd><a name="index-mtune-4"></a>
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<p>Tune to <var>architecture-type</var> everything applicable about the generated
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code, except for the ABI and the set of available instructions. The
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choices for <var>architecture-type</var> are the same as for
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<samp>-march=<var>architecture-type</var></samp>.
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</p>
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</dd>
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<dt><code>-mmax-stack-frame=<var>n</var></code></dt>
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<dd><a name="index-mmax_002dstack_002dframe"></a>
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<p>Warn when the stack frame of a function exceeds <var>n</var> bytes.
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</p>
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</dd>
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<dt><code>-metrax4</code></dt>
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<dt><code>-metrax100</code></dt>
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<dd><a name="index-metrax4"></a>
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<a name="index-metrax100"></a>
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<p>The options <samp>-metrax4</samp> and <samp>-metrax100</samp> are synonyms for
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<samp>-march=v3</samp> and <samp>-march=v8</samp> respectively.
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</p>
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</dd>
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<dt><code>-mmul-bug-workaround</code></dt>
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<dt><code>-mno-mul-bug-workaround</code></dt>
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<dd><a name="index-mmul_002dbug_002dworkaround"></a>
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<a name="index-mno_002dmul_002dbug_002dworkaround"></a>
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<p>Work around a bug in the <code>muls</code> and <code>mulu</code> instructions for CPU
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models where it applies. This option is active by default.
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</p>
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</dd>
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<dt><code>-mpdebug</code></dt>
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<dd><a name="index-mpdebug"></a>
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<p>Enable CRIS-specific verbose debug-related information in the assembly
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code. This option also has the effect of turning off the ‘<samp>#NO_APP</samp>’
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formatted-code indicator to the assembler at the beginning of the
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assembly file.
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</p>
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</dd>
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<dt><code>-mcc-init</code></dt>
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<dd><a name="index-mcc_002dinit"></a>
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<p>Do not use condition-code results from previous instruction; always emit
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compare and test instructions before use of condition codes.
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</p>
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</dd>
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<dt><code>-mno-side-effects</code></dt>
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<dd><a name="index-mno_002dside_002deffects"></a>
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<p>Do not emit instructions with side effects in addressing modes other than
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post-increment.
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</p>
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</dd>
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<dt><code>-mstack-align</code></dt>
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<dt><code>-mno-stack-align</code></dt>
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<dt><code>-mdata-align</code></dt>
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<dt><code>-mno-data-align</code></dt>
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<dt><code>-mconst-align</code></dt>
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<dt><code>-mno-const-align</code></dt>
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<dd><a name="index-mstack_002dalign"></a>
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<a name="index-mno_002dstack_002dalign"></a>
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<a name="index-mdata_002dalign"></a>
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<a name="index-mno_002ddata_002dalign"></a>
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<a name="index-mconst_002dalign"></a>
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<a name="index-mno_002dconst_002dalign"></a>
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<p>These options (‘<samp>no-</samp>’ options) arrange (eliminate arrangements) for the
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stack frame, individual data and constants to be aligned for the maximum
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single data access size for the chosen CPU model. The default is to
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arrange for 32-bit alignment. ABI details such as structure layout are
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not affected by these options.
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</p>
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</dd>
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<dt><code>-m32-bit</code></dt>
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<dt><code>-m16-bit</code></dt>
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<dt><code>-m8-bit</code></dt>
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<dd><a name="index-m32_002dbit"></a>
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<a name="index-m16_002dbit"></a>
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<a name="index-m8_002dbit"></a>
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<p>Similar to the stack- data- and const-align options above, these options
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arrange for stack frame, writable data and constants to all be 32-bit,
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16-bit or 8-bit aligned. The default is 32-bit alignment.
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</p>
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</dd>
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<dt><code>-mno-prologue-epilogue</code></dt>
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<dt><code>-mprologue-epilogue</code></dt>
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<dd><a name="index-mno_002dprologue_002depilogue"></a>
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<a name="index-mprologue_002depilogue"></a>
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<p>With <samp>-mno-prologue-epilogue</samp>, the normal function prologue and
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epilogue which set up the stack frame are omitted and no return
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instructions or return sequences are generated in the code. Use this
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option only together with visual inspection of the compiled code: no
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warnings or errors are generated when call-saved registers must be saved,
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or storage for local variables needs to be allocated.
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</p>
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</dd>
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<dt><code>-mno-gotplt</code></dt>
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<dt><code>-mgotplt</code></dt>
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<dd><a name="index-mno_002dgotplt"></a>
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<a name="index-mgotplt"></a>
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<p>With <samp>-fpic</samp> and <samp>-fPIC</samp>, don’t generate (do generate)
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instruction sequences that load addresses for functions from the PLT part
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of the GOT rather than (traditional on other architectures) calls to the
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PLT. The default is <samp>-mgotplt</samp>.
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</p>
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</dd>
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<dt><code>-melf</code></dt>
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<dd><a name="index-melf"></a>
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<p>Legacy no-op option only recognized with the cris-axis-elf and
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cris-axis-linux-gnu targets.
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</p>
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</dd>
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<dt><code>-mlinux</code></dt>
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<dd><a name="index-mlinux"></a>
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<p>Legacy no-op option only recognized with the cris-axis-linux-gnu target.
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</p>
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</dd>
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<dt><code>-sim</code></dt>
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<dd><a name="index-sim"></a>
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<p>This option, recognized for the cris-axis-elf, arranges
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to link with input-output functions from a simulator library. Code,
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initialized data and zero-initialized data are allocated consecutively.
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</p>
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</dd>
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<dt><code>-sim2</code></dt>
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<dd><a name="index-sim2"></a>
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<p>Like <samp>-sim</samp>, but pass linker options to locate initialized data at
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0x40000000 and zero-initialized data at 0x80000000.
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</p></dd>
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</dl>
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<hr>
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<div class="header">
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<p>
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Next: <a href="CR16-Options.html#CR16-Options" accesskey="n" rel="next">CR16 Options</a>, Previous: <a href="C6X-Options.html#C6X-Options" accesskey="p" rel="prev">C6X Options</a>, Up: <a href="Submodel-Options.html#Submodel-Options" accesskey="u" rel="up">Submodel Options</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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</body>
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</html>
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