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120 lines
5.2 KiB
HTML
120 lines
5.2 KiB
HTML
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<head>
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<title>RISC-V-ATTRIBUTE (Using as)</title>
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<meta name="description" content="RISC-V-ATTRIBUTE (Using as)">
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<link href="AS-Index.html#AS-Index" rel="index" title="AS Index">
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<link href="index.html#SEC_Contents" rel="contents" title="Table of Contents">
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<link href="RISC_002dV_002dDependent.html#RISC_002dV_002dDependent" rel="up" title="RISC-V-Dependent">
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<link href="RL78_002dDependent.html#RL78_002dDependent" rel="next" title="RL78-Dependent">
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<a name="RISC_002dV_002dATTRIBUTE"></a>
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<div class="header">
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<p>
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Previous: <a href="RISC_002dV_002dFormats.html#RISC_002dV_002dFormats" accesskey="p" rel="prev">RISC-V-Formats</a>, Up: <a href="RISC_002dV_002dDependent.html#RISC_002dV_002dDependent" accesskey="u" rel="up">RISC-V-Dependent</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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<hr>
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<a name="RISC_002dV-Object-Attribute"></a>
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<h4 class="subsection">9.37.4 RISC-V Object Attribute</h4>
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<a name="index-Object-Attribute_002c-RISC_002dV"></a>
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<p>RISC-V attributes have a string value if the tag number is odd and an integer
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value if the tag number is even.
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</p>
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<dl compact="compact">
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<dt><span class="roman">Tag_RISCV_stack_align (4)</span></dt>
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<dd><p>Tag_RISCV_strict_align records the N-byte stack alignment for this object. The
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default value is 16 for RV32I or RV64I, and 4 for RV32E.
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</p>
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<p>The smallest value will be used if object files with different
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Tag_RISCV_stack_align values are merged.
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</p>
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</dd>
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<dt><span class="roman">Tag_RISCV_arch (5)</span></dt>
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<dd><p>Tag_RISCV_arch contains a string for the target architecture taken from the
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option <samp>-march</samp>. Different architectures will be integrated into a
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superset when object files are merged.
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</p>
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<p>Note that the version information of the target architecture must be presented
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explicitly in the attribute and abbreviations must be expanded. The version
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information, if not given by <samp>-march</samp>, must be in accordance with the
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default specified by the tool. For example, the architecture <code>RV32I</code> has
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to be recorded in the attribute as <code>RV32I2P0</code> in which <code>2P0</code> stands
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for the default version of its base ISA. On the other hand, the architecture
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<code>RV32G</code> has to be presented as <code>RV32I2P0_M2P0_A2P0_F2P0_D2P0</code> in
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which the abbreviation <code>G</code> is expanded to the <code>IMAFD</code> combination
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with default versions of the standard extensions.
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</p>
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</dd>
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<dt><span class="roman">Tag_RISCV_unaligned_access (6)</span></dt>
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<dd><p>Tag_RISCV_unaligned_access is 0 for files that do not allow any unaligned
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memory accesses, and 1 for files that do allow unaligned memory accesses.
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</p>
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</dd>
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<dt><span class="roman">Tag_RISCV_priv_spec (8)</span></dt>
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<dt><span class="roman">Tag_RISCV_priv_spec_minor (10)</span></dt>
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<dt><span class="roman">Tag_RISCV_priv_spec_revision (12)</span></dt>
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<dd><p>Tag_RISCV_priv_spec contains the major/minor/revision version information of
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the privileged specification. It will report errors if object files of
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different privileged specification versions are merged.
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</p>
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</dd>
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</dl>
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</body>
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</html>
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