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<title>M68K-Opts (Using as)</title>
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<link href="AS-Index.html#AS-Index" rel="index" title="AS Index">
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<link href="index.html#SEC_Contents" rel="contents" title="Table of Contents">
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<link href="M68K_002dDependent.html#M68K_002dDependent" rel="up" title="M68K-Dependent">
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<link href="M68K_002dSyntax.html#M68K_002dSyntax" rel="next" title="M68K-Syntax">
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</head>
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<body lang="en">
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<a name="M68K_002dOpts"></a>
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<div class="header">
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<p>
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Next: <a href="M68K_002dSyntax.html#M68K_002dSyntax" accesskey="n" rel="next">M68K-Syntax</a>, Up: <a href="M68K_002dDependent.html#M68K_002dDependent" accesskey="u" rel="up">M68K-Dependent</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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<hr>
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<a name="M680x0-Options"></a>
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<h4 class="subsection">9.21.1 M680x0 Options</h4>
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<a name="index-options_002c-M680x0"></a>
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<a name="index-M680x0-options"></a>
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<p>The Motorola 680x0 version of <code>as</code> has a few machine
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dependent options:
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</p>
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<dl compact="compact">
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<dd>
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<a name="index-_002dmarch_003d-command_002dline-option_002c-M680x0"></a>
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</dd>
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<dt>‘<samp>-march=<var>architecture</var></samp>’</dt>
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<dd><p>This option specifies a target architecture. The following
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architectures are recognized:
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<code>68000</code>,
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<code>68010</code>,
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<code>68020</code>,
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<code>68030</code>,
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<code>68040</code>,
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<code>68060</code>,
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<code>cpu32</code>,
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<code>isaa</code>,
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<code>isaaplus</code>,
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<code>isab</code>,
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<code>isac</code> and
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<code>cfv4e</code>.
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</p>
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<a name="index-_002dmcpu_003d-command_002dline-option_002c-M680x0"></a>
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</dd>
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<dt>‘<samp>-mcpu=<var>cpu</var></samp>’</dt>
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<dd><p>This option specifies a target cpu. When used in conjunction with the
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<samp>-march</samp> option, the cpu must be within the specified
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architecture. Also, the generic features of the architecture are used
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for instruction generation, rather than those of the specific chip.
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</p>
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<a name="index-_002dm_005bno_002d_005d68851-command_002dline-option_002c-M680x0"></a>
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<a name="index-_002dm_005bno_002d_005d68881-command_002dline-option_002c-M680x0"></a>
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<a name="index-_002dm_005bno_002d_005ddiv-command_002dline-option_002c-M680x0"></a>
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<a name="index-_002dm_005bno_002d_005dusp-command_002dline-option_002c-M680x0"></a>
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<a name="index-_002dm_005bno_002d_005dfloat-command_002dline-option_002c-M680x0"></a>
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<a name="index-_002dm_005bno_002d_005dmac-command_002dline-option_002c-M680x0"></a>
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<a name="index-_002dm_005bno_002d_005demac-command_002dline-option_002c-M680x0"></a>
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</dd>
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<dt>‘<samp>-m[no-]68851</samp>’</dt>
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<dt>‘<samp>-m[no-]68881</samp>’</dt>
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<dt>‘<samp>-m[no-]div</samp>’</dt>
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<dt>‘<samp>-m[no-]usp</samp>’</dt>
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<dt>‘<samp>-m[no-]float</samp>’</dt>
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<dt>‘<samp>-m[no-]mac</samp>’</dt>
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<dt>‘<samp>-m[no-]emac</samp>’</dt>
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<dd>
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<p>Enable or disable various architecture specific features. If a chip
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or architecture by default supports an option (for instance
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<samp>-march=isaaplus</samp> includes the <samp>-mdiv</samp> option),
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explicitly disabling the option will override the default.
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</p>
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<a name="index-_002dl-option_002c-M680x0"></a>
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</dd>
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<dt>‘<samp>-l</samp>’</dt>
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<dd><p>You can use the ‘<samp>-l</samp>’ option to shorten the size of references to undefined
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symbols. If you do not use the ‘<samp>-l</samp>’ option, references to undefined
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symbols are wide enough for a full <code>long</code> (32 bits). (Since
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<code>as</code> cannot know where these symbols end up, <code>as</code> can
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only allocate space for the linker to fill in later. Since <code>as</code>
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does not know how far away these symbols are, it allocates as much space as it
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can.) If you use this option, the references are only one word wide (16 bits).
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This may be useful if you want the object file to be as small as possible, and
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you know that the relevant symbols are always less than 17 bits away.
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</p>
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<a name="index-_002d_002dregister_002dprefix_002doptional-option_002c-M680x0"></a>
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</dd>
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<dt>‘<samp>--register-prefix-optional</samp>’</dt>
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<dd><p>For some configurations, especially those where the compiler normally
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does not prepend an underscore to the names of user variables, the
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assembler requires a ‘<samp>%</samp>’ before any use of a register name. This
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is intended to let the assembler distinguish between C variables and
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functions named ‘<samp>a0</samp>’ through ‘<samp>a7</samp>’, and so on. The ‘<samp>%</samp>’ is
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always accepted, but is not required for certain configurations, notably
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‘<samp>sun3</samp>’. The ‘<samp>--register-prefix-optional</samp>’ option may be used
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to permit omitting the ‘<samp>%</samp>’ even for configurations for which it is
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normally required. If this is done, it will generally be impossible to
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refer to C variables and functions with the same names as register
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names.
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</p>
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<a name="index-_002d_002dbitwise_002dor-option_002c-M680x0"></a>
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</dd>
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<dt>‘<samp>--bitwise-or</samp>’</dt>
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<dd><p>Normally the character ‘<samp>|</samp>’ is treated as a comment character, which
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means that it can not be used in expressions. The ‘<samp>--bitwise-or</samp>’
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option turns ‘<samp>|</samp>’ into a normal character. In this mode, you must
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either use C style comments, or start comments with a ‘<samp>#</samp>’ character
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at the beginning of a line.
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</p>
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<a name="index-_002d_002dbase_002dsize_002ddefault_002d16"></a>
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<a name="index-_002d_002dbase_002dsize_002ddefault_002d32"></a>
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</dd>
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<dt>‘<samp>--base-size-default-16 --base-size-default-32</samp>’</dt>
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<dd><p>If you use an addressing mode with a base register without specifying
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the size, <code>as</code> will normally use the full 32 bit value.
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For example, the addressing mode ‘<samp>%a0@(%d0)</samp>’ is equivalent to
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‘<samp>%a0@(%d0:l)</samp>’. You may use the ‘<samp>--base-size-default-16</samp>’
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option to tell <code>as</code> to default to using the 16 bit value.
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In this case, ‘<samp>%a0@(%d0)</samp>’ is equivalent to ‘<samp>%a0@(%d0:w)</samp>’.
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You may use the ‘<samp>--base-size-default-32</samp>’ option to restore the
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default behaviour.
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</p>
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<a name="index-_002d_002ddisp_002dsize_002ddefault_002d16"></a>
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<a name="index-_002d_002ddisp_002dsize_002ddefault_002d32"></a>
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</dd>
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<dt>‘<samp>--disp-size-default-16 --disp-size-default-32</samp>’</dt>
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<dd><p>If you use an addressing mode with a displacement, and the value of the
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displacement is not known, <code>as</code> will normally assume that
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the value is 32 bits. For example, if the symbol ‘<samp>disp</samp>’ has not
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been defined, <code>as</code> will assemble the addressing mode
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‘<samp>%a0@(disp,%d0)</samp>’ as though ‘<samp>disp</samp>’ is a 32 bit value. You may
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use the ‘<samp>--disp-size-default-16</samp>’ option to tell <code>as</code>
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to instead assume that the displacement is 16 bits. In this case,
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<code>as</code> will assemble ‘<samp>%a0@(disp,%d0)</samp>’ as though
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‘<samp>disp</samp>’ is a 16 bit value. You may use the
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‘<samp>--disp-size-default-32</samp>’ option to restore the default behaviour.
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</p>
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<a name="index-_002d_002dpcrel"></a>
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</dd>
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<dt>‘<samp>--pcrel</samp>’</dt>
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<dd><p>Always keep branches PC-relative. In the M680x0 architecture all branches
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are defined as PC-relative. However, on some processors they are limited
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to word displacements maximum. When <code>as</code> needs a long branch
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that is not available, it normally emits an absolute jump instead. This
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option disables this substitution. When this option is given and no long
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branches are available, only word branches will be emitted. An error
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message will be generated if a word branch cannot reach its target. This
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option has no effect on 68020 and other processors that have long branches.
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see <a href="M68K_002dBranch.html#M68K_002dBranch">Branch Improvement</a>.
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</p>
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<a name="index-_002dm68000-and-related-options"></a>
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<a name="index-architecture-options_002c-M680x0"></a>
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<a name="index-M680x0-architecture-options"></a>
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</dd>
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<dt>‘<samp>-m68000</samp>’</dt>
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<dd><p><code>as</code> can assemble code for several different members of the
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Motorola 680x0 family. The default depends upon how <code>as</code>
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was configured when it was built; normally, the default is to assemble
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code for the 68020 microprocessor. The following options may be used to
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change the default. These options control which instructions and
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addressing modes are permitted. The members of the 680x0 family are
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very similar. For detailed information about the differences, see the
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Motorola manuals.
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</p>
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<dl compact="compact">
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<dt>‘<samp>-m68000</samp>’</dt>
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<dt>‘<samp>-m68ec000</samp>’</dt>
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<dt>‘<samp>-m68hc000</samp>’</dt>
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<dt>‘<samp>-m68hc001</samp>’</dt>
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<dt>‘<samp>-m68008</samp>’</dt>
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<dt>‘<samp>-m68302</samp>’</dt>
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<dt>‘<samp>-m68306</samp>’</dt>
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<dt>‘<samp>-m68307</samp>’</dt>
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<dt>‘<samp>-m68322</samp>’</dt>
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<dt>‘<samp>-m68356</samp>’</dt>
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<dd><p>Assemble for the 68000. ‘<samp>-m68008</samp>’, ‘<samp>-m68302</samp>’, and so on are synonyms
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for ‘<samp>-m68000</samp>’, since the chips are the same from the point of view
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of the assembler.
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</p>
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</dd>
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<dt>‘<samp>-m68010</samp>’</dt>
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<dd><p>Assemble for the 68010.
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</p>
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</dd>
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<dt>‘<samp>-m68020</samp>’</dt>
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<dt>‘<samp>-m68ec020</samp>’</dt>
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<dd><p>Assemble for the 68020. This is normally the default.
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</p>
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</dd>
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<dt>‘<samp>-m68030</samp>’</dt>
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<dt>‘<samp>-m68ec030</samp>’</dt>
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<dd><p>Assemble for the 68030.
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</p>
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</dd>
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<dt>‘<samp>-m68040</samp>’</dt>
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<dt>‘<samp>-m68ec040</samp>’</dt>
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<dd><p>Assemble for the 68040.
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</p>
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</dd>
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<dt>‘<samp>-m68060</samp>’</dt>
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<dt>‘<samp>-m68ec060</samp>’</dt>
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<dd><p>Assemble for the 68060.
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</p>
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</dd>
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<dt>‘<samp>-mcpu32</samp>’</dt>
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<dt>‘<samp>-m68330</samp>’</dt>
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<dt>‘<samp>-m68331</samp>’</dt>
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<dt>‘<samp>-m68332</samp>’</dt>
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<dt>‘<samp>-m68333</samp>’</dt>
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<dt>‘<samp>-m68334</samp>’</dt>
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<dt>‘<samp>-m68336</samp>’</dt>
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<dt>‘<samp>-m68340</samp>’</dt>
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<dt>‘<samp>-m68341</samp>’</dt>
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<dt>‘<samp>-m68349</samp>’</dt>
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<dt>‘<samp>-m68360</samp>’</dt>
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<dd><p>Assemble for the CPU32 family of chips.
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</p>
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</dd>
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<dt>‘<samp>-m5200</samp>’</dt>
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<dt>‘<samp>-m5202</samp>’</dt>
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<dt>‘<samp>-m5204</samp>’</dt>
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<dt>‘<samp>-m5206</samp>’</dt>
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<dt>‘<samp>-m5206e</samp>’</dt>
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<dt>‘<samp>-m521x</samp>’</dt>
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<dt>‘<samp>-m5249</samp>’</dt>
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<dt>‘<samp>-m528x</samp>’</dt>
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<dt>‘<samp>-m5307</samp>’</dt>
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<dt>‘<samp>-m5407</samp>’</dt>
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<dt>‘<samp>-m547x</samp>’</dt>
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<dt>‘<samp>-m548x</samp>’</dt>
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<dt>‘<samp>-mcfv4</samp>’</dt>
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<dt>‘<samp>-mcfv4e</samp>’</dt>
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<dd><p>Assemble for the ColdFire family of chips.
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</p>
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</dd>
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<dt>‘<samp>-m68881</samp>’</dt>
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<dt>‘<samp>-m68882</samp>’</dt>
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<dd><p>Assemble 68881 floating point instructions. This is the default for the
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68020, 68030, and the CPU32. The 68040 and 68060 always support
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floating point instructions.
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</p>
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</dd>
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<dt>‘<samp>-mno-68881</samp>’</dt>
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<dd><p>Do not assemble 68881 floating point instructions. This is the default
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for 68000 and the 68010. The 68040 and 68060 always support floating
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point instructions, even if this option is used.
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</p>
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</dd>
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<dt>‘<samp>-m68851</samp>’</dt>
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<dd><p>Assemble 68851 MMU instructions. This is the default for the 68020,
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68030, and 68060. The 68040 accepts a somewhat different set of MMU
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instructions; ‘<samp>-m68851</samp>’ and ‘<samp>-m68040</samp>’ should not be used
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together.
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</p>
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</dd>
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<dt>‘<samp>-mno-68851</samp>’</dt>
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<dd><p>Do not assemble 68851 MMU instructions. This is the default for the
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68000, 68010, and the CPU32. The 68040 accepts a somewhat different set
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of MMU instructions.
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</p></dd>
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</dl>
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</dd>
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</dl>
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|
|
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<hr>
|
|
<div class="header">
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|
<p>
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Next: <a href="M68K_002dSyntax.html#M68K_002dSyntax" accesskey="n" rel="next">M68K-Syntax</a>, Up: <a href="M68K_002dDependent.html#M68K_002dDependent" accesskey="u" rel="up">M68K-Dependent</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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</body>
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</html>
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