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<!-- This file documents the GNU Assembler "as".
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<title>M68K-Branch (Using as)</title>
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<link href="index.html#SEC_Contents" rel="contents" title="Table of Contents">
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<link href="M68K_002dopcodes.html#M68K_002dopcodes" rel="up" title="M68K-opcodes">
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<link href="M68K_002dChars.html#M68K_002dChars" rel="next" title="M68K-Chars">
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</head>
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<body lang="en">
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<a name="M68K_002dBranch"></a>
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<div class="header">
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<p>
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Next: <a href="M68K_002dChars.html#M68K_002dChars" accesskey="n" rel="next">M68K-Chars</a>, Up: <a href="M68K_002dopcodes.html#M68K_002dopcodes" accesskey="u" rel="up">M68K-opcodes</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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<hr>
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<a name="Branch-Improvement"></a>
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<h4 class="subsubsection">9.21.6.1 Branch Improvement</h4>
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<a name="index-pseudo_002dopcodes_002c-M680x0"></a>
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<a name="index-M680x0-pseudo_002dopcodes"></a>
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<a name="index-branch-improvement_002c-M680x0"></a>
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<a name="index-M680x0-branch-improvement"></a>
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<p>Certain pseudo opcodes are permitted for branch instructions.
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They expand to the shortest branch instruction that reach the
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target. Generally these mnemonics are made by substituting ‘<samp>j</samp>’ for
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‘<samp>b</samp>’ at the start of a Motorola mnemonic.
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</p>
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<p>The following table summarizes the pseudo-operations. A <code>*</code> flags
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cases that are more fully described after the table:
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</p>
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<div class="smallexample">
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<pre class="smallexample"> Displacement
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+------------------------------------------------------------
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| 68020 68000/10, not PC-relative OK
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Pseudo-Op |BYTE WORD LONG ABSOLUTE LONG JUMP **
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+------------------------------------------------------------
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jbsr |bsrs bsrw bsrl jsr
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jra |bras braw bral jmp
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* jXX |bXXs bXXw bXXl bNXs;jmp
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* dbXX | N/A dbXXw dbXX;bras;bral dbXX;bras;jmp
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fjXX | N/A fbXXw fbXXl N/A
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XX: condition
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NX: negative of condition XX
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</pre></div>
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<div align="center"><code>*</code>—see full description below
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</div><div align="center"><code>**</code>—this expansion mode is disallowed by ‘<samp>--pcrel</samp>’
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</div>
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<dl compact="compact">
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<dt><code>jbsr</code></dt>
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<dt><code>jra</code></dt>
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<dd><p>These are the simplest jump pseudo-operations; they always map to one
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particular machine instruction, depending on the displacement to the
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branch target. This instruction will be a byte or word branch is that
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is sufficient. Otherwise, a long branch will be emitted if available.
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If no long branches are available and the ‘<samp>--pcrel</samp>’ option is not
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given, an absolute long jump will be emitted instead. If no long
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branches are available, the ‘<samp>--pcrel</samp>’ option is given, and a word
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branch cannot reach the target, an error message is generated.
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</p>
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<p>In addition to standard branch operands, <code>as</code> allows these
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pseudo-operations to have all operands that are allowed for jsr and jmp,
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substituting these instructions if the operand given is not valid for a
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branch instruction.
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</p>
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</dd>
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<dt><code>j<var>XX</var></code></dt>
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<dd><p>Here, ‘<samp>j<var>XX</var></samp>’ stands for an entire family of pseudo-operations,
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where <var>XX</var> is a conditional branch or condition-code test. The full
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list of pseudo-ops in this family is:
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</p><div class="smallexample">
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<pre class="smallexample"> jhi jls jcc jcs jne jeq jvc
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jvs jpl jmi jge jlt jgt jle
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</pre></div>
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<p>Usually, each of these pseudo-operations expands to a single branch
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instruction. However, if a word branch is not sufficient, no long branches
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are available, and the ‘<samp>--pcrel</samp>’ option is not given, <code>as</code>
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issues a longer code fragment in terms of <var>NX</var>, the opposite condition
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to <var>XX</var>. For example, under these conditions:
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</p><div class="smallexample">
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<pre class="smallexample"> j<var>XX</var> foo
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</pre></div>
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<p>gives
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</p><div class="smallexample">
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<pre class="smallexample"> b<var>NX</var>s oof
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jmp foo
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oof:
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</pre></div>
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</dd>
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<dt><code>db<var>XX</var></code></dt>
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<dd><p>The full family of pseudo-operations covered here is
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</p><div class="smallexample">
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<pre class="smallexample"> dbhi dbls dbcc dbcs dbne dbeq dbvc
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dbvs dbpl dbmi dbge dblt dbgt dble
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dbf dbra dbt
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</pre></div>
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<p>Motorola ‘<samp>db<var>XX</var></samp>’ instructions allow word displacements only. When
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a word displacement is sufficient, each of these pseudo-operations expands
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to the corresponding Motorola instruction. When a word displacement is not
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sufficient and long branches are available, when the source reads
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‘<samp>db<var>XX</var> foo</samp>’, <code>as</code> emits
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</p><div class="smallexample">
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<pre class="smallexample"> db<var>XX</var> oo1
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bras oo2
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oo1:bral foo
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oo2:
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</pre></div>
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<p>If, however, long branches are not available and the ‘<samp>--pcrel</samp>’ option is
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not given, <code>as</code> emits
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</p><div class="smallexample">
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<pre class="smallexample"> db<var>XX</var> oo1
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bras oo2
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oo1:jmp foo
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oo2:
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</pre></div>
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</dd>
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<dt><code>fj<var>XX</var></code></dt>
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<dd><p>This family includes
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</p><div class="smallexample">
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<pre class="smallexample"> fjne fjeq fjge fjlt fjgt fjle fjf
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fjt fjgl fjgle fjnge fjngl fjngle fjngt
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fjnle fjnlt fjoge fjogl fjogt fjole fjolt
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fjor fjseq fjsf fjsne fjst fjueq fjuge
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fjugt fjule fjult fjun
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</pre></div>
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<p>Each of these pseudo-operations always expands to a single Motorola
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coprocessor branch instruction, word or long. All Motorola coprocessor
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branch instructions allow both word and long displacements.
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</p>
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</dd>
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</dl>
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<hr>
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<div class="header">
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<p>
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Next: <a href="M68K_002dChars.html#M68K_002dChars" accesskey="n" rel="next">M68K-Chars</a>, Up: <a href="M68K_002dopcodes.html#M68K_002dopcodes" accesskey="u" rel="up">M68K-opcodes</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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