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146 lines
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146 lines
5.9 KiB
HTML
<!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
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<html>
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<!-- This file documents the GNU Assembler "as".
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Copyright (C) 1991-2019 Free Software Foundation, Inc.
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Permission is granted to copy, distribute and/or modify this document
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under the terms of the GNU Free Documentation License, Version 1.3
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or any later version published by the Free Software Foundation;
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<!-- Created by GNU Texinfo 6.4, http://www.gnu.org/software/texinfo/ -->
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<head>
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<title>M68HC11-Branch (Using as)</title>
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<meta name="keywords" content="M68HC11-Branch (Using as)">
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<link href="index.html#Top" rel="start" title="Top">
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<link href="AS-Index.html#AS-Index" rel="index" title="AS Index">
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<link href="index.html#SEC_Contents" rel="contents" title="Table of Contents">
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<link href="M68HC11_002dopcodes.html#M68HC11_002dopcodes" rel="up" title="M68HC11-opcodes">
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<link href="S12Z_002dDependent.html#S12Z_002dDependent" rel="next" title="S12Z-Dependent">
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</head>
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<body lang="en">
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<a name="M68HC11_002dBranch"></a>
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<div class="header">
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<p>
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Up: <a href="M68HC11_002dopcodes.html#M68HC11_002dopcodes" accesskey="u" rel="up">M68HC11-opcodes</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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<hr>
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<a name="Branch-Improvement-1"></a>
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<h4 class="subsubsection">9.22.6.1 Branch Improvement</h4>
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<a name="index-pseudo_002dopcodes_002c-M68HC11"></a>
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<a name="index-M68HC11-pseudo_002dopcodes"></a>
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<a name="index-branch-improvement_002c-M68HC11"></a>
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<a name="index-M68HC11-branch-improvement"></a>
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<p>Certain pseudo opcodes are permitted for branch instructions.
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They expand to the shortest branch instruction that reach the
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target. Generally these mnemonics are made by prepending ‘<samp>j</samp>’ to
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the start of Motorola mnemonic. These pseudo opcodes are not affected
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by the ‘<samp>--short-branches</samp>’ or ‘<samp>--force-long-branches</samp>’ options.
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</p>
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<p>The following table summarizes the pseudo-operations.
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</p>
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<div class="smallexample">
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<pre class="smallexample"> Displacement Width
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+-------------------------------------------------------------+
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| Options |
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| --short-branches --force-long-branches |
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+--------------------------+----------------------------------+
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Op |BYTE WORD | BYTE WORD |
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+--------------------------+----------------------------------+
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bsr | bsr <pc-rel> <error> | jsr <abs> |
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bra | bra <pc-rel> <error> | jmp <abs> |
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jbsr | bsr <pc-rel> jsr <abs> | bsr <pc-rel> jsr <abs> |
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jbra | bra <pc-rel> jmp <abs> | bra <pc-rel> jmp <abs> |
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bXX | bXX <pc-rel> <error> | bNX +3; jmp <abs> |
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jbXX | bXX <pc-rel> bNX +3; | bXX <pc-rel> bNX +3; jmp <abs> |
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| jmp <abs> | |
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+--------------------------+----------------------------------+
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XX: condition
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NX: negative of condition XX
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</pre></div>
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<dl compact="compact">
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<dt><code>jbsr</code></dt>
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<dt><code>jbra</code></dt>
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<dd><p>These are the simplest jump pseudo-operations; they always map to one
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particular machine instruction, depending on the displacement to the
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branch target.
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</p>
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</dd>
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<dt><code>jb<var>XX</var></code></dt>
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<dd><p>Here, ‘<samp>jb<var>XX</var></samp>’ stands for an entire family of pseudo-operations,
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where <var>XX</var> is a conditional branch or condition-code test. The full
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list of pseudo-ops in this family is:
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</p><div class="smallexample">
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<pre class="smallexample"> jbcc jbeq jbge jbgt jbhi jbvs jbpl jblo
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jbcs jbne jblt jble jbls jbvc jbmi
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</pre></div>
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<p>For the cases of non-PC relative displacements and long displacements,
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<code>as</code> issues a longer code fragment in terms of
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<var>NX</var>, the opposite condition to <var>XX</var>. For example, for the
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non-PC relative case:
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</p><div class="smallexample">
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<pre class="smallexample"> jb<var>XX</var> foo
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</pre></div>
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<p>gives
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</p><div class="smallexample">
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<pre class="smallexample"> b<var>NX</var>s oof
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jmp foo
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oof:
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</pre></div>
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</dd>
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</dl>
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</body>
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</html>
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