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151 lines
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151 lines
6.8 KiB
HTML
<!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
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<html>
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<!-- This file documents the GNU Assembler "as".
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Copyright (C) 1991-2019 Free Software Foundation, Inc.
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Permission is granted to copy, distribute and/or modify this document
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or any later version published by the Free Software Foundation;
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with no Invariant Sections, with no Front-Cover Texts, and with no
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<head>
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<title>M32R-Warnings (Using as)</title>
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<link href="index.html#Top" rel="start" title="Top">
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<link href="AS-Index.html#AS-Index" rel="index" title="AS Index">
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<link href="index.html#SEC_Contents" rel="contents" title="Table of Contents">
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<link href="M32R_002dDependent.html#M32R_002dDependent" rel="up" title="M32R-Dependent">
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<link href="M68K_002dDependent.html#M68K_002dDependent" rel="next" title="M68K-Dependent">
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</head>
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<body lang="en">
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<a name="M32R_002dWarnings"></a>
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<div class="header">
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<p>
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Previous: <a href="M32R_002dDirectives.html#M32R_002dDirectives" accesskey="p" rel="prev">M32R-Directives</a>, Up: <a href="M32R_002dDependent.html#M32R_002dDependent" accesskey="u" rel="up">M32R-Dependent</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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<hr>
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<a name="M32R-Warnings"></a>
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<h4 class="subsection">9.20.3 M32R Warnings</h4>
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<a name="index-warnings_002c-M32R"></a>
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<a name="index-M32R-warnings"></a>
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<p>There are several warning and error messages that can be produced by
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<code>as</code> which are specific to the M32R:
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</p>
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<dl compact="compact">
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<dt><code>output of 1st instruction is the same as an input to 2nd instruction - is this intentional ?</code></dt>
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<dd><p>This message is only produced if warnings for explicit parallel
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conflicts have been enabled. It indicates that the assembler has
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encountered a parallel instruction in which the destination register of
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the left hand instruction is used as an input register in the right hand
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instruction. For example in this code fragment
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‘<samp>mv r1, r2 || neg r3, r1</samp>’ register r1 is the destination of the
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move instruction and the input to the neg instruction.
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</p>
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</dd>
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<dt><code>output of 2nd instruction is the same as an input to 1st instruction - is this intentional ?</code></dt>
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<dd><p>This message is only produced if warnings for explicit parallel
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conflicts have been enabled. It indicates that the assembler has
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encountered a parallel instruction in which the destination register of
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the right hand instruction is used as an input register in the left hand
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instruction. For example in this code fragment
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‘<samp>mv r1, r2 || neg r2, r3</samp>’ register r2 is the destination of the
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neg instruction and the input to the move instruction.
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</p>
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</dd>
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<dt><code>instruction ‘<samp>...</samp>’ is for the M32RX only</code></dt>
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<dd><p>This message is produced when the assembler encounters an instruction
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which is only supported by the M32Rx processor, and the ‘<samp>-m32rx</samp>’
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command-line flag has not been specified to allow assembly of such
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instructions.
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</p>
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</dd>
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<dt><code>unknown instruction ‘<samp>...</samp>’</code></dt>
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<dd><p>This message is produced when the assembler encounters an instruction
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which it does not recognize.
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</p>
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</dd>
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<dt><code>only the NOP instruction can be issued in parallel on the m32r</code></dt>
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<dd><p>This message is produced when the assembler encounters a parallel
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instruction which does not involve a NOP instruction and the
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‘<samp>-m32rx</samp>’ command-line flag has not been specified. Only the M32Rx
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processor is able to execute two instructions in parallel.
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</p>
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</dd>
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<dt><code>instruction ‘<samp>...</samp>’ cannot be executed in parallel.</code></dt>
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<dd><p>This message is produced when the assembler encounters a parallel
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instruction which is made up of one or two instructions which cannot be
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executed in parallel.
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</p>
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</dd>
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<dt><code>Instructions share the same execution pipeline</code></dt>
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<dd><p>This message is produced when the assembler encounters a parallel
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instruction whose components both use the same execution pipeline.
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</p>
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</dd>
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<dt><code>Instructions write to the same destination register.</code></dt>
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<dd><p>This message is produced when the assembler encounters a parallel
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instruction where both components attempt to modify the same register.
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For example these code fragments will produce this message:
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‘<samp>mv r1, r2 || neg r1, r3</samp>’
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‘<samp>jl r0 || mv r14, r1</samp>’
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‘<samp>st r2, @-r1 || mv r1, r3</samp>’
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‘<samp>mv r1, r2 || ld r0, @r1+</samp>’
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‘<samp>cmp r1, r2 || addx r3, r4</samp>’ (Both write to the condition bit)
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</p>
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</dd>
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</dl>
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<hr>
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<div class="header">
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<p>
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Previous: <a href="M32R_002dDirectives.html#M32R_002dDirectives" accesskey="p" rel="prev">M32R-Directives</a>, Up: <a href="M32R_002dDependent.html#M32R_002dDependent" accesskey="u" rel="up">M32R-Dependent</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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</body>
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</html>
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