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<li class="navelem"><a class="el" href="dir_ea9599923402ca8ab47fc3e495999dea.html">arch</a></li><li class="navelem"><a class="el" href="dir_9e929c73feaf15d3695ce4c76b483065.html">arm</a></li><li class="navelem"><a class="el" href="dir_58955c0f35a9c3d48181d2be53994c7b.html">SAME54</a></li><li class="navelem"><a class="el" href="dir_09e97e512ca7d4e6cd359f1c5497eeba.html">SAME54A</a></li><li class="navelem"><a class="el" href="dir_4b38d63e5c584a4d6c9001c789e1829f.html">mcu</a></li><li class="navelem"><a class="el" href="dir_d4fc57b996dc082ef023092a5b7d90fc.html">inc</a></li><li class="navelem"><a class="el" href="dir_92b117bae75cf16a05ca7611db29e9c7.html">instance</a></li> </ul>
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<div class="title">tc7.h</div> </div>
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<div class="contents">
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<a href="tc7_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>  </div>
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<div class="line"><a name="l00030"></a><span class="lineno"> 30</span> <span class="preprocessor">#ifndef _SAME54_TC7_INSTANCE_</span></div>
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<div class="line"><a name="l00031"></a><span class="lineno"> 31</span> <span class="preprocessor">#define _SAME54_TC7_INSTANCE_</span></div>
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<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>  </div>
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<div class="line"><a name="l00033"></a><span class="lineno"> 33</span> <span class="comment">/* ========== Register definition for TC7 peripheral ========== */</span></div>
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<div class="line"><a name="l00034"></a><span class="lineno"> 34</span> <span class="preprocessor">#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))</span></div>
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<div class="line"><a name="l00035"></a><span class="lineno"> 35</span> <span class="preprocessor">#define REG_TC7_CTRLA (0x43001800) </span></div>
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<div class="line"><a name="l00036"></a><span class="lineno"> 36</span> <span class="preprocessor">#define REG_TC7_CTRLBCLR (0x43001804) </span></div>
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<div class="line"><a name="l00037"></a><span class="lineno"> 37</span> <span class="preprocessor">#define REG_TC7_CTRLBSET (0x43001805) </span></div>
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<div class="line"><a name="l00038"></a><span class="lineno"> 38</span> <span class="preprocessor">#define REG_TC7_EVCTRL (0x43001806) </span></div>
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<div class="line"><a name="l00039"></a><span class="lineno"> 39</span> <span class="preprocessor">#define REG_TC7_INTENCLR (0x43001808) </span></div>
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<div class="line"><a name="l00040"></a><span class="lineno"> 40</span> <span class="preprocessor">#define REG_TC7_INTENSET (0x43001809) </span></div>
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<div class="line"><a name="l00041"></a><span class="lineno"> 41</span> <span class="preprocessor">#define REG_TC7_INTFLAG (0x4300180A) </span></div>
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<div class="line"><a name="l00042"></a><span class="lineno"> 42</span> <span class="preprocessor">#define REG_TC7_STATUS (0x4300180B) </span></div>
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<div class="line"><a name="l00043"></a><span class="lineno"> 43</span> <span class="preprocessor">#define REG_TC7_WAVE (0x4300180C) </span></div>
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<div class="line"><a name="l00044"></a><span class="lineno"> 44</span> <span class="preprocessor">#define REG_TC7_DRVCTRL (0x4300180D) </span></div>
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<div class="line"><a name="l00045"></a><span class="lineno"> 45</span> <span class="preprocessor">#define REG_TC7_DBGCTRL (0x4300180F) </span></div>
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<div class="line"><a name="l00046"></a><span class="lineno"> 46</span> <span class="preprocessor">#define REG_TC7_SYNCBUSY (0x43001810) </span></div>
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<div class="line"><a name="l00047"></a><span class="lineno"> 47</span> <span class="preprocessor">#define REG_TC7_COUNT16_COUNT (0x43001814) </span></div>
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<div class="line"><a name="l00048"></a><span class="lineno"> 48</span> <span class="preprocessor">#define REG_TC7_COUNT16_CC0 (0x4300181C) </span></div>
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<div class="line"><a name="l00049"></a><span class="lineno"> 49</span> <span class="preprocessor">#define REG_TC7_COUNT16_CC1 (0x4300181E) </span></div>
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<div class="line"><a name="l00050"></a><span class="lineno"> 50</span> <span class="preprocessor">#define REG_TC7_COUNT16_CCBUF0 (0x43001830) </span></div>
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<div class="line"><a name="l00051"></a><span class="lineno"> 51</span> <span class="preprocessor">#define REG_TC7_COUNT16_CCBUF1 (0x43001832) </span></div>
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<div class="line"><a name="l00052"></a><span class="lineno"> 52</span> <span class="preprocessor">#define REG_TC7_COUNT32_COUNT (0x43001814) </span></div>
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<div class="line"><a name="l00053"></a><span class="lineno"> 53</span> <span class="preprocessor">#define REG_TC7_COUNT32_CC0 (0x4300181C) </span></div>
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<div class="line"><a name="l00054"></a><span class="lineno"> 54</span> <span class="preprocessor">#define REG_TC7_COUNT32_CC1 (0x43001820) </span></div>
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<div class="line"><a name="l00055"></a><span class="lineno"> 55</span> <span class="preprocessor">#define REG_TC7_COUNT32_CCBUF0 (0x43001830) </span></div>
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<div class="line"><a name="l00056"></a><span class="lineno"> 56</span> <span class="preprocessor">#define REG_TC7_COUNT32_CCBUF1 (0x43001834) </span></div>
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<div class="line"><a name="l00057"></a><span class="lineno"> 57</span> <span class="preprocessor">#define REG_TC7_COUNT8_COUNT (0x43001814) </span></div>
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<div class="line"><a name="l00058"></a><span class="lineno"> 58</span> <span class="preprocessor">#define REG_TC7_COUNT8_PER (0x4300181B) </span></div>
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<div class="line"><a name="l00059"></a><span class="lineno"> 59</span> <span class="preprocessor">#define REG_TC7_COUNT8_CC0 (0x4300181C) </span></div>
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<div class="line"><a name="l00060"></a><span class="lineno"> 60</span> <span class="preprocessor">#define REG_TC7_COUNT8_CC1 (0x4300181D) </span></div>
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<div class="line"><a name="l00061"></a><span class="lineno"> 61</span> <span class="preprocessor">#define REG_TC7_COUNT8_PERBUF (0x4300182F) </span></div>
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<div class="line"><a name="l00062"></a><span class="lineno"> 62</span> <span class="preprocessor">#define REG_TC7_COUNT8_CCBUF0 (0x43001830) </span></div>
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<div class="line"><a name="l00063"></a><span class="lineno"> 63</span> <span class="preprocessor">#define REG_TC7_COUNT8_CCBUF1 (0x43001831) </span></div>
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<div class="line"><a name="l00064"></a><span class="lineno"> 64</span> <span class="preprocessor">#else</span></div>
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<div class="line"><a name="l00065"></a><span class="lineno"><a class="line" href="tc7_8h.html#a27da70cff59007e05bb036293ccdd08c"> 65</a></span> <span class="preprocessor">#define REG_TC7_CTRLA (*(RwReg *)0x43001800UL) </span></div>
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<div class="line"><a name="l00066"></a><span class="lineno"><a class="line" href="tc7_8h.html#a3780f0c1869f3c0d7f65767b3af28174"> 66</a></span> <span class="preprocessor">#define REG_TC7_CTRLBCLR (*(RwReg8 *)0x43001804UL) </span></div>
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<div class="line"><a name="l00067"></a><span class="lineno"><a class="line" href="tc7_8h.html#ae7a4c4546b8b0c0c2ecdf8b10cfc1e74"> 67</a></span> <span class="preprocessor">#define REG_TC7_CTRLBSET (*(RwReg8 *)0x43001805UL) </span></div>
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<div class="line"><a name="l00068"></a><span class="lineno"><a class="line" href="tc7_8h.html#a7740d77ad1f35f1919ae05c14acbb2f2"> 68</a></span> <span class="preprocessor">#define REG_TC7_EVCTRL (*(RwReg16*)0x43001806UL) </span></div>
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<div class="line"><a name="l00069"></a><span class="lineno"><a class="line" href="tc7_8h.html#a4c3e6a9822446cad5d37f2655d143d6b"> 69</a></span> <span class="preprocessor">#define REG_TC7_INTENCLR (*(RwReg8 *)0x43001808UL) </span></div>
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<div class="line"><a name="l00070"></a><span class="lineno"><a class="line" href="tc7_8h.html#a6d30f5f4594ab3db827eaa5de79426cc"> 70</a></span> <span class="preprocessor">#define REG_TC7_INTENSET (*(RwReg8 *)0x43001809UL) </span></div>
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<div class="line"><a name="l00071"></a><span class="lineno"><a class="line" href="tc7_8h.html#ad28aed1931ea09e0cd0cf7b7e8988826"> 71</a></span> <span class="preprocessor">#define REG_TC7_INTFLAG (*(RwReg8 *)0x4300180AUL) </span></div>
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<div class="line"><a name="l00072"></a><span class="lineno"><a class="line" href="tc7_8h.html#a14a3779e6a592ee09f90d552353ea85f"> 72</a></span> <span class="preprocessor">#define REG_TC7_STATUS (*(RwReg8 *)0x4300180BUL) </span></div>
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<div class="line"><a name="l00073"></a><span class="lineno"><a class="line" href="tc7_8h.html#af16edc91e743786d97fa1e07a3ba4d5d"> 73</a></span> <span class="preprocessor">#define REG_TC7_WAVE (*(RwReg8 *)0x4300180CUL) </span></div>
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<div class="line"><a name="l00074"></a><span class="lineno"><a class="line" href="tc7_8h.html#a8e27eb8d6ca84509c037761308d90dff"> 74</a></span> <span class="preprocessor">#define REG_TC7_DRVCTRL (*(RwReg8 *)0x4300180DUL) </span></div>
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<div class="line"><a name="l00075"></a><span class="lineno"><a class="line" href="tc7_8h.html#a2e34fb502c75de02e1c95bb171c9efa6"> 75</a></span> <span class="preprocessor">#define REG_TC7_DBGCTRL (*(RwReg8 *)0x4300180FUL) </span></div>
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<div class="line"><a name="l00076"></a><span class="lineno"><a class="line" href="tc7_8h.html#a3ceb9da6088f80e342666dc33515a285"> 76</a></span> <span class="preprocessor">#define REG_TC7_SYNCBUSY (*(RoReg *)0x43001810UL) </span></div>
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<div class="line"><a name="l00077"></a><span class="lineno"><a class="line" href="tc7_8h.html#a184e9063aa130cac82857c2ff2066dc6"> 77</a></span> <span class="preprocessor">#define REG_TC7_COUNT16_COUNT (*(RwReg16*)0x43001814UL) </span></div>
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<div class="line"><a name="l00078"></a><span class="lineno"><a class="line" href="tc7_8h.html#afa00c617700302290db9ae6ab60750d6"> 78</a></span> <span class="preprocessor">#define REG_TC7_COUNT16_CC0 (*(RwReg16*)0x4300181CUL) </span></div>
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<div class="line"><a name="l00079"></a><span class="lineno"><a class="line" href="tc7_8h.html#a9d569a36ede235df895e372986f2812a"> 79</a></span> <span class="preprocessor">#define REG_TC7_COUNT16_CC1 (*(RwReg16*)0x4300181EUL) </span></div>
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<div class="line"><a name="l00080"></a><span class="lineno"><a class="line" href="tc7_8h.html#af62bc7b29ff95a52f9a037297aab631c"> 80</a></span> <span class="preprocessor">#define REG_TC7_COUNT16_CCBUF0 (*(RwReg16*)0x43001830UL) </span></div>
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<div class="line"><a name="l00081"></a><span class="lineno"><a class="line" href="tc7_8h.html#aab21bef6bc9607f75ba5550d663678ed"> 81</a></span> <span class="preprocessor">#define REG_TC7_COUNT16_CCBUF1 (*(RwReg16*)0x43001832UL) </span></div>
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<div class="line"><a name="l00082"></a><span class="lineno"><a class="line" href="tc7_8h.html#a94a140f457261ad779af12d0cbc8355a"> 82</a></span> <span class="preprocessor">#define REG_TC7_COUNT32_COUNT (*(RwReg *)0x43001814UL) </span></div>
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<div class="line"><a name="l00083"></a><span class="lineno"><a class="line" href="tc7_8h.html#a8793ca75e332498076b996a7a0d924f6"> 83</a></span> <span class="preprocessor">#define REG_TC7_COUNT32_CC0 (*(RwReg *)0x4300181CUL) </span></div>
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<div class="line"><a name="l00084"></a><span class="lineno"><a class="line" href="tc7_8h.html#af5416eacd52dd6752c302a3d14a132d0"> 84</a></span> <span class="preprocessor">#define REG_TC7_COUNT32_CC1 (*(RwReg *)0x43001820UL) </span></div>
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<div class="line"><a name="l00085"></a><span class="lineno"><a class="line" href="tc7_8h.html#ab037249a76d61b01e2951ffaac24f073"> 85</a></span> <span class="preprocessor">#define REG_TC7_COUNT32_CCBUF0 (*(RwReg *)0x43001830UL) </span></div>
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<div class="line"><a name="l00086"></a><span class="lineno"><a class="line" href="tc7_8h.html#a709b1cb472e4614bc6918299e4652976"> 86</a></span> <span class="preprocessor">#define REG_TC7_COUNT32_CCBUF1 (*(RwReg *)0x43001834UL) </span></div>
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<div class="line"><a name="l00087"></a><span class="lineno"><a class="line" href="tc7_8h.html#a0bed7badc723c11f73ae58e23758db92"> 87</a></span> <span class="preprocessor">#define REG_TC7_COUNT8_COUNT (*(RwReg8 *)0x43001814UL) </span></div>
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<div class="line"><a name="l00088"></a><span class="lineno"><a class="line" href="tc7_8h.html#a7095c2ff88fb52274f6bdbcff42c5bcf"> 88</a></span> <span class="preprocessor">#define REG_TC7_COUNT8_PER (*(RwReg8 *)0x4300181BUL) </span></div>
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<div class="line"><a name="l00089"></a><span class="lineno"><a class="line" href="tc7_8h.html#ad84f45a91a5377b89a2b50670d1dc37d"> 89</a></span> <span class="preprocessor">#define REG_TC7_COUNT8_CC0 (*(RwReg8 *)0x4300181CUL) </span></div>
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<div class="line"><a name="l00090"></a><span class="lineno"><a class="line" href="tc7_8h.html#ab7c5d9ae703af7ea94891b1a744f2806"> 90</a></span> <span class="preprocessor">#define REG_TC7_COUNT8_CC1 (*(RwReg8 *)0x4300181DUL) </span></div>
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<div class="line"><a name="l00091"></a><span class="lineno"><a class="line" href="tc7_8h.html#a207262ad667fc3caf3c7328dbb7c974c"> 91</a></span> <span class="preprocessor">#define REG_TC7_COUNT8_PERBUF (*(RwReg8 *)0x4300182FUL) </span></div>
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<div class="line"><a name="l00092"></a><span class="lineno"><a class="line" href="tc7_8h.html#a2b40bec0957a3b71e5b420651e5967c2"> 92</a></span> <span class="preprocessor">#define REG_TC7_COUNT8_CCBUF0 (*(RwReg8 *)0x43001830UL) </span></div>
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<div class="line"><a name="l00093"></a><span class="lineno"><a class="line" href="tc7_8h.html#a4ccd5bfc26b6cdf3ce6c8f01b114911a"> 93</a></span> <span class="preprocessor">#define REG_TC7_COUNT8_CCBUF1 (*(RwReg8 *)0x43001831UL) </span></div>
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<div class="line"><a name="l00094"></a><span class="lineno"> 94</span> <span class="preprocessor">#endif </span><span class="comment">/* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */</span><span class="preprocessor"></span></div>
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<div class="line"><a name="l00095"></a><span class="lineno"> 95</span>  </div>
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<div class="line"><a name="l00096"></a><span class="lineno"> 96</span> <span class="comment">/* ========== Instance parameters for TC7 peripheral ========== */</span></div>
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<div class="line"><a name="l00097"></a><span class="lineno"> 97</span> <span class="preprocessor">#define TC7_CC_NUM 2 </span></div>
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<div class="line"><a name="l00098"></a><span class="lineno"> 98</span> <span class="preprocessor">#define TC7_DMAC_ID_MC_0 66</span></div>
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<div class="line"><a name="l00099"></a><span class="lineno"> 99</span> <span class="preprocessor">#define TC7_DMAC_ID_MC_1 67</span></div>
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<div class="line"><a name="l00100"></a><span class="lineno"> 100</span> <span class="preprocessor">#define TC7_DMAC_ID_MC_LSB 66</span></div>
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<div class="line"><a name="l00101"></a><span class="lineno"> 101</span> <span class="preprocessor">#define TC7_DMAC_ID_MC_MSB 67</span></div>
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<div class="line"><a name="l00102"></a><span class="lineno"> 102</span> <span class="preprocessor">#define TC7_DMAC_ID_MC_SIZE 2</span></div>
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<div class="line"><a name="l00103"></a><span class="lineno"> 103</span> <span class="preprocessor">#define TC7_DMAC_ID_OVF 65 // Indexes of DMA Overflow trigger</span></div>
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<div class="line"><a name="l00104"></a><span class="lineno"> 104</span> <span class="preprocessor">#define TC7_EXT 0 // Coding of implemented extended features (keep 0 value)</span></div>
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<div class="line"><a name="l00105"></a><span class="lineno"> 105</span> <span class="preprocessor">#define TC7_GCLK_ID 39 // Index of Generic Clock</span></div>
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<div class="line"><a name="l00106"></a><span class="lineno"> 106</span> <span class="preprocessor">#define TC7_MASTER_SLAVE_MODE 2 // TC type 0 : NA, 1 : Master, 2 : Slave</span></div>
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<div class="line"><a name="l00107"></a><span class="lineno"> 107</span> <span class="preprocessor">#define TC7_OW_NUM 2 // Number of Output Waveforms</span></div>
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<div class="line"><a name="l00108"></a><span class="lineno"> 108</span>  </div>
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<div class="line"><a name="l00109"></a><span class="lineno"> 109</span> <span class="preprocessor">#endif </span><span class="comment">/* _SAME54_TC7_INSTANCE_ */</span><span class="preprocessor"></span></div>
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