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<h4 class="subsection">9.50.2 Syntax</h4>
<p><a name="index-XGATE-syntax-2398"></a><a name="index-syntax_002c-XGATE-2399"></a>
In XGATE RISC syntax, the instruction name comes first and it may
be followed by up to three operands. Operands are separated by commas
(&lsquo;<samp><span class="samp">,</span></samp>&rsquo;). <code>as</code> will complain if too many operands are specified
for a given instruction. The same will happen if you specified too few
operands.
<pre class="smallexample"> nop
ldl #23
CMP R1, R2
</pre>
<p><a name="index-line-comment-character_002c-XGATE-2400"></a><a name="index-XGATE-line-comment-character-2401"></a>The presence of a &lsquo;<samp><span class="samp">;</span></samp>&rsquo; character or a &lsquo;<samp><span class="samp">!</span></samp>&rsquo; character anywhere
on a line indicates the start of a comment that extends to the end of
that line.
<p>A &lsquo;<samp><span class="samp">*</span></samp>&rsquo; or a &lsquo;<samp><span class="samp">#</span></samp>&rsquo; character at the start of a line also
introduces a line comment, but these characters do not work elsewhere
on the line. If the first character of the line is a &lsquo;<samp><span class="samp">#</span></samp>&rsquo; then as
well as starting a comment, the line could also be logical line number
directive (see <a href="Comments.html#Comments">Comments</a>) or a preprocessor control command
(see <a href="Preprocessing.html#Preprocessing">Preprocessing</a>).
<p><a name="index-line-separator_002c-XGATE-2402"></a><a name="index-statement-separator_002c-XGATE-2403"></a><a name="index-XGATE-line-separator-2404"></a>The XGATE assembler does not currently support a line separator
character.
<p><a name="index-XGATE-addressing-modes-2405"></a><a name="index-addressing-modes_002c-XGATE-2406"></a>The following addressing modes are understood for XGATE:
<dl>
<dt><dfn>Inherent</dfn><dd>&lsquo;<samp></samp>&rsquo;
<br><dt><dfn>Immediate 3 Bit Wide</dfn><dd>&lsquo;<samp><span class="samp">#</span><var>number</var></samp>&rsquo;
<br><dt><dfn>Immediate 4 Bit Wide</dfn><dd>&lsquo;<samp><span class="samp">#</span><var>number</var></samp>&rsquo;
<br><dt><dfn>Immediate 8 Bit Wide</dfn><dd>&lsquo;<samp><span class="samp">#</span><var>number</var></samp>&rsquo;
<br><dt><dfn>Monadic Addressing</dfn><dd>&lsquo;<samp><var>reg</var></samp>&rsquo;
<br><dt><dfn>Dyadic Addressing</dfn><dd>&lsquo;<samp><var>reg</var><span class="samp">, </span><var>reg</var></samp>&rsquo;
<br><dt><dfn>Triadic Addressing</dfn><dd>&lsquo;<samp><var>reg</var><span class="samp">, </span><var>reg</var><span class="samp">, </span><var>reg</var></samp>&rsquo;
<br><dt><dfn>Relative Addressing 9 Bit Wide</dfn><dd>&lsquo;<samp><span class="samp">*</span><var>symbol</var></samp>&rsquo;
<br><dt><dfn>Relative Addressing 10 Bit Wide</dfn><dd>&lsquo;<samp><span class="samp">*</span><var>symbol</var></samp>&rsquo;
<br><dt><dfn>Index Register plus Immediate Offset</dfn><dd>&lsquo;<samp><var>reg</var><span class="samp">, (</span><var>reg</var><span class="samp">, #</span><var>number</var><span class="samp">)</span></samp>&rsquo;
<br><dt><dfn>Index Register plus Register Offset</dfn><dd>&lsquo;<samp><var>reg</var><span class="samp">, </span><var>reg</var><span class="samp">, </span><var>reg</var></samp>&rsquo;
<br><dt><dfn>Index Register plus Register Offset with Post-increment</dfn><dd>&lsquo;<samp><var>reg</var><span class="samp">, </span><var>reg</var><span class="samp">, </span><var>reg</var><span class="samp">+</span></samp>&rsquo;
<br><dt><dfn>Index Register plus Register Offset with Pre-decrement</dfn><dd>&lsquo;<samp><var>reg</var><span class="samp">, </span><var>reg</var><span class="samp">, -</span><var>reg</var></samp>&rsquo;
<p>The register can be either &lsquo;<samp><span class="samp">R0</span></samp>&rsquo;, &lsquo;<samp><span class="samp">R1</span></samp>&rsquo;, &lsquo;<samp><span class="samp">R2</span></samp>&rsquo;, &lsquo;<samp><span class="samp">R3</span></samp>&rsquo;,
&lsquo;<samp><span class="samp">R4</span></samp>&rsquo;, &lsquo;<samp><span class="samp">R5</span></samp>&rsquo;, &lsquo;<samp><span class="samp">R6</span></samp>&rsquo; or &lsquo;<samp><span class="samp">R7</span></samp>&rsquo;.
</dl>
<p>Convience macro opcodes to deal with 16-bit values have been added.
<dl>
<dt><dfn>Immediate 16 Bit Wide</dfn><dd>&lsquo;<samp><span class="samp">#</span><var>number</var></samp>&rsquo;, or &lsquo;<samp><span class="samp">*</span><var>symbol</var></samp>&rsquo;
<p>For example:
<pre class="smallexample"> ldw R1, #1024
ldw R3, timer
ldw R1, (R1, #0)
COM R1
stw R2, (R1, #0)
</pre>
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