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91 lines
5.0 KiB
C
91 lines
5.0 KiB
C
#ifndef _HDI_PAC_H_
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#define _HDI_PAC_H_
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#define PAC_U2211
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#define REV_PAC 0x101
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/* -------- PAC_WPCLR : (PAC Offset: 0x0) (R/W 32) Write Protection Clear -------- */
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#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
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typedef union {
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struct {
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uint32_t :1; /*!< bit: 0 Reserved */
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uint32_t WP:31; /*!< bit: 1..31 Write Protection Clear */
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} bit; /*!< Structure used for bit access */
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uint32_t reg; /*!< Type used for register access */
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} PAC_WPCLR_Type;
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#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
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#define PAC_WPCLR_OFFSET 0x0 /**< \brief (PAC_WPCLR offset) Write Protection Clear */
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#define PAC_WPCLR_RESETVALUE 0x00000000ul /**< \brief (PAC_WPCLR reset_value) Write Protection Clear */
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#define PAC_WPCLR_WP_Pos 1 /**< \brief (PAC_WPCLR) Write Protection Clear */
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#define PAC_WPCLR_WP_Msk (0x7FFFFFFFul << PAC_WPCLR_WP_Pos)
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#define PAC_WPCLR_WP(value) (PAC_WPCLR_WP_Msk & ((value) << PAC_WPCLR_WP_Pos))
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#define PAC_WPCLR_MASK 0xFFFFFFFEul /**< \brief (PAC_WPCLR) MASK Register */
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/* -------- PAC_WPSET : (PAC Offset: 0x4) (R/W 32) Write Protection Set -------- */
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#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
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typedef union {
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struct {
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uint32_t :1; /*!< bit: 0 Reserved */
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uint32_t WP:31; /*!< bit: 1..31 Write Protection Set */
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} bit; /*!< Structure used for bit access */
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uint32_t reg; /*!< Type used for register access */
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} PAC_WPSET_Type;
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#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
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#define PAC_WPSET_OFFSET 0x4 /**< \brief (PAC_WPSET offset) Write Protection Set */
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#define PAC_WPSET_RESETVALUE 0x00000000ul /**< \brief (PAC_WPSET reset_value) Write Protection Set */
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#define PAC_WPSET_WP_Pos 1 /**< \brief (PAC_WPSET) Write Protection Set */
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#define PAC_WPSET_WP_Msk (0x7FFFFFFFul << PAC_WPSET_WP_Pos)
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#define PAC_WPSET_WP(value) (PAC_WPSET_WP_Msk & ((value) << PAC_WPSET_WP_Pos))
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#define PAC_WPSET_MASK 0xFFFFFFFEul /**< \brief (PAC_WPSET) MASK Register */
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/** \brief PAC hardware registers */
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#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
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typedef struct {
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__IO PAC_WPCLR_Type WPCLR; /**< \brief Offset: 0x0 (R/W 32) Write Protection Clear */
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__IO PAC_WPSET_Type WPSET; /**< \brief Offset: 0x4 (R/W 32) Write Protection Set */
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} Pac;
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#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
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/* PAC Inst 0 */
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/* ========== Register definition for PAC0 peripheral ========== */
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#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
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#define REG_PAC0_WPCLR (0x40000000U) /**< \brief (PAC0) Write Protection Clear */
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#define REG_PAC0_WPSET (0x40000004U) /**< \brief (PAC0) Write Protection Set */
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#else
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#define REG_PAC0_WPCLR (*(RwReg *)0x40000000U) /**< \brief (PAC0) Write Protection Clear */
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#define REG_PAC0_WPSET (*(RwReg *)0x40000004U) /**< \brief (PAC0) Write Protection Set */
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#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
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/* ========== Instance parameters for PAC0 peripheral ========== */
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#define PAC0_WPROT_DEFAULT_VAL 0x00000000 // PAC protection mask at reset
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/* PAC Inst 1 */
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/* ========== Register definition for PAC1 peripheral ========== */
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#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
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#define REG_PAC1_WPCLR (0x41000000U) /**< \brief (PAC1) Write Protection Clear */
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#define REG_PAC1_WPSET (0x41000004U) /**< \brief (PAC1) Write Protection Set */
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#else
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#define REG_PAC1_WPCLR (*(RwReg *)0x41000000U) /**< \brief (PAC1) Write Protection Clear */
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#define REG_PAC1_WPSET (*(RwReg *)0x41000004U) /**< \brief (PAC1) Write Protection Set */
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#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
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/* ========== Instance parameters for PAC1 peripheral ========== */
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#define PAC1_WPROT_DEFAULT_VAL 0x00000002 // PAC protection mask at reset
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/* PAC Inst 2 */
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/* ========== Register definition for PAC2 peripheral ========== */
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#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
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#define REG_PAC2_WPCLR (0x42000000U) /**< \brief (PAC2) Write Protection Clear */
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#define REG_PAC2_WPSET (0x42000004U) /**< \brief (PAC2) Write Protection Set */
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#else
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#define REG_PAC2_WPCLR (*(RwReg *)0x42000000U) /**< \brief (PAC2) Write Protection Clear */
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#define REG_PAC2_WPSET (*(RwReg *)0x42000004U) /**< \brief (PAC2) Write Protection Set */
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#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
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/* ========== Instance parameters for PAC2 peripheral ========== */
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#define PAC2_WPROT_DEFAULT_VAL 0x00800000 // PAC protection mask at reset
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#endif
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