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<title>TILE-Gx Syntax - Using as</title>
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This file documents the GNU Assembler "as".
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Copyright (C) 1991-2015 Free Software Foundation, Inc.
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Permission is granted to copy, distribute and/or modify this document
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<a name="TILE-Gx-Syntax"></a>
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<a name="TILE_002dGx-Syntax"></a>
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<p>
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Next: <a rel="next" accesskey="n" href="TILE_002dGx-Directives.html#TILE_002dGx-Directives">TILE-Gx Directives</a>,
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Previous: <a rel="previous" accesskey="p" href="TILE_002dGx-Options.html#TILE_002dGx-Options">TILE-Gx Options</a>,
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Up: <a rel="up" accesskey="u" href="TILE_002dGx_002dDependent.html#TILE_002dGx_002dDependent">TILE-Gx-Dependent</a>
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<h4 class="subsection">9.45.2 Syntax</h4>
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<p><a name="index-TILE_002dGx-syntax-2227"></a><a name="index-syntax_002c-TILE_002dGx-2228"></a>
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Block comments are delimited by ‘<samp><span class="samp">/*</span></samp>’ and ‘<samp><span class="samp">*/</span></samp>’. End of line
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comments may be introduced by ‘<samp><span class="samp">#</span></samp>’.
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<p>Instructions consist of a leading opcode or macro name followed by
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whitespace and an optional comma-separated list of operands:
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<pre class="smallexample"> <var>opcode</var> [<var>operand</var>, ...]
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</pre>
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<p>Instructions must be separated by a newline or semicolon.
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<p>There are two ways to write code: either write naked instructions,
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which the assembler is free to combine into VLIW bundles, or specify
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the VLIW bundles explicitly.
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<p>Bundles are specified using curly braces:
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<pre class="smallexample"> { <var>add</var> r3,r4,r5 ; <var>add</var> r7,r8,r9 ; <var>lw</var> r10,r11 }
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</pre>
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<p>A bundle can span multiple lines. If you want to put multiple
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instructions on a line, whether in a bundle or not, you need to
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separate them with semicolons as in this example.
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<p>A bundle may contain one or more instructions, up to the limit
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specified by the ISA (currently three). If fewer instructions are
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specified than the hardware supports in a bundle, the assembler
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inserts <code>fnop</code> instructions automatically.
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<p>The assembler will prefer to preserve the ordering of instructions
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within the bundle, putting the first instruction in a lower-numbered
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pipeline than the next one, etc. This fact, combined with the
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optional use of explicit <code>fnop</code> or <code>nop</code> instructions,
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allows precise control over which pipeline executes each instruction.
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<p>If the instructions cannot be bundled in the listed order, the
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assembler will automatically try to find a valid pipeline
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assignment. If there is no way to bundle the instructions together,
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the assembler reports an error.
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<p>The assembler does not yet auto-bundle (automatically combine multiple
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instructions into one bundle), but it reserves the right to do so in
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the future. If you want to force an instruction to run by itself, put
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it in a bundle explicitly with curly braces and use <code>nop</code>
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instructions (not <code>fnop</code>) to fill the remaining pipeline slots in
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that bundle.
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<ul class="menu">
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<li><a accesskey="1" href="TILE_002dGx-Opcodes.html#TILE_002dGx-Opcodes">TILE-Gx Opcodes</a>: Opcode Naming Conventions.
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<li><a accesskey="2" href="TILE_002dGx-Registers.html#TILE_002dGx-Registers">TILE-Gx Registers</a>: Register Naming.
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<li><a accesskey="3" href="TILE_002dGx-Modifiers.html#TILE_002dGx-Modifiers">TILE-Gx Modifiers</a>: Symbolic Operand Modifiers.
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</ul>
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