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<h4 class="subsection">9.42.1 Options</h4>
<p><a name="index-options-for-SPARC-1987"></a><a name="index-SPARC-options-1988"></a><a name="index-architectures_002c-SPARC-1989"></a><a name="index-SPARC-architectures-1990"></a>The SPARC chip family includes several successive versions, using the same
core instruction set, but including a few additional instructions at
each version. There are exceptions to this however. For details on what
instructions each variant supports, please see the chip's architecture
reference manual.
<p>By default, <code>as</code> assumes the core instruction set (SPARC
v6), but &ldquo;bumps&rdquo; the architecture level as needed: it switches to
successively higher architectures as it encounters instructions that
only exist in the higher levels.
<p>If not configured for SPARC v9 (<code>sparc64-*-*</code>) GAS will not bump
past sparclite by default, an option must be passed to enable the
v9 instructions.
<p>GAS treats sparclite as being compatible with v8, unless an architecture
is explicitly requested. SPARC v9 is always incompatible with sparclite.
<!-- The order here is the same as the order of enum sparc_opcode_arch_val -->
<!-- to give the user a sense of the order of the "bumping". -->
<a name="index-g_t_002dAv6-1991"></a>
<a name="index-g_t_002dAv7-1992"></a>
<a name="index-g_t_002dAv8-1993"></a>
<a name="index-g_t_002dAleon-1994"></a>
<a name="index-g_t_002dAsparclet-1995"></a>
<a name="index-g_t_002dAsparclite-1996"></a>
<a name="index-g_t_002dAv9-1997"></a>
<a name="index-g_t_002dAv9a-1998"></a>
<a name="index-g_t_002dAv9b-1999"></a>
<a name="index-g_t_002dAv9c-2000"></a>
<a name="index-g_t_002dAv9d-2001"></a>
<a name="index-g_t_002dAv9e-2002"></a>
<a name="index-g_t_002dAv9v-2003"></a>
<a name="index-g_t_002dAv9m-2004"></a>
<a name="index-g_t_002dAsparc-2005"></a>
<a name="index-g_t_002dAsparcvis-2006"></a>
<a name="index-g_t_002dAsparcvis2-2007"></a>
<a name="index-g_t_002dAsparcfmaf-2008"></a>
<a name="index-g_t_002dAsparcima-2009"></a>
<a name="index-g_t_002dAsparcvis3-2010"></a>
<a name="index-g_t_002dAsparcvis3r-2011"></a>
<dl><dt><code>-Av6 | -Av7 | -Av8 | -Aleon | -Asparclet | -Asparclite</code><dt><code>-Av8plus | -Av8plusa | -Av8plusb | -Av8plusc | -Av8plusd | -Av8plusv</code><dt><code>-Av9 | -Av9a | -Av9b | -Av9c | -Av9d | -Av9e | -Av9v | -Av9m</code><dt><code>-Asparc | -Asparcvis | -Asparcvis2 | -Asparcfmaf | -Asparcima</code><dt><code>-Asparcvis3 | -Asparcvis3r</code><dd>Use one of the &lsquo;<samp><span class="samp">-A</span></samp>&rsquo; options to select one of the SPARC
architectures explicitly. If you select an architecture explicitly,
<code>as</code> reports a fatal error if it encounters an instruction
or feature requiring an incompatible or higher level.
<p>&lsquo;<samp><span class="samp">-Av8plus</span></samp>&rsquo;, &lsquo;<samp><span class="samp">-Av8plusa</span></samp>&rsquo;, &lsquo;<samp><span class="samp">-Av8plusb</span></samp>&rsquo;, &lsquo;<samp><span class="samp">-Av8plusc</span></samp>&rsquo;,
&lsquo;<samp><span class="samp">-Av8plusd</span></samp>&rsquo;, and &lsquo;<samp><span class="samp">-Av8plusv</span></samp>&rsquo; select a 32 bit environment.
<p>&lsquo;<samp><span class="samp">-Av9</span></samp>&rsquo;, &lsquo;<samp><span class="samp">-Av9a</span></samp>&rsquo;, &lsquo;<samp><span class="samp">-Av9b</span></samp>&rsquo;, &lsquo;<samp><span class="samp">-Av9c</span></samp>&rsquo;, &lsquo;<samp><span class="samp">-Av9d</span></samp>&rsquo;,
&lsquo;<samp><span class="samp">-Av9e</span></samp>&rsquo;, &lsquo;<samp><span class="samp">-Av9v</span></samp>&rsquo; and &lsquo;<samp><span class="samp">-Av9m</span></samp>&rsquo; select a 64 bit
environment and are not available unless GAS is explicitly configured
with 64 bit environment support.
<p>&lsquo;<samp><span class="samp">-Av8plusa</span></samp>&rsquo; and &lsquo;<samp><span class="samp">-Av9a</span></samp>&rsquo; enable the SPARC V9 instruction set with
UltraSPARC VIS 1.0 extensions.
<p>&lsquo;<samp><span class="samp">-Av8plusb</span></samp>&rsquo; and &lsquo;<samp><span class="samp">-Av9b</span></samp>&rsquo; enable the UltraSPARC VIS 2.0 instructions,
as well as the instructions enabled by &lsquo;<samp><span class="samp">-Av8plusa</span></samp>&rsquo; and &lsquo;<samp><span class="samp">-Av9a</span></samp>&rsquo;.
<p>&lsquo;<samp><span class="samp">-Av8plusc</span></samp>&rsquo; and &lsquo;<samp><span class="samp">-Av9c</span></samp>&rsquo; enable the UltraSPARC Niagara instructions,
as well as the instructions enabled by &lsquo;<samp><span class="samp">-Av8plusb</span></samp>&rsquo; and &lsquo;<samp><span class="samp">-Av9b</span></samp>&rsquo;.
<p>&lsquo;<samp><span class="samp">-Av8plusd</span></samp>&rsquo; and &lsquo;<samp><span class="samp">-Av9d</span></samp>&rsquo; enable the floating point fused
multiply-add, VIS 3.0, and HPC extension instructions, as well as the
instructions enabled by &lsquo;<samp><span class="samp">-Av8plusc</span></samp>&rsquo; and &lsquo;<samp><span class="samp">-Av9c</span></samp>&rsquo;.
<p>&lsquo;<samp><span class="samp">-Av8pluse</span></samp>&rsquo; and &lsquo;<samp><span class="samp">-Av9e</span></samp>&rsquo; enable the cryptographic
instructions, as well as the instructions enabled by &lsquo;<samp><span class="samp">-Av8plusd</span></samp>&rsquo;
and &lsquo;<samp><span class="samp">-Av9d</span></samp>&rsquo;.
<p>&lsquo;<samp><span class="samp">-Av8plusv</span></samp>&rsquo; and &lsquo;<samp><span class="samp">-Av9v</span></samp>&rsquo; enable floating point unfused
multiply-add, and integer multiply-add, as well as the instructions
enabled by &lsquo;<samp><span class="samp">-Av8pluse</span></samp>&rsquo; and &lsquo;<samp><span class="samp">-Av9e</span></samp>&rsquo;.
<p>&lsquo;<samp><span class="samp">-Av8plusm</span></samp>&rsquo; and &lsquo;<samp><span class="samp">-Av9m</span></samp>&rsquo; enable the VIS 4.0, subtract extended,
xmpmul, xmontmul and xmontsqr instructions, as well as the instructions
enabled by &lsquo;<samp><span class="samp">-Av8plusv</span></samp>&rsquo; and &lsquo;<samp><span class="samp">-Av9v</span></samp>&rsquo;.
<p>&lsquo;<samp><span class="samp">-Asparc</span></samp>&rsquo; specifies a v9 environment. It is equivalent to
&lsquo;<samp><span class="samp">-Av9</span></samp>&rsquo; if the word size is 64-bit, and &lsquo;<samp><span class="samp">-Av8plus</span></samp>&rsquo; otherwise.
<p>&lsquo;<samp><span class="samp">-Asparcvis</span></samp>&rsquo; specifies a v9a environment. It is equivalent to
&lsquo;<samp><span class="samp">-Av9a</span></samp>&rsquo; if the word size is 64-bit, and &lsquo;<samp><span class="samp">-Av8plusa</span></samp>&rsquo; otherwise.
<p>&lsquo;<samp><span class="samp">-Asparcvis2</span></samp>&rsquo; specifies a v9b environment. It is equivalent to
&lsquo;<samp><span class="samp">-Av9b</span></samp>&rsquo; if the word size is 64-bit, and &lsquo;<samp><span class="samp">-Av8plusb</span></samp>&rsquo; otherwise.
<p>&lsquo;<samp><span class="samp">-Asparcfmaf</span></samp>&rsquo; specifies a v9b environment with the floating point
fused multiply-add instructions enabled.
<p>&lsquo;<samp><span class="samp">-Asparcima</span></samp>&rsquo; specifies a v9b environment with the integer
multiply-add instructions enabled.
<p>&lsquo;<samp><span class="samp">-Asparcvis3</span></samp>&rsquo; specifies a v9b environment with the VIS 3.0,
HPC , and floating point fused multiply-add instructions enabled.
<p>&lsquo;<samp><span class="samp">-Asparcvis3r</span></samp>&rsquo; specifies a v9b environment with the VIS 3.0, HPC,
and floating point unfused multiply-add instructions enabled.
<p>&lsquo;<samp><span class="samp">-Asparc5</span></samp>&rsquo; is equivalent to &lsquo;<samp><span class="samp">-Av9m</span></samp>&rsquo;.
<br><dt><code>-xarch=v8plus | -xarch=v8plusa | -xarch=v8plusb | -xarch=v8plusc</code><dt><code>-xarch=v8plusd | -xarch=v8plusv | -xarch=v9 | -xarch=v9a</code><dt><code>-xarch=v9b | -xarch=v9c | -xarch=v9d | -xarch=v9e | -xarch=v9v | -xarch=v9m</code><dt><code>-xarch=sparc | -xarch=sparcvis | -xarch=sparcvis2</code><dt><code>-xarch=sparcfmaf | -xarch=sparcima | -xarch=sparcvis3</code><dt><code>-xarch=sparcvis3r | -xarch=sparc5</code><dd>For compatibility with the SunOS v9 assembler. These options are
equivalent to -Av8plus, -Av8plusa, -Av8plusb, -Av8plusc, -Av8plusd,
-Av8plusv, -Av9, -Av9a, -Av9b, -Av9c, -Av9d, -Av9e, -Av9v, -Av9m,
-Asparc, -Asparcvis, -Asparcvis2, -Asparcfmaf, -Asparcima,
-Asparcvis3, and -Asparcvis3r, respectively.
<br><dt><code>-bump</code><dd>Warn whenever it is necessary to switch to another level.
If an architecture level is explicitly requested, GAS will not issue
warnings until that level is reached, and will then bump the level
as required (except between incompatible levels).
<br><dt><code>-32 | -64</code><dd>Select the word size, either 32 bits or 64 bits.
These options are only available with the ELF object file format,
and require that the necessary BFD support has been included.
</dl>
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