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<li class="navelem"><a class="el" href="dir_3c923fb4b71f1c896903b4231e27afd7.html">cfg</a></li> </ul>
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<div class="title">conf_core.h</div> </div>
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<a href="conf__core_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>  </div>
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<div class="line"><a name="l00010"></a><span class="lineno"> 10</span> <span class="preprocessor">#ifndef _CONF_CLOCKS_H_</span></div>
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<div class="line"><a name="l00011"></a><span class="lineno"> 11</span> <span class="preprocessor">#define _CONF_CLOCKS_H_</span></div>
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<div class="line"><a name="l00012"></a><span class="lineno"> 12</span> <span class="preprocessor">#include "clocks.h"</span></div>
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<div class="line"><a name="l00013"></a><span class="lineno"> 13</span>  </div>
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<div class="line"><a name="l00023"></a><span class="lineno"><a class="line" href="conf__core_8h.html#ab46aa120e454ecf957efa4bd97be5bdf"> 23</a></span> <span class="preprocessor">#define CONF_CORE_MCLK_NVM_WAIT_STATE 0x5</span></div>
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<div class="line"><a name="l00024"></a><span class="lineno"> 24</span>  </div>
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<div class="line"><a name="l00036"></a><span class="lineno"><a class="line" href="conf__core_8h.html#aa9643e96439d0d47e0684a4b11c1f529"> 36</a></span> <span class="preprocessor">#define CONF_CORE_MCLK_CPUDIV 0x1</span></div>
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<div class="line"><a name="l00037"></a><span class="lineno"> 37</span>  </div>
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<div class="line"><a name="l00045"></a><span class="lineno"><a class="line" href="conf__core_8h.html#a16a34b830edda5b571c41a0f865f7051"> 45</a></span> <span class="preprocessor">#define CONF_CORE_DMA_ENABLE (0)</span></div>
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<div class="line"><a name="l00046"></a><span class="lineno"> 46</span>  </div>
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<div class="line"><a name="l00052"></a><span class="lineno"><a class="line" href="conf__core_8h.html#a81edcdaa3908cc3d99a95047e4431405"> 52</a></span> <span class="preprocessor">#define CONF_CORE_CMCC_ENABLE (0)</span></div>
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<div class="line"><a name="l00053"></a><span class="lineno"> 53</span>  </div>
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<div class="line"><a name="l00054"></a><span class="lineno"> 54</span> <span class="preprocessor">#define CONF_CORE_PORT_EVCTRL_0_ENABLE (0)</span></div>
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<div class="line"><a name="l00055"></a><span class="lineno"> 55</span> <span class="preprocessor">#define CONF_CORE_PORT_EVCTRL_1_ENABLE (0)</span></div>
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<div class="line"><a name="l00056"></a><span class="lineno"> 56</span> <span class="preprocessor">#define CONF_CORE_PORT_EVCTRL_2_ENABLE (0)</span></div>
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<div class="line"><a name="l00057"></a><span class="lineno"> 57</span>  </div>
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<div class="line"><a name="l00062"></a><span class="lineno"> 62</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC0_ENABLE (1)</span></div>
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<div class="line"><a name="l00063"></a><span class="lineno"> 63</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC0_XTALEN (1)</span></div>
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<div class="line"><a name="l00064"></a><span class="lineno"> 64</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC0_RUNSTDBY (0)</span></div>
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<div class="line"><a name="l00065"></a><span class="lineno"> 65</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC0_ONDEMAND (0)</span></div>
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<div class="line"><a name="l00066"></a><span class="lineno"> 66</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC0_LOWBUFGAIN (0)</span></div>
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<div class="line"><a name="l00067"></a><span class="lineno"> 67</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC0_ENALC (1)</span></div>
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<div class="line"><a name="l00068"></a><span class="lineno"> 68</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC0_CFDEN (1)</span></div>
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<div class="line"><a name="l00069"></a><span class="lineno"> 69</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC0_SWBEN (0)</span></div>
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<div class="line"><a name="l00070"></a><span class="lineno"> 70</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC0_STARTUP_TIME CONF_CORE_CLK_XOSCCTRL_STARTUP_31us</span></div>
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<div class="line"><a name="l00071"></a><span class="lineno"> 71</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC0_FREQUENCY 12000000</span></div>
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<div class="line"><a name="l00072"></a><span class="lineno"> 72</span>  </div>
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<div class="line"><a name="l00080"></a><span class="lineno"> 80</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC1_ENABLE (0)</span></div>
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<div class="line"><a name="l00081"></a><span class="lineno"> 81</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC1_XTALEN (0)</span></div>
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<div class="line"><a name="l00082"></a><span class="lineno"> 82</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC1_RUNSTDBY (0)</span></div>
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<div class="line"><a name="l00083"></a><span class="lineno"> 83</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC1_ONDEMAND (0)</span></div>
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<div class="line"><a name="l00084"></a><span class="lineno"> 84</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC1_LOWBUFGAIN (0)</span></div>
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<div class="line"><a name="l00085"></a><span class="lineno"> 85</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC1_ENALC (0)</span></div>
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<div class="line"><a name="l00086"></a><span class="lineno"> 86</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC1_CFDEN (0)</span></div>
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<div class="line"><a name="l00087"></a><span class="lineno"> 87</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC1_SWBEN (0)</span></div>
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<div class="line"><a name="l00088"></a><span class="lineno"> 88</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC1_STARTUP_TIME CONF_CORE_CLK_XOSCCTRL_STARTUP_31us</span></div>
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<div class="line"><a name="l00089"></a><span class="lineno"> 89</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC1_FREQUENCY 12000000</span></div>
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<div class="line"><a name="l00090"></a><span class="lineno"> 90</span>  </div>
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<div class="line"><a name="l00098"></a><span class="lineno"> 98</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC32K_ENABLE (1)</span></div>
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<div class="line"><a name="l00099"></a><span class="lineno"> 99</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC32K_CGM CONF_CORE_CLK_XOSC32KCTRL_CGM_STD_MODE</span></div>
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<div class="line"><a name="l00100"></a><span class="lineno"> 100</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC32K_STARTUP_TIME CONF_CORE_CLK_XOSC32KCTRL_STARTUP_62592us</span></div>
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<div class="line"><a name="l00101"></a><span class="lineno"> 101</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC32K_ONDEMAND (1)</span></div>
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<div class="line"><a name="l00102"></a><span class="lineno"> 102</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC32K_RUNSTDBY (0)</span></div>
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<div class="line"><a name="l00103"></a><span class="lineno"> 103</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC32K_EN1K (0)</span></div>
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<div class="line"><a name="l00104"></a><span class="lineno"> 104</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC32K_EN32K (1)</span></div>
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<div class="line"><a name="l00105"></a><span class="lineno"> 105</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC32K_XTALEN (1)</span></div>
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<div class="line"><a name="l00106"></a><span class="lineno"> 106</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC32K_CFDPRESC (0)</span></div>
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<div class="line"><a name="l00107"></a><span class="lineno"> 107</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC32K_CFDEN (0)</span></div>
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<div class="line"><a name="l00108"></a><span class="lineno"> 108</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC32K_SWBACK (0)</span></div>
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<div class="line"><a name="l00109"></a><span class="lineno"> 109</span> <span class="preprocessor">#define CONF_CORE_CLK_XOSC32K_WRTLOCK (0)</span></div>
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<div class="line"><a name="l00110"></a><span class="lineno"> 110</span>  </div>
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<div class="line"><a name="l00124"></a><span class="lineno"><a class="line" href="conf__core_8h.html#a03160c4c7871685bbde0e96f02825842"> 124</a></span> <span class="preprocessor">#define CONF_CORE_CLK_DFLL_ENABLE (1)</span></div>
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<div class="line"><a name="l00125"></a><span class="lineno"> 125</span>  </div>
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<div class="line"><a name="l00132"></a><span class="lineno"><a class="line" href="conf__core_8h.html#a55515b150245a993779a0d5f417cc828"> 132</a></span> <span class="preprocessor">#define CONF_CORE_CLK_DFLL_ONDEMAND (0)</span></div>
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<div class="line"><a name="l00133"></a><span class="lineno"> 133</span>  </div>
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<div class="line"><a name="l00140"></a><span class="lineno"><a class="line" href="conf__core_8h.html#ab6b320dcf67ec88f534adcbf77e2ce7b"> 140</a></span> <span class="preprocessor">#define CONF_CORE_CLK_DFLL_RUNSTDBY (0)</span></div>
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<div class="line"><a name="l00141"></a><span class="lineno"> 141</span>  </div>
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<div class="line"><a name="l00148"></a><span class="lineno"><a class="line" href="conf__core_8h.html#a1f088d6654bb907ff388ced455b2dbb2"> 148</a></span> <span class="preprocessor">#define CONF_CORE_CLK_DFLL_WAITLOCK (0)</span></div>
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<div class="line"><a name="l00149"></a><span class="lineno"> 149</span> <span class="preprocessor">#define CONF_CORE_CLK_DFLL_BPLKC (0)</span></div>
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<div class="line"><a name="l00150"></a><span class="lineno"> 150</span> <span class="preprocessor">#define CONF_CORE_CLK_DFLL_QLDIS (0)</span></div>
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<div class="line"><a name="l00151"></a><span class="lineno"> 151</span> <span class="preprocessor">#define CONF_CORE_CLK_DFLL_CCDIS (1)</span></div>
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<div class="line"><a name="l00152"></a><span class="lineno"> 152</span> <span class="preprocessor">#define CONF_CORE_CLK_DFLL_USBCRM (1)</span></div>
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<div class="line"><a name="l00153"></a><span class="lineno"> 153</span> <span class="preprocessor">#define CONF_CORE_CLK_DFLL_LLAW (0)</span></div>
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<div class="line"><a name="l00154"></a><span class="lineno"> 154</span> <span class="preprocessor">#define CONF_CORE_CLK_DFLL_STABLE_FCALIB CONF_CORE_CLK_DFLLCTRL_STABLE_FCALIB_NOT_FIXED</span></div>
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<div class="line"><a name="l00155"></a><span class="lineno"> 155</span> <span class="preprocessor">#define CONF_CORE_CLK_DFLL_MODE 0x01</span></div>
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<div class="line"><a name="l00156"></a><span class="lineno"> 156</span> <span class="preprocessor">#define CONF_CORE_CLK_DFLL_DIFF_VAL 0</span></div>
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<div class="line"><a name="l00157"></a><span class="lineno"> 157</span> <span class="preprocessor">#define CONF_CORE_CLK_DFLL_COARSE_VAL (0x1f / 4)</span></div>
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<div class="line"><a name="l00158"></a><span class="lineno"> 158</span> <span class="preprocessor">#define CONF_CORE_CLK_DFLL_FINE_VAL 128</span></div>
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<div class="line"><a name="l00159"></a><span class="lineno"> 159</span> <span class="preprocessor">#define CONF_CORE_CLK_DFLL_CSTEP_VAL 1</span></div>
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<div class="line"><a name="l00160"></a><span class="lineno"> 160</span> <span class="preprocessor">#define CONF_CORE_CLK_DFLL_FSTEP_VAL 1</span></div>
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<div class="line"><a name="l00161"></a><span class="lineno"> 161</span> <span class="preprocessor">#define CONF_CORE_CLK_DFLL_MUL_VAL (48000000)</span></div>
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<div class="line"><a name="l00162"></a><span class="lineno"> 162</span>  </div>
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<div class="line"><a name="l00178"></a><span class="lineno"><a class="line" href="conf__core_8h.html#a0d8e56832f3d1f24b98173e3a3aa0046"> 178</a></span> <span class="preprocessor">#define CONF_CORE_CLK_DFLL_GCLK_SRC 3</span></div>
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<div class="line"><a name="l00179"></a><span class="lineno"> 179</span> <span class="preprocessor">#define CONF_CORE_CLK_DFLL_OVERWRITE_CAL 0</span></div>
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<div class="line"><a name="l00180"></a><span class="lineno"> 180</span>  </div>
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<div class="line"><a name="l00187"></a><span class="lineno"> 187</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLL0_ENABLE (1)</span></div>
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<div class="line"><a name="l00188"></a><span class="lineno"> 188</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLL0_ONDEMAND (0)</span></div>
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<div class="line"><a name="l00189"></a><span class="lineno"> 189</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLL0_RUNSTDBY (0)</span></div>
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<div class="line"><a name="l00190"></a><span class="lineno"> 190</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLL0_LDRFRAC_VAL 0</span></div>
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<div class="line"><a name="l00191"></a><span class="lineno"> 191</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLL0_LDR_VAL (119)</span></div>
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<div class="line"><a name="l00192"></a><span class="lineno"> 192</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLL0_DIV_VAL (5)</span></div>
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<div class="line"><a name="l00193"></a><span class="lineno"> 193</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLL0_DCOEN 0</span></div>
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<div class="line"><a name="l00194"></a><span class="lineno"> 194</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLL0_DCOFILTER CONF_CORE_CLK_DPLLCTRL_DCOFILTER_3210KHZ</span></div>
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<div class="line"><a name="l00195"></a><span class="lineno"> 195</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLL0_LBYPASS 1</span></div>
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<div class="line"><a name="l00196"></a><span class="lineno"> 196</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLL0_LTIME 0</span></div>
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<div class="line"><a name="l00197"></a><span class="lineno"> 197</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLL0_WUF 0</span></div>
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<div class="line"><a name="l00198"></a><span class="lineno"> 198</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLL0_GCLK_SRC GCLK_GENCTRL_SRC_XOSC0</span></div>
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<div class="line"><a name="l00199"></a><span class="lineno"> 199</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLL0_REFCLK CONF_CORE_CLK_DPLLCTRL_REFCLK_XOSC0</span></div>
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<div class="line"><a name="l00200"></a><span class="lineno"> 200</span>  </div>
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<div class="line"><a name="l00222"></a><span class="lineno"><a class="line" href="conf__core_8h.html#a5cd9abca6f486eaebb6ddd236960b01a"> 222</a></span> <span class="preprocessor">#define CONF_CORE_CLK_DPLL0_FILTER 0x0</span></div>
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<div class="line"><a name="l00223"></a><span class="lineno"> 223</span>  </div>
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<div class="line"><a name="l00230"></a><span class="lineno"> 230</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLL1_ENABLE (0)</span></div>
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<div class="line"><a name="l00231"></a><span class="lineno"> 231</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLL1_ONDEMAND (0)</span></div>
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<div class="line"><a name="l00232"></a><span class="lineno"> 232</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLL1_RUNSTDBY (0)</span></div>
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<div class="line"><a name="l00233"></a><span class="lineno"> 233</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLL1_LDRFRAC_VAL 0</span></div>
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<div class="line"><a name="l00234"></a><span class="lineno"> 234</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLL1_LDR_VAL (0)</span></div>
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<div class="line"><a name="l00235"></a><span class="lineno"> 235</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLL1_DIV_VAL (0)</span></div>
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<div class="line"><a name="l00236"></a><span class="lineno"> 236</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLL1_DCOEN 0</span></div>
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<div class="line"><a name="l00237"></a><span class="lineno"> 237</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLL1_DCOFILTER CONF_CORE_CLK_DPLLCTRL_DCOFILTER_3210KHZ</span></div>
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<div class="line"><a name="l00238"></a><span class="lineno"> 238</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLL1_LBYPASS 0</span></div>
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<div class="line"><a name="l00239"></a><span class="lineno"> 239</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLL1_LTIME 0</span></div>
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<div class="line"><a name="l00240"></a><span class="lineno"> 240</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLL1_WUF 0</span></div>
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<div class="line"><a name="l00241"></a><span class="lineno"> 241</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLL1_GCLK_SRC GCLK_GENCTRL_SRC_XOSC0</span></div>
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<div class="line"><a name="l00242"></a><span class="lineno"> 242</span> <span class="preprocessor">#define CONF_CORE_CLK_DPLL1_REFCLK CONF_CORE_CLK_DPLLCTRL_REFCLK_XOSC0</span></div>
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<div class="line"><a name="l00243"></a><span class="lineno"> 243</span>  </div>
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<div class="line"><a name="l00267"></a><span class="lineno"><a class="line" href="conf__core_8h.html#a9de3ab7eb7e3c001d6aa7040f6311f10"> 267</a></span> <span class="preprocessor">#define CONF_CORE_CLK_DPLL1_FILTER 0x0</span></div>
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<div class="line"><a name="l00268"></a><span class="lineno"> 268</span>  </div>
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<div class="line"><a name="l00271"></a><span class="lineno"> 271</span> <span class="comment">// GCLK Generators Config</span></div>
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<div class="line"><a name="l00272"></a><span class="lineno"> 272</span> <span class="preprocessor">#define CONF_CORE_GCLK_0_ENABLE 1</span></div>
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<div class="line"><a name="l00273"></a><span class="lineno"> 273</span> <span class="preprocessor">#define CONF_CORE_GCLK_0_RUN_IN_STANDBY 1</span></div>
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<div class="line"><a name="l00274"></a><span class="lineno"> 274</span> <span class="preprocessor">#define CONF_CORE_GCLK_0_CLOCK_SOURCE GCLK_GENCTRL_SRC_XOSC0</span></div>
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<div class="line"><a name="l00275"></a><span class="lineno"> 275</span> <span class="preprocessor">#define CONF_CORE_GCLK_0_DIV_VAL 1</span></div>
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<div class="line"><a name="l00276"></a><span class="lineno"> 276</span> <span class="preprocessor">#define CONF_CORE_GCLK_0_DIVSEL 0</span></div>
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<div class="line"><a name="l00277"></a><span class="lineno"> 277</span> <span class="preprocessor">#define CONF_CORE_GCLK_0_OUTPUT_ENABLE 1</span></div>
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<div class="line"><a name="l00278"></a><span class="lineno"> 278</span> <span class="preprocessor">#define CONF_CORE_GCLK_0_OUTPUT_OFF_VALUE 1</span></div>
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<div class="line"><a name="l00279"></a><span class="lineno"> 279</span> <span class="preprocessor">#define CONF_CORE_GCLK_0_IDC 1</span></div>
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<div class="line"><a name="l00280"></a><span class="lineno"> 280</span>  </div>
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<div class="line"><a name="l00281"></a><span class="lineno"> 281</span> <span class="preprocessor">#define CONF_CORE_GCLK_1_ENABLE 0</span></div>
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<div class="line"><a name="l00282"></a><span class="lineno"> 282</span> <span class="preprocessor">#define CONF_CORE_GCLK_1_RUN_IN_STANDBY 0</span></div>
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<div class="line"><a name="l00283"></a><span class="lineno"> 283</span> <span class="preprocessor">#define CONF_CORE_GCLK_1_CLOCK_SOURCE GCLK_GENCTRL_SRC_XOSC0</span></div>
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<div class="line"><a name="l00284"></a><span class="lineno"> 284</span> <span class="preprocessor">#define CONF_CORE_GCLK_1_DIV_VAL 1</span></div>
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<div class="line"><a name="l00285"></a><span class="lineno"> 285</span> <span class="preprocessor">#define CONF_CORE_GCLK_1_DIVSEL 0</span></div>
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<div class="line"><a name="l00286"></a><span class="lineno"> 286</span> <span class="preprocessor">#define CONF_CORE_GCLK_1_OUTPUT_ENABLE 0</span></div>
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<div class="line"><a name="l00287"></a><span class="lineno"> 287</span> <span class="preprocessor">#define CONF_CORE_GCLK_1_OUTPUT_OFF_VALUE 0</span></div>
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<div class="line"><a name="l00288"></a><span class="lineno"> 288</span> <span class="preprocessor">#define CONF_CORE_GCLK_1_IDC 0</span></div>
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<div class="line"><a name="l00289"></a><span class="lineno"> 289</span>  </div>
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<div class="line"><a name="l00290"></a><span class="lineno"> 290</span> <span class="preprocessor">#define CONF_CORE_GCLK_2_ENABLE 0</span></div>
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<div class="line"><a name="l00291"></a><span class="lineno"> 291</span> <span class="preprocessor">#define CONF_CORE_GCLK_2_RUN_IN_STANDBY 0</span></div>
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<div class="line"><a name="l00292"></a><span class="lineno"> 292</span> <span class="preprocessor">#define CONF_CORE_GCLK_2_CLOCK_SOURCE GCLK_GENCTRL_SRC_XOSC0</span></div>
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<div class="line"><a name="l00293"></a><span class="lineno"> 293</span> <span class="preprocessor">#define CONF_CORE_GCLK_2_DIV_VAL 1</span></div>
|
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<div class="line"><a name="l00294"></a><span class="lineno"> 294</span> <span class="preprocessor">#define CONF_CORE_GCLK_2_DIVSEL 0</span></div>
|
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<div class="line"><a name="l00295"></a><span class="lineno"> 295</span> <span class="preprocessor">#define CONF_CORE_GCLK_2_OUTPUT_ENABLE 0</span></div>
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<div class="line"><a name="l00296"></a><span class="lineno"> 296</span> <span class="preprocessor">#define CONF_CORE_GCLK_2_OUTPUT_OFF_VALUE 0</span></div>
|
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<div class="line"><a name="l00297"></a><span class="lineno"> 297</span> <span class="preprocessor">#define CONF_CORE_GCLK_2_IDC 0</span></div>
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<div class="line"><a name="l00298"></a><span class="lineno"> 298</span>  </div>
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<div class="line"><a name="l00299"></a><span class="lineno"> 299</span> <span class="preprocessor">#define CONF_CORE_GCLK_3_ENABLE 1</span></div>
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<div class="line"><a name="l00300"></a><span class="lineno"> 300</span> <span class="preprocessor">#define CONF_CORE_GCLK_3_RUN_IN_STANDBY 0</span></div>
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<div class="line"><a name="l00301"></a><span class="lineno"> 301</span> <span class="preprocessor">#define CONF_CORE_GCLK_3_CLOCK_SOURCE GCLK_GENCTRL_SRC_XOSC32K</span></div>
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<div class="line"><a name="l00302"></a><span class="lineno"> 302</span> <span class="preprocessor">#define CONF_CORE_GCLK_3_DIV_VAL 1</span></div>
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|
<div class="line"><a name="l00303"></a><span class="lineno"> 303</span> <span class="preprocessor">#define CONF_CORE_GCLK_3_DIVSEL 0</span></div>
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<div class="line"><a name="l00304"></a><span class="lineno"> 304</span> <span class="preprocessor">#define CONF_CORE_GCLK_3_OUTPUT_ENABLE 0</span></div>
|
|
<div class="line"><a name="l00305"></a><span class="lineno"> 305</span> <span class="preprocessor">#define CONF_CORE_GCLK_3_OUTPUT_OFF_VALUE 0</span></div>
|
|
<div class="line"><a name="l00306"></a><span class="lineno"> 306</span> <span class="preprocessor">#define CONF_CORE_GCLK_3_IDC 0</span></div>
|
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<div class="line"><a name="l00307"></a><span class="lineno"> 307</span>  </div>
|
|
<div class="line"><a name="l00308"></a><span class="lineno"> 308</span> <span class="preprocessor">#define CONF_CORE_GCLK_4_ENABLE 0</span></div>
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|
<div class="line"><a name="l00309"></a><span class="lineno"> 309</span> <span class="preprocessor">#define CONF_CORE_GCLK_4_RUN_IN_STANDBY 0</span></div>
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|
<div class="line"><a name="l00310"></a><span class="lineno"> 310</span> <span class="preprocessor">#define CONF_CORE_GCLK_4_CLOCK_SOURCE GCLK_GENCTRL_SRC_XOSC0</span></div>
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<div class="line"><a name="l00311"></a><span class="lineno"> 311</span> <span class="preprocessor">#define CONF_CORE_GCLK_4_DIV_VAL 1</span></div>
|
|
<div class="line"><a name="l00312"></a><span class="lineno"> 312</span> <span class="preprocessor">#define CONF_CORE_GCLK_4_DIVSEL 1</span></div>
|
|
<div class="line"><a name="l00313"></a><span class="lineno"> 313</span> <span class="preprocessor">#define CONF_CORE_GCLK_4_OUTPUT_ENABLE 0</span></div>
|
|
<div class="line"><a name="l00314"></a><span class="lineno"> 314</span> <span class="preprocessor">#define CONF_CORE_GCLK_4_OUTPUT_OFF_VALUE 0</span></div>
|
|
<div class="line"><a name="l00315"></a><span class="lineno"> 315</span> <span class="preprocessor">#define CONF_CORE_GCLK_4_IDC 0</span></div>
|
|
<div class="line"><a name="l00316"></a><span class="lineno"> 316</span>  </div>
|
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<div class="line"><a name="l00317"></a><span class="lineno"> 317</span> <span class="preprocessor">#define CONF_CORE_GCLK_5_ENABLE 0</span></div>
|
|
<div class="line"><a name="l00318"></a><span class="lineno"> 318</span> <span class="preprocessor">#define CONF_CORE_GCLK_5_RUN_IN_STANDBY 0</span></div>
|
|
<div class="line"><a name="l00319"></a><span class="lineno"> 319</span> <span class="preprocessor">#define CONF_CORE_GCLK_5_CLOCK_SOURCE GCLK_GENCTRL_SRC_XOSC0</span></div>
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|
<div class="line"><a name="l00320"></a><span class="lineno"> 320</span> <span class="preprocessor">#define CONF_CORE_GCLK_5_DIV_VAL 1</span></div>
|
|
<div class="line"><a name="l00321"></a><span class="lineno"> 321</span> <span class="preprocessor">#define CONF_CORE_GCLK_5_DIVSEL 0</span></div>
|
|
<div class="line"><a name="l00322"></a><span class="lineno"> 322</span> <span class="preprocessor">#define CONF_CORE_GCLK_5_OUTPUT_ENABLE 0</span></div>
|
|
<div class="line"><a name="l00323"></a><span class="lineno"> 323</span> <span class="preprocessor">#define CONF_CORE_GCLK_5_OUTPUT_OFF_VALUE 0</span></div>
|
|
<div class="line"><a name="l00324"></a><span class="lineno"> 324</span> <span class="preprocessor">#define CONF_CORE_GCLK_5_IDC 0</span></div>
|
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<div class="line"><a name="l00325"></a><span class="lineno"> 325</span>  </div>
|
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<div class="line"><a name="l00326"></a><span class="lineno"> 326</span> <span class="preprocessor">#define CONF_CORE_GCLK_6_ENABLE 0</span></div>
|
|
<div class="line"><a name="l00327"></a><span class="lineno"> 327</span> <span class="preprocessor">#define CONF_CORE_GCLK_6_RUN_IN_STANDBY 0</span></div>
|
|
<div class="line"><a name="l00328"></a><span class="lineno"> 328</span> <span class="preprocessor">#define CONF_CORE_GCLK_6_CLOCK_SOURCE GCLK_GENCTRL_SRC_XOSC0</span></div>
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|
<div class="line"><a name="l00329"></a><span class="lineno"> 329</span> <span class="preprocessor">#define CONF_CORE_GCLK_6_DIV_VAL 1</span></div>
|
|
<div class="line"><a name="l00330"></a><span class="lineno"> 330</span> <span class="preprocessor">#define CONF_CORE_GCLK_6_DIVSEL 0</span></div>
|
|
<div class="line"><a name="l00331"></a><span class="lineno"> 331</span> <span class="preprocessor">#define CONF_CORE_GCLK_6_OUTPUT_ENABLE 0</span></div>
|
|
<div class="line"><a name="l00332"></a><span class="lineno"> 332</span> <span class="preprocessor">#define CONF_CORE_GCLK_6_OUTPUT_OFF_VALUE 0</span></div>
|
|
<div class="line"><a name="l00333"></a><span class="lineno"> 333</span> <span class="preprocessor">#define CONF_CORE_GCLK_6_IDC 0</span></div>
|
|
<div class="line"><a name="l00334"></a><span class="lineno"> 334</span>  </div>
|
|
<div class="line"><a name="l00335"></a><span class="lineno"> 335</span> <span class="preprocessor">#define CONF_CORE_GCLK_7_ENABLE 0</span></div>
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|
<div class="line"><a name="l00336"></a><span class="lineno"> 336</span> <span class="preprocessor">#define CONF_CORE_GCLK_7_RUN_IN_STANDBY 0</span></div>
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|
<div class="line"><a name="l00337"></a><span class="lineno"> 337</span> <span class="preprocessor">#define CONF_CORE_GCLK_7_CLOCK_SOURCE GCLK_GENCTRL_SRC_XOSC0</span></div>
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<div class="line"><a name="l00338"></a><span class="lineno"> 338</span> <span class="preprocessor">#define CONF_CORE_GCLK_7_DIV_VAL 1</span></div>
|
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<div class="line"><a name="l00339"></a><span class="lineno"> 339</span> <span class="preprocessor">#define CONF_CORE_GCLK_7_DIVSEL 0</span></div>
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<div class="line"><a name="l00340"></a><span class="lineno"> 340</span> <span class="preprocessor">#define CONF_CORE_GCLK_7_OUTPUT_ENABLE 0</span></div>
|
|
<div class="line"><a name="l00341"></a><span class="lineno"> 341</span> <span class="preprocessor">#define CONF_CORE_GCLK_7_OUTPUT_OFF_VALUE 0</span></div>
|
|
<div class="line"><a name="l00342"></a><span class="lineno"> 342</span> <span class="preprocessor">#define CONF_CORE_GCLK_7_IDC 0</span></div>
|
|
<div class="line"><a name="l00343"></a><span class="lineno"> 343</span>  </div>
|
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<div class="line"><a name="l00344"></a><span class="lineno"> 344</span> <span class="preprocessor">#define CONF_CORE_GCLK_8_ENABLE 0</span></div>
|
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<div class="line"><a name="l00345"></a><span class="lineno"> 345</span> <span class="preprocessor">#define CONF_CORE_GCLK_8_RUN_IN_STANDBY 0</span></div>
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<div class="line"><a name="l00346"></a><span class="lineno"> 346</span> <span class="preprocessor">#define CONF_CORE_GCLK_8_CLOCK_SOURCE GCLK_GENCTRL_SRC_XOSC0</span></div>
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|
<div class="line"><a name="l00347"></a><span class="lineno"> 347</span> <span class="preprocessor">#define CONF_CORE_GCLK_8_DIV_VAL 1</span></div>
|
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<div class="line"><a name="l00348"></a><span class="lineno"> 348</span> <span class="preprocessor">#define CONF_CORE_GCLK_8_DIVSEL 0</span></div>
|
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<div class="line"><a name="l00349"></a><span class="lineno"> 349</span> <span class="preprocessor">#define CONF_CORE_GCLK_8_OUTPUT_ENABLE 0</span></div>
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<div class="line"><a name="l00350"></a><span class="lineno"> 350</span> <span class="preprocessor">#define CONF_CORE_GCLK_8_OUTPUT_OFF_VALUE 0</span></div>
|
|
<div class="line"><a name="l00351"></a><span class="lineno"> 351</span> <span class="preprocessor">#define CONF_CORE_GCLK_8_IDC 0</span></div>
|
|
<div class="line"><a name="l00352"></a><span class="lineno"> 352</span>  </div>
|
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<div class="line"><a name="l00353"></a><span class="lineno"> 353</span> <span class="preprocessor">#define CONF_CORE_GCLK_9_ENABLE 0</span></div>
|
|
<div class="line"><a name="l00354"></a><span class="lineno"> 354</span> <span class="preprocessor">#define CONF_CORE_GCLK_9_RUN_IN_STANDBY 0</span></div>
|
|
<div class="line"><a name="l00355"></a><span class="lineno"> 355</span> <span class="preprocessor">#define CONF_CORE_GCLK_9_CLOCK_SOURCE GCLK_GENCTRL_SRC_XOSC0</span></div>
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<div class="line"><a name="l00356"></a><span class="lineno"> 356</span> <span class="preprocessor">#define CONF_CORE_GCLK_9_DIV_VAL 1</span></div>
|
|
<div class="line"><a name="l00357"></a><span class="lineno"> 357</span> <span class="preprocessor">#define CONF_CORE_GCLK_9_DIVSEL 0</span></div>
|
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<div class="line"><a name="l00358"></a><span class="lineno"> 358</span> <span class="preprocessor">#define CONF_CORE_GCLK_9_OUTPUT_ENABLE 0</span></div>
|
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<div class="line"><a name="l00359"></a><span class="lineno"> 359</span> <span class="preprocessor">#define CONF_CORE_GCLK_9_OUTPUT_OFF_VALUE 0</span></div>
|
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<div class="line"><a name="l00360"></a><span class="lineno"> 360</span> <span class="preprocessor">#define CONF_CORE_GCLK_9_IDC 0</span></div>
|
|
<div class="line"><a name="l00361"></a><span class="lineno"> 361</span>  </div>
|
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<div class="line"><a name="l00362"></a><span class="lineno"> 362</span> <span class="preprocessor">#define CONF_CORE_GCLK_10_ENABLE 0</span></div>
|
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<div class="line"><a name="l00363"></a><span class="lineno"> 363</span> <span class="preprocessor">#define CONF_CORE_GCLK_10_RUN_IN_STANDBY 0</span></div>
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<div class="line"><a name="l00364"></a><span class="lineno"> 364</span> <span class="preprocessor">#define CONF_CORE_GCLK_10_CLOCK_SOURCE GCLK_GENCTRL_SRC_XOSC0</span></div>
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<div class="line"><a name="l00365"></a><span class="lineno"> 365</span> <span class="preprocessor">#define CONF_CORE_GCLK_10_DIV_VAL 1</span></div>
|
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<div class="line"><a name="l00366"></a><span class="lineno"> 366</span> <span class="preprocessor">#define CONF_CORE_GCLK_10_DIVSEL 0</span></div>
|
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<div class="line"><a name="l00367"></a><span class="lineno"> 367</span> <span class="preprocessor">#define CONF_CORE_GCLK_10_OUTPUT_ENABLE 0</span></div>
|
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<div class="line"><a name="l00368"></a><span class="lineno"> 368</span> <span class="preprocessor">#define CONF_CORE_GCLK_10_OUTPUT_OFF_VALUE 0</span></div>
|
|
<div class="line"><a name="l00369"></a><span class="lineno"> 369</span> <span class="preprocessor">#define CONF_CORE_GCLK_10_IDC 0</span></div>
|
|
<div class="line"><a name="l00370"></a><span class="lineno"> 370</span>  </div>
|
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<div class="line"><a name="l00371"></a><span class="lineno"> 371</span> <span class="preprocessor">#define CONF_CORE_GCLK_11_ENABLE 0</span></div>
|
|
<div class="line"><a name="l00372"></a><span class="lineno"> 372</span> <span class="preprocessor">#define CONF_CORE_GCLK_11_RUN_IN_STANDBY 0</span></div>
|
|
<div class="line"><a name="l00373"></a><span class="lineno"> 373</span> <span class="preprocessor">#define CONF_CORE_GCLK_11_CLOCK_SOURCE GCLK_GENCTRL_SRC_XOSC0</span></div>
|
|
<div class="line"><a name="l00374"></a><span class="lineno"> 374</span> <span class="preprocessor">#define CONF_CORE_GCLK_11_DIV_VAL 1</span></div>
|
|
<div class="line"><a name="l00375"></a><span class="lineno"> 375</span> <span class="preprocessor">#define CONF_CORE_GCLK_11_DIVSEL 0</span></div>
|
|
<div class="line"><a name="l00376"></a><span class="lineno"> 376</span> <span class="preprocessor">#define CONF_CORE_GCLK_11_OUTPUT_ENABLE 0</span></div>
|
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<div class="line"><a name="l00377"></a><span class="lineno"> 377</span> <span class="preprocessor">#define CONF_CORE_GCLK_11_OUTPUT_OFF_VALUE 0</span></div>
|
|
<div class="line"><a name="l00378"></a><span class="lineno"> 378</span> <span class="preprocessor">#define CONF_CORE_GCLK_11_IDC 0</span></div>
|
|
<div class="line"><a name="l00379"></a><span class="lineno"> 379</span>  </div>
|
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<div class="line"><a name="l00380"></a><span class="lineno"> 380</span>  </div>
|
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<div class="line"><a name="l00381"></a><span class="lineno"> 381</span>  </div>
|
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<div class="line"><a name="l00382"></a><span class="lineno"> 382</span> <span class="preprocessor">#endif</span></div>
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</div><!-- fragment --></div><!-- contents -->
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