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65 lines
3.3 KiB
Groff
65 lines
3.3 KiB
Groff
.TH "Additional notes from <avr/sfr_defs.h>" 3 "24 Jun 2019" "Version 2.0.0" "avr-libc" \" -*- nroff -*-
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.ad l
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.nh
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.SH NAME
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Additional notes from <avr/sfr_defs.h> \- The \fC<\fBavr/sfr_defs.h\fP>\fP file is included by all of the \fC<avr/ioXXXX.h>\fP files, which use macros defined here to make the special function register definitions look like C variables or simple constants, depending on the \fC_SFR_ASM_COMPAT\fP define. Some examples from \fC<avr/iocanxx.h>\fP to show how to define such macros:
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.PP
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.PP
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.nf
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#define PORTA _SFR_IO8(0x02)
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#define EEAR _SFR_IO16(0x21)
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#define UDR0 _SFR_MEM8(0xC6)
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#define TCNT3 _SFR_MEM16(0x94)
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#define CANIDT _SFR_MEM32(0xF0)
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.fi
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.PP
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.PP
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If \fC_SFR_ASM_COMPAT\fP is not defined, C programs can use names like \fCPORTA\fP directly in C expressions (also on the left side of assignment operators) and GCC will do the right thing (use short I/O instructions if possible). The \fC__SFR_OFFSET\fP definition is not used in any way in this case.
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.PP
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Define \fC_SFR_ASM_COMPAT\fP as 1 to make these names work as simple constants (addresses of the I/O registers). This is necessary when included in preprocessed assembler (*.S) source files, so it is done automatically if \fC__ASSEMBLER__\fP is defined. By default, all addresses are defined as if they were memory addresses (used in \fClds/sts\fP instructions). To use these addresses in \fCin/out\fP instructions, you must subtract 0x20 from them.
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.PP
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For more backwards compatibility, insert the following at the start of your old assembler source file:
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.PP
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.PP
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.nf
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#define __SFR_OFFSET 0
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.fi
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.PP
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.PP
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This automatically subtracts 0x20 from I/O space addresses, but it's a hack, so it is recommended to change your source: wrap such addresses in macros defined here, as shown below. After this is done, the \fC__SFR_OFFSET\fP definition is no longer necessary and can be removed.
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.PP
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Real example - this code could be used in a boot loader that is portable between devices with \fCSPMCR\fP at different addresses.
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.PP
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.PP
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.nf
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<avr/iom163.h>: #define SPMCR _SFR_IO8(0x37)
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<avr/iom128.h>: #define SPMCR _SFR_MEM8(0x68)
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.fi
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.PP
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.PP
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.PP
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.nf
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#if _SFR_IO_REG_P(SPMCR)
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out _SFR_IO_ADDR(SPMCR), r24
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#else
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sts _SFR_MEM_ADDR(SPMCR), r24
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#endif
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.fi
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.PP
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.PP
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You can use the \fCin/out/cbi/sbi/sbic/sbis\fP instructions, without the \fC_SFR_IO_REG_P\fP test, if you know that the register is in the I/O space (as with \fCSREG\fP, for example). If it isn't, the assembler will complain (I/O address out of range 0...0x3f), so this should be fairly safe.
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.PP
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If you do not define \fC__SFR_OFFSET\fP (so it will be 0x20 by default), all special register addresses are defined as memory addresses (so \fCSREG\fP is 0x5f), and (if code size and speed are not important, and you don't like the ugly #if above) you can always use lds/sts to access them. But, this will not work if \fC__SFR_OFFSET\fP != 0x20, so use a different macro (defined only if \fC__SFR_OFFSET\fP == 0x20) for safety:
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.PP
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.PP
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.nf
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sts _SFR_ADDR(SPMCR), r24
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.fi
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.PP
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.PP
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In C programs, all 3 combinations of \fC_SFR_ASM_COMPAT\fP and \fC__SFR_OFFSET\fP are supported - the \fC_SFR_ADDR(SPMCR)\fP macro can be used to get the address of the \fCSPMCR\fP register (0x57 or 0x68 depending on device).
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.SH "Author"
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.PP
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Generated automatically by Doxygen for avr-libc from the source code.
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