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<title>RS/6000 and PowerPC Options - Using the GNU Compiler Collection (GCC)</title>
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<a name="RS%2f6000-and-PowerPC-Options"></a>
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<a name="RS_002f6000-and-PowerPC-Options"></a>
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<p>
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Next: <a rel="next" accesskey="n" href="RX-Options.html#RX-Options">RX Options</a>,
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Previous: <a rel="previous" accesskey="p" href="RL78-Options.html#RL78-Options">RL78 Options</a>,
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Up: <a rel="up" accesskey="u" href="Submodel-Options.html#Submodel-Options">Submodel Options</a>
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<h4 class="subsection">3.17.37 IBM RS/6000 and PowerPC Options</h4>
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<p><a name="index-RS_002f6000-and-PowerPC-Options-2199"></a><a name="index-IBM-RS_002f6000-and-PowerPC-Options-2200"></a>
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These ‘<samp><span class="samp">-m</span></samp>’ options are defined for the IBM RS/6000 and PowerPC:
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<dl>
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<dt><code>-mpowerpc-gpopt</code><dt><code>-mno-powerpc-gpopt</code><dt><code>-mpowerpc-gfxopt</code><dt><code>-mno-powerpc-gfxopt</code><dt><code>-mpowerpc64</code><dt><code>-mno-powerpc64</code><dt><code>-mmfcrf</code><dt><code>-mno-mfcrf</code><dt><code>-mpopcntb</code><dt><code>-mno-popcntb</code><dt><code>-mpopcntd</code><dt><code>-mno-popcntd</code><dt><code>-mfprnd</code><dt><code>-mno-fprnd</code><dt><code>-mcmpb</code><dt><code>-mno-cmpb</code><dt><code>-mmfpgpr</code><dt><code>-mno-mfpgpr</code><dt><code>-mhard-dfp</code><dt><code>-mno-hard-dfp</code><dd><a name="index-mpowerpc_002dgpopt-2201"></a><a name="index-mno_002dpowerpc_002dgpopt-2202"></a><a name="index-mpowerpc_002dgfxopt-2203"></a><a name="index-mno_002dpowerpc_002dgfxopt-2204"></a><a name="index-mpowerpc64-2205"></a><a name="index-mno_002dpowerpc64-2206"></a><a name="index-mmfcrf-2207"></a><a name="index-mno_002dmfcrf-2208"></a><a name="index-mpopcntb-2209"></a><a name="index-mno_002dpopcntb-2210"></a><a name="index-mpopcntd-2211"></a><a name="index-mno_002dpopcntd-2212"></a><a name="index-mfprnd-2213"></a><a name="index-mno_002dfprnd-2214"></a><a name="index-mcmpb-2215"></a><a name="index-mno_002dcmpb-2216"></a><a name="index-mmfpgpr-2217"></a><a name="index-mno_002dmfpgpr-2218"></a><a name="index-mhard_002ddfp-2219"></a><a name="index-mno_002dhard_002ddfp-2220"></a>You use these options to specify which instructions are available on the
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processor you are using. The default value of these options is
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determined when configuring GCC. Specifying the
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<samp><span class="option">-mcpu=</span><var>cpu_type</var></samp> overrides the specification of these
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options. We recommend you use the <samp><span class="option">-mcpu=</span><var>cpu_type</var></samp> option
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rather than the options listed above.
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<p>Specifying <samp><span class="option">-mpowerpc-gpopt</span></samp> allows
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GCC to use the optional PowerPC architecture instructions in the
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General Purpose group, including floating-point square root. Specifying
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<samp><span class="option">-mpowerpc-gfxopt</span></samp> allows GCC to
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use the optional PowerPC architecture instructions in the Graphics
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group, including floating-point select.
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<p>The <samp><span class="option">-mmfcrf</span></samp> option allows GCC to generate the move from
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condition register field instruction implemented on the POWER4
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processor and other processors that support the PowerPC V2.01
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architecture.
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The <samp><span class="option">-mpopcntb</span></samp> option allows GCC to generate the popcount and
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double-precision FP reciprocal estimate instruction implemented on the
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POWER5 processor and other processors that support the PowerPC V2.02
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architecture.
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The <samp><span class="option">-mpopcntd</span></samp> option allows GCC to generate the popcount
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instruction implemented on the POWER7 processor and other processors
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that support the PowerPC V2.06 architecture.
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The <samp><span class="option">-mfprnd</span></samp> option allows GCC to generate the FP round to
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integer instructions implemented on the POWER5+ processor and other
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processors that support the PowerPC V2.03 architecture.
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The <samp><span class="option">-mcmpb</span></samp> option allows GCC to generate the compare bytes
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instruction implemented on the POWER6 processor and other processors
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that support the PowerPC V2.05 architecture.
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The <samp><span class="option">-mmfpgpr</span></samp> option allows GCC to generate the FP move to/from
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general-purpose register instructions implemented on the POWER6X
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processor and other processors that support the extended PowerPC V2.05
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architecture.
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The <samp><span class="option">-mhard-dfp</span></samp> option allows GCC to generate the decimal
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floating-point instructions implemented on some POWER processors.
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<p>The <samp><span class="option">-mpowerpc64</span></samp> option allows GCC to generate the additional
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64-bit instructions that are found in the full PowerPC64 architecture
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and to treat GPRs as 64-bit, doubleword quantities. GCC defaults to
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<samp><span class="option">-mno-powerpc64</span></samp>.
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<br><dt><code>-mcpu=</code><var>cpu_type</var><dd><a name="index-mcpu-2221"></a>Set architecture type, register usage, and
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instruction scheduling parameters for machine type <var>cpu_type</var>.
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Supported values for <var>cpu_type</var> are ‘<samp><span class="samp">401</span></samp>’, ‘<samp><span class="samp">403</span></samp>’,
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‘<samp><span class="samp">405</span></samp>’, ‘<samp><span class="samp">405fp</span></samp>’, ‘<samp><span class="samp">440</span></samp>’, ‘<samp><span class="samp">440fp</span></samp>’, ‘<samp><span class="samp">464</span></samp>’, ‘<samp><span class="samp">464fp</span></samp>’,
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‘<samp><span class="samp">476</span></samp>’, ‘<samp><span class="samp">476fp</span></samp>’, ‘<samp><span class="samp">505</span></samp>’, ‘<samp><span class="samp">601</span></samp>’, ‘<samp><span class="samp">602</span></samp>’, ‘<samp><span class="samp">603</span></samp>’,
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‘<samp><span class="samp">603e</span></samp>’, ‘<samp><span class="samp">604</span></samp>’, ‘<samp><span class="samp">604e</span></samp>’, ‘<samp><span class="samp">620</span></samp>’, ‘<samp><span class="samp">630</span></samp>’, ‘<samp><span class="samp">740</span></samp>’,
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‘<samp><span class="samp">7400</span></samp>’, ‘<samp><span class="samp">7450</span></samp>’, ‘<samp><span class="samp">750</span></samp>’, ‘<samp><span class="samp">801</span></samp>’, ‘<samp><span class="samp">821</span></samp>’, ‘<samp><span class="samp">823</span></samp>’,
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‘<samp><span class="samp">860</span></samp>’, ‘<samp><span class="samp">970</span></samp>’, ‘<samp><span class="samp">8540</span></samp>’, ‘<samp><span class="samp">a2</span></samp>’, ‘<samp><span class="samp">e300c2</span></samp>’,
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‘<samp><span class="samp">e300c3</span></samp>’, ‘<samp><span class="samp">e500mc</span></samp>’, ‘<samp><span class="samp">e500mc64</span></samp>’, ‘<samp><span class="samp">e5500</span></samp>’,
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‘<samp><span class="samp">e6500</span></samp>’, ‘<samp><span class="samp">ec603e</span></samp>’, ‘<samp><span class="samp">G3</span></samp>’, ‘<samp><span class="samp">G4</span></samp>’, ‘<samp><span class="samp">G5</span></samp>’,
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‘<samp><span class="samp">titan</span></samp>’, ‘<samp><span class="samp">power3</span></samp>’, ‘<samp><span class="samp">power4</span></samp>’, ‘<samp><span class="samp">power5</span></samp>’, ‘<samp><span class="samp">power5+</span></samp>’,
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‘<samp><span class="samp">power6</span></samp>’, ‘<samp><span class="samp">power6x</span></samp>’, ‘<samp><span class="samp">power7</span></samp>’, ‘<samp><span class="samp">power8</span></samp>’, ‘<samp><span class="samp">powerpc</span></samp>’,
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‘<samp><span class="samp">powerpc64</span></samp>’, ‘<samp><span class="samp">powerpc64le</span></samp>’, and ‘<samp><span class="samp">rs64</span></samp>’.
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<p><samp><span class="option">-mcpu=powerpc</span></samp>, <samp><span class="option">-mcpu=powerpc64</span></samp>, and
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<samp><span class="option">-mcpu=powerpc64le</span></samp> specify pure 32-bit PowerPC (either
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endian), 64-bit big endian PowerPC and 64-bit little endian PowerPC
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architecture machine types, with an appropriate, generic processor
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model assumed for scheduling purposes.
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<p>The other options specify a specific processor. Code generated under
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those options runs best on that processor, and may not run at all on
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others.
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<p>The <samp><span class="option">-mcpu</span></samp> options automatically enable or disable the
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following options:
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<pre class="smallexample"> -maltivec -mfprnd -mhard-float -mmfcrf -mmultiple
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-mpopcntb -mpopcntd -mpowerpc64
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-mpowerpc-gpopt -mpowerpc-gfxopt -msingle-float -mdouble-float
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-msimple-fpu -mstring -mmulhw -mdlmzb -mmfpgpr -mvsx
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-mcrypto -mdirect-move -mpower8-fusion -mpower8-vector
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-mquad-memory -mquad-memory-atomic
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</pre>
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<p>The particular options set for any particular CPU varies between
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compiler versions, depending on what setting seems to produce optimal
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code for that CPU; it doesn't necessarily reflect the actual hardware's
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capabilities. If you wish to set an individual option to a particular
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value, you may specify it after the <samp><span class="option">-mcpu</span></samp> option, like
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<samp><span class="option">-mcpu=970 -mno-altivec</span></samp>.
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<p>On AIX, the <samp><span class="option">-maltivec</span></samp> and <samp><span class="option">-mpowerpc64</span></samp> options are
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not enabled or disabled by the <samp><span class="option">-mcpu</span></samp> option at present because
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AIX does not have full support for these options. You may still
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enable or disable them individually if you're sure it'll work in your
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environment.
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<br><dt><code>-mtune=</code><var>cpu_type</var><dd><a name="index-mtune-2222"></a>Set the instruction scheduling parameters for machine type
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<var>cpu_type</var>, but do not set the architecture type or register usage,
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as <samp><span class="option">-mcpu=</span><var>cpu_type</var></samp> does. The same
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values for <var>cpu_type</var> are used for <samp><span class="option">-mtune</span></samp> as for
|
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<samp><span class="option">-mcpu</span></samp>. If both are specified, the code generated uses the
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architecture and registers set by <samp><span class="option">-mcpu</span></samp>, but the
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scheduling parameters set by <samp><span class="option">-mtune</span></samp>.
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<br><dt><code>-mcmodel=small</code><dd><a name="index-mcmodel_003dsmall-2223"></a>Generate PowerPC64 code for the small model: The TOC is limited to
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64k.
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<br><dt><code>-mcmodel=medium</code><dd><a name="index-mcmodel_003dmedium-2224"></a>Generate PowerPC64 code for the medium model: The TOC and other static
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data may be up to a total of 4G in size.
|
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<br><dt><code>-mcmodel=large</code><dd><a name="index-mcmodel_003dlarge-2225"></a>Generate PowerPC64 code for the large model: The TOC may be up to 4G
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in size. Other data and code is only limited by the 64-bit address
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space.
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<br><dt><code>-maltivec</code><dt><code>-mno-altivec</code><dd><a name="index-maltivec-2226"></a><a name="index-mno_002daltivec-2227"></a>Generate code that uses (does not use) AltiVec instructions, and also
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|
enable the use of built-in functions that allow more direct access to
|
|
the AltiVec instruction set. You may also need to set
|
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<samp><span class="option">-mabi=altivec</span></samp> to adjust the current ABI with AltiVec ABI
|
|
enhancements.
|
|
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<p>When <samp><span class="option">-maltivec</span></samp> is used, rather than <samp><span class="option">-maltivec=le</span></samp> or
|
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<samp><span class="option">-maltivec=be</span></samp>, the element order for Altivec intrinsics such
|
|
as <code>vec_splat</code>, <code>vec_extract</code>, and <code>vec_insert</code>
|
|
match array element order corresponding to the endianness of the
|
|
target. That is, element zero identifies the leftmost element in a
|
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vector register when targeting a big-endian platform, and identifies
|
|
the rightmost element in a vector register when targeting a
|
|
little-endian platform.
|
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<br><dt><code>-maltivec=be</code><dd><a name="index-maltivec_003dbe-2228"></a>Generate Altivec instructions using big-endian element order,
|
|
regardless of whether the target is big- or little-endian. This is
|
|
the default when targeting a big-endian platform.
|
|
|
|
<p>The element order is used to interpret element numbers in Altivec
|
|
intrinsics such as <code>vec_splat</code>, <code>vec_extract</code>, and
|
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<code>vec_insert</code>. By default, these match array element order
|
|
corresponding to the endianness for the target.
|
|
|
|
<br><dt><code>-maltivec=le</code><dd><a name="index-maltivec_003dle-2229"></a>Generate Altivec instructions using little-endian element order,
|
|
regardless of whether the target is big- or little-endian. This is
|
|
the default when targeting a little-endian platform. This option is
|
|
currently ignored when targeting a big-endian platform.
|
|
|
|
<p>The element order is used to interpret element numbers in Altivec
|
|
intrinsics such as <code>vec_splat</code>, <code>vec_extract</code>, and
|
|
<code>vec_insert</code>. By default, these match array element order
|
|
corresponding to the endianness for the target.
|
|
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|
<br><dt><code>-mvrsave</code><dt><code>-mno-vrsave</code><dd><a name="index-mvrsave-2230"></a><a name="index-mno_002dvrsave-2231"></a>Generate VRSAVE instructions when generating AltiVec code.
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<br><dt><code>-mgen-cell-microcode</code><dd><a name="index-mgen_002dcell_002dmicrocode-2232"></a>Generate Cell microcode instructions.
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<br><dt><code>-mwarn-cell-microcode</code><dd><a name="index-mwarn_002dcell_002dmicrocode-2233"></a>Warn when a Cell microcode instruction is emitted. An example
|
|
of a Cell microcode instruction is a variable shift.
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|
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|
<br><dt><code>-msecure-plt</code><dd><a name="index-msecure_002dplt-2234"></a>Generate code that allows <samp><span class="command">ld</span></samp> and <samp><span class="command">ld.so</span></samp>
|
|
to build executables and shared
|
|
libraries with non-executable <code>.plt</code> and <code>.got</code> sections.
|
|
This is a PowerPC
|
|
32-bit SYSV ABI option.
|
|
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<br><dt><code>-mbss-plt</code><dd><a name="index-mbss_002dplt-2235"></a>Generate code that uses a BSS <code>.plt</code> section that <samp><span class="command">ld.so</span></samp>
|
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fills in, and
|
|
requires <code>.plt</code> and <code>.got</code>
|
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sections that are both writable and executable.
|
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This is a PowerPC 32-bit SYSV ABI option.
|
|
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<br><dt><code>-misel</code><dt><code>-mno-isel</code><dd><a name="index-misel-2236"></a><a name="index-mno_002disel-2237"></a>This switch enables or disables the generation of ISEL instructions.
|
|
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<br><dt><code>-misel=</code><var>yes/no</var><dd>This switch has been deprecated. Use <samp><span class="option">-misel</span></samp> and
|
|
<samp><span class="option">-mno-isel</span></samp> instead.
|
|
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<br><dt><code>-mspe</code><dt><code>-mno-spe</code><dd><a name="index-mspe-2238"></a><a name="index-mno_002dspe-2239"></a>This switch enables or disables the generation of SPE simd
|
|
instructions.
|
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<br><dt><code>-mpaired</code><dt><code>-mno-paired</code><dd><a name="index-mpaired-2240"></a><a name="index-mno_002dpaired-2241"></a>This switch enables or disables the generation of PAIRED simd
|
|
instructions.
|
|
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<br><dt><code>-mspe=</code><var>yes/no</var><dd>This option has been deprecated. Use <samp><span class="option">-mspe</span></samp> and
|
|
<samp><span class="option">-mno-spe</span></samp> instead.
|
|
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<br><dt><code>-mvsx</code><dt><code>-mno-vsx</code><dd><a name="index-mvsx-2242"></a><a name="index-mno_002dvsx-2243"></a>Generate code that uses (does not use) vector/scalar (VSX)
|
|
instructions, and also enable the use of built-in functions that allow
|
|
more direct access to the VSX instruction set.
|
|
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<br><dt><code>-mcrypto</code><dt><code>-mno-crypto</code><dd><a name="index-mcrypto-2244"></a><a name="index-mno_002dcrypto-2245"></a>Enable the use (disable) of the built-in functions that allow direct
|
|
access to the cryptographic instructions that were added in version
|
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2.07 of the PowerPC ISA.
|
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<br><dt><code>-mdirect-move</code><dt><code>-mno-direct-move</code><dd><a name="index-mdirect_002dmove-2246"></a><a name="index-mno_002ddirect_002dmove-2247"></a>Generate code that uses (does not use) the instructions to move data
|
|
between the general purpose registers and the vector/scalar (VSX)
|
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registers that were added in version 2.07 of the PowerPC ISA.
|
|
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<br><dt><code>-mpower8-fusion</code><dt><code>-mno-power8-fusion</code><dd><a name="index-mpower8_002dfusion-2248"></a><a name="index-mno_002dpower8_002dfusion-2249"></a>Generate code that keeps (does not keeps) some integer operations
|
|
adjacent so that the instructions can be fused together on power8 and
|
|
later processors.
|
|
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<br><dt><code>-mpower8-vector</code><dt><code>-mno-power8-vector</code><dd><a name="index-mpower8_002dvector-2250"></a><a name="index-mno_002dpower8_002dvector-2251"></a>Generate code that uses (does not use) the vector and scalar
|
|
instructions that were added in version 2.07 of the PowerPC ISA. Also
|
|
enable the use of built-in functions that allow more direct access to
|
|
the vector instructions.
|
|
|
|
<br><dt><code>-mquad-memory</code><dt><code>-mno-quad-memory</code><dd><a name="index-mquad_002dmemory-2252"></a><a name="index-mno_002dquad_002dmemory-2253"></a>Generate code that uses (does not use) the non-atomic quad word memory
|
|
instructions. The <samp><span class="option">-mquad-memory</span></samp> option requires use of
|
|
64-bit mode.
|
|
|
|
<br><dt><code>-mquad-memory-atomic</code><dt><code>-mno-quad-memory-atomic</code><dd><a name="index-mquad_002dmemory_002datomic-2254"></a><a name="index-mno_002dquad_002dmemory_002datomic-2255"></a>Generate code that uses (does not use) the atomic quad word memory
|
|
instructions. The <samp><span class="option">-mquad-memory-atomic</span></samp> option requires use of
|
|
64-bit mode.
|
|
|
|
<br><dt><code>-mupper-regs-df</code><dt><code>-mno-upper-regs-df</code><dd><a name="index-mupper_002dregs_002ddf-2256"></a><a name="index-mno_002dupper_002dregs_002ddf-2257"></a>Generate code that uses (does not use) the scalar double precision
|
|
instructions that target all 64 registers in the vector/scalar
|
|
floating point register set that were added in version 2.06 of the
|
|
PowerPC ISA. <samp><span class="option">-mupper-regs-df</span></samp> is turned on by default if you
|
|
use any of the <samp><span class="option">-mcpu=power7</span></samp>, <samp><span class="option">-mcpu=power8</span></samp>, or
|
|
<samp><span class="option">-mvsx</span></samp> options.
|
|
|
|
<br><dt><code>-mupper-regs-sf</code><dt><code>-mno-upper-regs-sf</code><dd><a name="index-mupper_002dregs_002dsf-2258"></a><a name="index-mno_002dupper_002dregs_002dsf-2259"></a>Generate code that uses (does not use) the scalar single precision
|
|
instructions that target all 64 registers in the vector/scalar
|
|
floating point register set that were added in version 2.07 of the
|
|
PowerPC ISA. <samp><span class="option">-mupper-regs-sf</span></samp> is turned on by default if you
|
|
use either of the <samp><span class="option">-mcpu=power8</span></samp> or <samp><span class="option">-mpower8-vector</span></samp>
|
|
options.
|
|
|
|
<br><dt><code>-mupper-regs</code><dt><code>-mno-upper-regs</code><dd><a name="index-mupper_002dregs-2260"></a><a name="index-mno_002dupper_002dregs-2261"></a>Generate code that uses (does not use) the scalar
|
|
instructions that target all 64 registers in the vector/scalar
|
|
floating point register set, depending on the model of the machine.
|
|
|
|
<p>If the <samp><span class="option">-mno-upper-regs</span></samp> option is used, it turns off both
|
|
<samp><span class="option">-mupper-regs-sf</span></samp> and <samp><span class="option">-mupper-regs-df</span></samp> options.
|
|
|
|
<br><dt><code>-mfloat-gprs=</code><var>yes/single/double/no</var><dt><code>-mfloat-gprs</code><dd><a name="index-mfloat_002dgprs-2262"></a>This switch enables or disables the generation of floating-point
|
|
operations on the general-purpose registers for architectures that
|
|
support it.
|
|
|
|
<p>The argument ‘<samp><span class="samp">yes</span></samp>’ or ‘<samp><span class="samp">single</span></samp>’ enables the use of
|
|
single-precision floating-point operations.
|
|
|
|
<p>The argument ‘<samp><span class="samp">double</span></samp>’ enables the use of single and
|
|
double-precision floating-point operations.
|
|
|
|
<p>The argument ‘<samp><span class="samp">no</span></samp>’ disables floating-point operations on the
|
|
general-purpose registers.
|
|
|
|
<p>This option is currently only available on the MPC854x.
|
|
|
|
<br><dt><code>-m32</code><dt><code>-m64</code><dd><a name="index-m32-2263"></a><a name="index-m64-2264"></a>Generate code for 32-bit or 64-bit environments of Darwin and SVR4
|
|
targets (including GNU/Linux). The 32-bit environment sets int, long
|
|
and pointer to 32 bits and generates code that runs on any PowerPC
|
|
variant. The 64-bit environment sets int to 32 bits and long and
|
|
pointer to 64 bits, and generates code for PowerPC64, as for
|
|
<samp><span class="option">-mpowerpc64</span></samp>.
|
|
|
|
<br><dt><code>-mfull-toc</code><dt><code>-mno-fp-in-toc</code><dt><code>-mno-sum-in-toc</code><dt><code>-mminimal-toc</code><dd><a name="index-mfull_002dtoc-2265"></a><a name="index-mno_002dfp_002din_002dtoc-2266"></a><a name="index-mno_002dsum_002din_002dtoc-2267"></a><a name="index-mminimal_002dtoc-2268"></a>Modify generation of the TOC (Table Of Contents), which is created for
|
|
every executable file. The <samp><span class="option">-mfull-toc</span></samp> option is selected by
|
|
default. In that case, GCC allocates at least one TOC entry for
|
|
each unique non-automatic variable reference in your program. GCC
|
|
also places floating-point constants in the TOC. However, only
|
|
16,384 entries are available in the TOC.
|
|
|
|
<p>If you receive a linker error message that saying you have overflowed
|
|
the available TOC space, you can reduce the amount of TOC space used
|
|
with the <samp><span class="option">-mno-fp-in-toc</span></samp> and <samp><span class="option">-mno-sum-in-toc</span></samp> options.
|
|
<samp><span class="option">-mno-fp-in-toc</span></samp> prevents GCC from putting floating-point
|
|
constants in the TOC and <samp><span class="option">-mno-sum-in-toc</span></samp> forces GCC to
|
|
generate code to calculate the sum of an address and a constant at
|
|
run time instead of putting that sum into the TOC. You may specify one
|
|
or both of these options. Each causes GCC to produce very slightly
|
|
slower and larger code at the expense of conserving TOC space.
|
|
|
|
<p>If you still run out of space in the TOC even when you specify both of
|
|
these options, specify <samp><span class="option">-mminimal-toc</span></samp> instead. This option causes
|
|
GCC to make only one TOC entry for every file. When you specify this
|
|
option, GCC produces code that is slower and larger but which
|
|
uses extremely little TOC space. You may wish to use this option
|
|
only on files that contain less frequently-executed code.
|
|
|
|
<br><dt><code>-maix64</code><dt><code>-maix32</code><dd><a name="index-maix64-2269"></a><a name="index-maix32-2270"></a>Enable 64-bit AIX ABI and calling convention: 64-bit pointers, 64-bit
|
|
<code>long</code> type, and the infrastructure needed to support them.
|
|
Specifying <samp><span class="option">-maix64</span></samp> implies <samp><span class="option">-mpowerpc64</span></samp>,
|
|
while <samp><span class="option">-maix32</span></samp> disables the 64-bit ABI and
|
|
implies <samp><span class="option">-mno-powerpc64</span></samp>. GCC defaults to <samp><span class="option">-maix32</span></samp>.
|
|
|
|
<br><dt><code>-mxl-compat</code><dt><code>-mno-xl-compat</code><dd><a name="index-mxl_002dcompat-2271"></a><a name="index-mno_002dxl_002dcompat-2272"></a>Produce code that conforms more closely to IBM XL compiler semantics
|
|
when using AIX-compatible ABI. Pass floating-point arguments to
|
|
prototyped functions beyond the register save area (RSA) on the stack
|
|
in addition to argument FPRs. Do not assume that most significant
|
|
double in 128-bit long double value is properly rounded when comparing
|
|
values and converting to double. Use XL symbol names for long double
|
|
support routines.
|
|
|
|
<p>The AIX calling convention was extended but not initially documented to
|
|
handle an obscure K&R C case of calling a function that takes the
|
|
address of its arguments with fewer arguments than declared. IBM XL
|
|
compilers access floating-point arguments that do not fit in the
|
|
RSA from the stack when a subroutine is compiled without
|
|
optimization. Because always storing floating-point arguments on the
|
|
stack is inefficient and rarely needed, this option is not enabled by
|
|
default and only is necessary when calling subroutines compiled by IBM
|
|
XL compilers without optimization.
|
|
|
|
<br><dt><code>-mpe</code><dd><a name="index-mpe-2273"></a>Support <dfn>IBM RS/6000 SP</dfn> <dfn>Parallel Environment</dfn> (PE). Link an
|
|
application written to use message passing with special startup code to
|
|
enable the application to run. The system must have PE installed in the
|
|
standard location (<samp><span class="file">/usr/lpp/ppe.poe/</span></samp>), or the <samp><span class="file">specs</span></samp> file
|
|
must be overridden with the <samp><span class="option">-specs=</span></samp> option to specify the
|
|
appropriate directory location. The Parallel Environment does not
|
|
support threads, so the <samp><span class="option">-mpe</span></samp> option and the <samp><span class="option">-pthread</span></samp>
|
|
option are incompatible.
|
|
|
|
<br><dt><code>-malign-natural</code><dt><code>-malign-power</code><dd><a name="index-malign_002dnatural-2274"></a><a name="index-malign_002dpower-2275"></a>On AIX, 32-bit Darwin, and 64-bit PowerPC GNU/Linux, the option
|
|
<samp><span class="option">-malign-natural</span></samp> overrides the ABI-defined alignment of larger
|
|
types, such as floating-point doubles, on their natural size-based boundary.
|
|
The option <samp><span class="option">-malign-power</span></samp> instructs GCC to follow the ABI-specified
|
|
alignment rules. GCC defaults to the standard alignment defined in the ABI.
|
|
|
|
<p>On 64-bit Darwin, natural alignment is the default, and <samp><span class="option">-malign-power</span></samp>
|
|
is not supported.
|
|
|
|
<br><dt><code>-msoft-float</code><dt><code>-mhard-float</code><dd><a name="index-msoft_002dfloat-2276"></a><a name="index-mhard_002dfloat-2277"></a>Generate code that does not use (uses) the floating-point register set.
|
|
Software floating-point emulation is provided if you use the
|
|
<samp><span class="option">-msoft-float</span></samp> option, and pass the option to GCC when linking.
|
|
|
|
<br><dt><code>-msingle-float</code><dt><code>-mdouble-float</code><dd><a name="index-msingle_002dfloat-2278"></a><a name="index-mdouble_002dfloat-2279"></a>Generate code for single- or double-precision floating-point operations.
|
|
<samp><span class="option">-mdouble-float</span></samp> implies <samp><span class="option">-msingle-float</span></samp>.
|
|
|
|
<br><dt><code>-msimple-fpu</code><dd><a name="index-msimple_002dfpu-2280"></a>Do not generate <code>sqrt</code> and <code>div</code> instructions for hardware
|
|
floating-point unit.
|
|
|
|
<br><dt><code>-mfpu=</code><var>name</var><dd><a name="index-mfpu-2281"></a>Specify type of floating-point unit. Valid values for <var>name</var> are
|
|
‘<samp><span class="samp">sp_lite</span></samp>’ (equivalent to <samp><span class="option">-msingle-float -msimple-fpu</span></samp>),
|
|
‘<samp><span class="samp">dp_lite</span></samp>’ (equivalent to <samp><span class="option">-mdouble-float -msimple-fpu</span></samp>),
|
|
‘<samp><span class="samp">sp_full</span></samp>’ (equivalent to <samp><span class="option">-msingle-float</span></samp>),
|
|
and ‘<samp><span class="samp">dp_full</span></samp>’ (equivalent to <samp><span class="option">-mdouble-float</span></samp>).
|
|
|
|
<br><dt><code>-mxilinx-fpu</code><dd><a name="index-mxilinx_002dfpu-2282"></a>Perform optimizations for the floating-point unit on Xilinx PPC 405/440.
|
|
|
|
<br><dt><code>-mmultiple</code><dt><code>-mno-multiple</code><dd><a name="index-mmultiple-2283"></a><a name="index-mno_002dmultiple-2284"></a>Generate code that uses (does not use) the load multiple word
|
|
instructions and the store multiple word instructions. These
|
|
instructions are generated by default on POWER systems, and not
|
|
generated on PowerPC systems. Do not use <samp><span class="option">-mmultiple</span></samp> on little-endian
|
|
PowerPC systems, since those instructions do not work when the
|
|
processor is in little-endian mode. The exceptions are PPC740 and
|
|
PPC750 which permit these instructions in little-endian mode.
|
|
|
|
<br><dt><code>-mstring</code><dt><code>-mno-string</code><dd><a name="index-mstring-2285"></a><a name="index-mno_002dstring-2286"></a>Generate code that uses (does not use) the load string instructions
|
|
and the store string word instructions to save multiple registers and
|
|
do small block moves. These instructions are generated by default on
|
|
POWER systems, and not generated on PowerPC systems. Do not use
|
|
<samp><span class="option">-mstring</span></samp> on little-endian PowerPC systems, since those
|
|
instructions do not work when the processor is in little-endian mode.
|
|
The exceptions are PPC740 and PPC750 which permit these instructions
|
|
in little-endian mode.
|
|
|
|
<br><dt><code>-mupdate</code><dt><code>-mno-update</code><dd><a name="index-mupdate-2287"></a><a name="index-mno_002dupdate-2288"></a>Generate code that uses (does not use) the load or store instructions
|
|
that update the base register to the address of the calculated memory
|
|
location. These instructions are generated by default. If you use
|
|
<samp><span class="option">-mno-update</span></samp>, there is a small window between the time that the
|
|
stack pointer is updated and the address of the previous frame is
|
|
stored, which means code that walks the stack frame across interrupts or
|
|
signals may get corrupted data.
|
|
|
|
<br><dt><code>-mavoid-indexed-addresses</code><dt><code>-mno-avoid-indexed-addresses</code><dd><a name="index-mavoid_002dindexed_002daddresses-2289"></a><a name="index-mno_002davoid_002dindexed_002daddresses-2290"></a>Generate code that tries to avoid (not avoid) the use of indexed load
|
|
or store instructions. These instructions can incur a performance
|
|
penalty on Power6 processors in certain situations, such as when
|
|
stepping through large arrays that cross a 16M boundary. This option
|
|
is enabled by default when targeting Power6 and disabled otherwise.
|
|
|
|
<br><dt><code>-mfused-madd</code><dt><code>-mno-fused-madd</code><dd><a name="index-mfused_002dmadd-2291"></a><a name="index-mno_002dfused_002dmadd-2292"></a>Generate code that uses (does not use) the floating-point multiply and
|
|
accumulate instructions. These instructions are generated by default
|
|
if hardware floating point is used. The machine-dependent
|
|
<samp><span class="option">-mfused-madd</span></samp> option is now mapped to the machine-independent
|
|
<samp><span class="option">-ffp-contract=fast</span></samp> option, and <samp><span class="option">-mno-fused-madd</span></samp> is
|
|
mapped to <samp><span class="option">-ffp-contract=off</span></samp>.
|
|
|
|
<br><dt><code>-mmulhw</code><dt><code>-mno-mulhw</code><dd><a name="index-mmulhw-2293"></a><a name="index-mno_002dmulhw-2294"></a>Generate code that uses (does not use) the half-word multiply and
|
|
multiply-accumulate instructions on the IBM 405, 440, 464 and 476 processors.
|
|
These instructions are generated by default when targeting those
|
|
processors.
|
|
|
|
<br><dt><code>-mdlmzb</code><dt><code>-mno-dlmzb</code><dd><a name="index-mdlmzb-2295"></a><a name="index-mno_002ddlmzb-2296"></a>Generate code that uses (does not use) the string-search ‘<samp><span class="samp">dlmzb</span></samp>’
|
|
instruction on the IBM 405, 440, 464 and 476 processors. This instruction is
|
|
generated by default when targeting those processors.
|
|
|
|
<br><dt><code>-mno-bit-align</code><dt><code>-mbit-align</code><dd><a name="index-mno_002dbit_002dalign-2297"></a><a name="index-mbit_002dalign-2298"></a>On System V.4 and embedded PowerPC systems do not (do) force structures
|
|
and unions that contain bit-fields to be aligned to the base type of the
|
|
bit-field.
|
|
|
|
<p>For example, by default a structure containing nothing but 8
|
|
<code>unsigned</code> bit-fields of length 1 is aligned to a 4-byte
|
|
boundary and has a size of 4 bytes. By using <samp><span class="option">-mno-bit-align</span></samp>,
|
|
the structure is aligned to a 1-byte boundary and is 1 byte in
|
|
size.
|
|
|
|
<br><dt><code>-mno-strict-align</code><dt><code>-mstrict-align</code><dd><a name="index-mno_002dstrict_002dalign-2299"></a><a name="index-mstrict_002dalign-2300"></a>On System V.4 and embedded PowerPC systems do not (do) assume that
|
|
unaligned memory references are handled by the system.
|
|
|
|
<br><dt><code>-mrelocatable</code><dt><code>-mno-relocatable</code><dd><a name="index-mrelocatable-2301"></a><a name="index-mno_002drelocatable-2302"></a>Generate code that allows (does not allow) a static executable to be
|
|
relocated to a different address at run time. A simple embedded
|
|
PowerPC system loader should relocate the entire contents of
|
|
<code>.got2</code> and 4-byte locations listed in the <code>.fixup</code> section,
|
|
a table of 32-bit addresses generated by this option. For this to
|
|
work, all objects linked together must be compiled with
|
|
<samp><span class="option">-mrelocatable</span></samp> or <samp><span class="option">-mrelocatable-lib</span></samp>.
|
|
<samp><span class="option">-mrelocatable</span></samp> code aligns the stack to an 8-byte boundary.
|
|
|
|
<br><dt><code>-mrelocatable-lib</code><dt><code>-mno-relocatable-lib</code><dd><a name="index-mrelocatable_002dlib-2303"></a><a name="index-mno_002drelocatable_002dlib-2304"></a>Like <samp><span class="option">-mrelocatable</span></samp>, <samp><span class="option">-mrelocatable-lib</span></samp> generates a
|
|
<code>.fixup</code> section to allow static executables to be relocated at
|
|
run time, but <samp><span class="option">-mrelocatable-lib</span></samp> does not use the smaller stack
|
|
alignment of <samp><span class="option">-mrelocatable</span></samp>. Objects compiled with
|
|
<samp><span class="option">-mrelocatable-lib</span></samp> may be linked with objects compiled with
|
|
any combination of the <samp><span class="option">-mrelocatable</span></samp> options.
|
|
|
|
<br><dt><code>-mno-toc</code><dt><code>-mtoc</code><dd><a name="index-mno_002dtoc-2305"></a><a name="index-mtoc-2306"></a>On System V.4 and embedded PowerPC systems do not (do) assume that
|
|
register 2 contains a pointer to a global area pointing to the addresses
|
|
used in the program.
|
|
|
|
<br><dt><code>-mlittle</code><dt><code>-mlittle-endian</code><dd><a name="index-mlittle-2307"></a><a name="index-mlittle_002dendian-2308"></a>On System V.4 and embedded PowerPC systems compile code for the
|
|
processor in little-endian mode. The <samp><span class="option">-mlittle-endian</span></samp> option is
|
|
the same as <samp><span class="option">-mlittle</span></samp>.
|
|
|
|
<br><dt><code>-mbig</code><dt><code>-mbig-endian</code><dd><a name="index-mbig-2309"></a><a name="index-mbig_002dendian-2310"></a>On System V.4 and embedded PowerPC systems compile code for the
|
|
processor in big-endian mode. The <samp><span class="option">-mbig-endian</span></samp> option is
|
|
the same as <samp><span class="option">-mbig</span></samp>.
|
|
|
|
<br><dt><code>-mdynamic-no-pic</code><dd><a name="index-mdynamic_002dno_002dpic-2311"></a>On Darwin and Mac OS X systems, compile code so that it is not
|
|
relocatable, but that its external references are relocatable. The
|
|
resulting code is suitable for applications, but not shared
|
|
libraries.
|
|
|
|
<br><dt><code>-msingle-pic-base</code><dd><a name="index-msingle_002dpic_002dbase-2312"></a>Treat the register used for PIC addressing as read-only, rather than
|
|
loading it in the prologue for each function. The runtime system is
|
|
responsible for initializing this register with an appropriate value
|
|
before execution begins.
|
|
|
|
<br><dt><code>-mprioritize-restricted-insns=</code><var>priority</var><dd><a name="index-mprioritize_002drestricted_002dinsns-2313"></a>This option controls the priority that is assigned to
|
|
dispatch-slot restricted instructions during the second scheduling
|
|
pass. The argument <var>priority</var> takes the value ‘<samp><span class="samp">0</span></samp>’, ‘<samp><span class="samp">1</span></samp>’,
|
|
or ‘<samp><span class="samp">2</span></samp>’ to assign no, highest, or second-highest (respectively)
|
|
priority to dispatch-slot restricted
|
|
instructions.
|
|
|
|
<br><dt><code>-msched-costly-dep=</code><var>dependence_type</var><dd><a name="index-msched_002dcostly_002ddep-2314"></a>This option controls which dependences are considered costly
|
|
by the target during instruction scheduling. The argument
|
|
<var>dependence_type</var> takes one of the following values:
|
|
|
|
<dl>
|
|
<dt>‘<samp><span class="samp">no</span></samp>’<dd>No dependence is costly.
|
|
|
|
<br><dt>‘<samp><span class="samp">all</span></samp>’<dd>All dependences are costly.
|
|
|
|
<br><dt>‘<samp><span class="samp">true_store_to_load</span></samp>’<dd>A true dependence from store to load is costly.
|
|
|
|
<br><dt>‘<samp><span class="samp">store_to_load</span></samp>’<dd>Any dependence from store to load is costly.
|
|
|
|
<br><dt><var>number</var><dd>Any dependence for which the latency is greater than or equal to
|
|
<var>number</var> is costly.
|
|
</dl>
|
|
|
|
<br><dt><code>-minsert-sched-nops=</code><var>scheme</var><dd><a name="index-minsert_002dsched_002dnops-2315"></a>This option controls which NOP insertion scheme is used during
|
|
the second scheduling pass. The argument <var>scheme</var> takes one of the
|
|
following values:
|
|
|
|
<dl>
|
|
<dt>‘<samp><span class="samp">no</span></samp>’<dd>Don't insert NOPs.
|
|
|
|
<br><dt>‘<samp><span class="samp">pad</span></samp>’<dd>Pad with NOPs any dispatch group that has vacant issue slots,
|
|
according to the scheduler's grouping.
|
|
|
|
<br><dt>‘<samp><span class="samp">regroup_exact</span></samp>’<dd>Insert NOPs to force costly dependent insns into
|
|
separate groups. Insert exactly as many NOPs as needed to force an insn
|
|
to a new group, according to the estimated processor grouping.
|
|
|
|
<br><dt><var>number</var><dd>Insert NOPs to force costly dependent insns into
|
|
separate groups. Insert <var>number</var> NOPs to force an insn to a new group.
|
|
</dl>
|
|
|
|
<br><dt><code>-mcall-sysv</code><dd><a name="index-mcall_002dsysv-2316"></a>On System V.4 and embedded PowerPC systems compile code using calling
|
|
conventions that adhere to the March 1995 draft of the System V
|
|
Application Binary Interface, PowerPC processor supplement. This is the
|
|
default unless you configured GCC using ‘<samp><span class="samp">powerpc-*-eabiaix</span></samp>’.
|
|
|
|
<br><dt><code>-mcall-sysv-eabi</code><dt><code>-mcall-eabi</code><dd><a name="index-mcall_002dsysv_002deabi-2317"></a><a name="index-mcall_002deabi-2318"></a>Specify both <samp><span class="option">-mcall-sysv</span></samp> and <samp><span class="option">-meabi</span></samp> options.
|
|
|
|
<br><dt><code>-mcall-sysv-noeabi</code><dd><a name="index-mcall_002dsysv_002dnoeabi-2319"></a>Specify both <samp><span class="option">-mcall-sysv</span></samp> and <samp><span class="option">-mno-eabi</span></samp> options.
|
|
|
|
<br><dt><code>-mcall-aixdesc</code><dd><a name="index-m-2320"></a>On System V.4 and embedded PowerPC systems compile code for the AIX
|
|
operating system.
|
|
|
|
<br><dt><code>-mcall-linux</code><dd><a name="index-mcall_002dlinux-2321"></a>On System V.4 and embedded PowerPC systems compile code for the
|
|
Linux-based GNU system.
|
|
|
|
<br><dt><code>-mcall-freebsd</code><dd><a name="index-mcall_002dfreebsd-2322"></a>On System V.4 and embedded PowerPC systems compile code for the
|
|
FreeBSD operating system.
|
|
|
|
<br><dt><code>-mcall-netbsd</code><dd><a name="index-mcall_002dnetbsd-2323"></a>On System V.4 and embedded PowerPC systems compile code for the
|
|
NetBSD operating system.
|
|
|
|
<br><dt><code>-mcall-openbsd</code><dd><a name="index-mcall_002dnetbsd-2324"></a>On System V.4 and embedded PowerPC systems compile code for the
|
|
OpenBSD operating system.
|
|
|
|
<br><dt><code>-maix-struct-return</code><dd><a name="index-maix_002dstruct_002dreturn-2325"></a>Return all structures in memory (as specified by the AIX ABI).
|
|
|
|
<br><dt><code>-msvr4-struct-return</code><dd><a name="index-msvr4_002dstruct_002dreturn-2326"></a>Return structures smaller than 8 bytes in registers (as specified by the
|
|
SVR4 ABI).
|
|
|
|
<br><dt><code>-mabi=</code><var>abi-type</var><dd><a name="index-mabi-2327"></a>Extend the current ABI with a particular extension, or remove such extension.
|
|
Valid values are ‘<samp><span class="samp">altivec</span></samp>’, ‘<samp><span class="samp">no-altivec</span></samp>’, ‘<samp><span class="samp">spe</span></samp>’,
|
|
‘<samp><span class="samp">no-spe</span></samp>’, ‘<samp><span class="samp">ibmlongdouble</span></samp>’, ‘<samp><span class="samp">ieeelongdouble</span></samp>’,
|
|
‘<samp><span class="samp">elfv1</span></samp>’, ‘<samp><span class="samp">elfv2</span></samp>’.
|
|
|
|
<br><dt><code>-mabi=spe</code><dd><a name="index-mabi_003dspe-2328"></a>Extend the current ABI with SPE ABI extensions. This does not change
|
|
the default ABI, instead it adds the SPE ABI extensions to the current
|
|
ABI.
|
|
|
|
<br><dt><code>-mabi=no-spe</code><dd><a name="index-mabi_003dno_002dspe-2329"></a>Disable Book-E SPE ABI extensions for the current ABI.
|
|
|
|
<br><dt><code>-mabi=ibmlongdouble</code><dd><a name="index-mabi_003dibmlongdouble-2330"></a>Change the current ABI to use IBM extended-precision long double.
|
|
This is a PowerPC 32-bit SYSV ABI option.
|
|
|
|
<br><dt><code>-mabi=ieeelongdouble</code><dd><a name="index-mabi_003dieeelongdouble-2331"></a>Change the current ABI to use IEEE extended-precision long double.
|
|
This is a PowerPC 32-bit Linux ABI option.
|
|
|
|
<br><dt><code>-mabi=elfv1</code><dd><a name="index-mabi_003delfv1-2332"></a>Change the current ABI to use the ELFv1 ABI.
|
|
This is the default ABI for big-endian PowerPC 64-bit Linux.
|
|
Overriding the default ABI requires special system support and is
|
|
likely to fail in spectacular ways.
|
|
|
|
<br><dt><code>-mabi=elfv2</code><dd><a name="index-mabi_003delfv2-2333"></a>Change the current ABI to use the ELFv2 ABI.
|
|
This is the default ABI for little-endian PowerPC 64-bit Linux.
|
|
Overriding the default ABI requires special system support and is
|
|
likely to fail in spectacular ways.
|
|
|
|
<br><dt><code>-mprototype</code><dt><code>-mno-prototype</code><dd><a name="index-mprototype-2334"></a><a name="index-mno_002dprototype-2335"></a>On System V.4 and embedded PowerPC systems assume that all calls to
|
|
variable argument functions are properly prototyped. Otherwise, the
|
|
compiler must insert an instruction before every non-prototyped call to
|
|
set or clear bit 6 of the condition code register (<code>CR</code>) to
|
|
indicate whether floating-point values are passed in the floating-point
|
|
registers in case the function takes variable arguments. With
|
|
<samp><span class="option">-mprototype</span></samp>, only calls to prototyped variable argument functions
|
|
set or clear the bit.
|
|
|
|
<br><dt><code>-msim</code><dd><a name="index-msim-2336"></a>On embedded PowerPC systems, assume that the startup module is called
|
|
<samp><span class="file">sim-crt0.o</span></samp> and that the standard C libraries are <samp><span class="file">libsim.a</span></samp> and
|
|
<samp><span class="file">libc.a</span></samp>. This is the default for ‘<samp><span class="samp">powerpc-*-eabisim</span></samp>’
|
|
configurations.
|
|
|
|
<br><dt><code>-mmvme</code><dd><a name="index-mmvme-2337"></a>On embedded PowerPC systems, assume that the startup module is called
|
|
<samp><span class="file">crt0.o</span></samp> and the standard C libraries are <samp><span class="file">libmvme.a</span></samp> and
|
|
<samp><span class="file">libc.a</span></samp>.
|
|
|
|
<br><dt><code>-mads</code><dd><a name="index-mads-2338"></a>On embedded PowerPC systems, assume that the startup module is called
|
|
<samp><span class="file">crt0.o</span></samp> and the standard C libraries are <samp><span class="file">libads.a</span></samp> and
|
|
<samp><span class="file">libc.a</span></samp>.
|
|
|
|
<br><dt><code>-myellowknife</code><dd><a name="index-myellowknife-2339"></a>On embedded PowerPC systems, assume that the startup module is called
|
|
<samp><span class="file">crt0.o</span></samp> and the standard C libraries are <samp><span class="file">libyk.a</span></samp> and
|
|
<samp><span class="file">libc.a</span></samp>.
|
|
|
|
<br><dt><code>-mvxworks</code><dd><a name="index-mvxworks-2340"></a>On System V.4 and embedded PowerPC systems, specify that you are
|
|
compiling for a VxWorks system.
|
|
|
|
<br><dt><code>-memb</code><dd><a name="index-memb-2341"></a>On embedded PowerPC systems, set the <code>PPC_EMB</code> bit in the ELF flags
|
|
header to indicate that ‘<samp><span class="samp">eabi</span></samp>’ extended relocations are used.
|
|
|
|
<br><dt><code>-meabi</code><dt><code>-mno-eabi</code><dd><a name="index-meabi-2342"></a><a name="index-mno_002deabi-2343"></a>On System V.4 and embedded PowerPC systems do (do not) adhere to the
|
|
Embedded Applications Binary Interface (EABI), which is a set of
|
|
modifications to the System V.4 specifications. Selecting <samp><span class="option">-meabi</span></samp>
|
|
means that the stack is aligned to an 8-byte boundary, a function
|
|
<code>__eabi</code> is called from <code>main</code> to set up the EABI
|
|
environment, and the <samp><span class="option">-msdata</span></samp> option can use both <code>r2</code> and
|
|
<code>r13</code> to point to two separate small data areas. Selecting
|
|
<samp><span class="option">-mno-eabi</span></samp> means that the stack is aligned to a 16-byte boundary,
|
|
no EABI initialization function is called from <code>main</code>, and the
|
|
<samp><span class="option">-msdata</span></samp> option only uses <code>r13</code> to point to a single
|
|
small data area. The <samp><span class="option">-meabi</span></samp> option is on by default if you
|
|
configured GCC using one of the ‘<samp><span class="samp">powerpc*-*-eabi*</span></samp>’ options.
|
|
|
|
<br><dt><code>-msdata=eabi</code><dd><a name="index-msdata_003deabi-2344"></a>On System V.4 and embedded PowerPC systems, put small initialized
|
|
<code>const</code> global and static data in the <code>.sdata2</code> section, which
|
|
is pointed to by register <code>r2</code>. Put small initialized
|
|
non-<code>const</code> global and static data in the <code>.sdata</code> section,
|
|
which is pointed to by register <code>r13</code>. Put small uninitialized
|
|
global and static data in the <code>.sbss</code> section, which is adjacent to
|
|
the <code>.sdata</code> section. The <samp><span class="option">-msdata=eabi</span></samp> option is
|
|
incompatible with the <samp><span class="option">-mrelocatable</span></samp> option. The
|
|
<samp><span class="option">-msdata=eabi</span></samp> option also sets the <samp><span class="option">-memb</span></samp> option.
|
|
|
|
<br><dt><code>-msdata=sysv</code><dd><a name="index-msdata_003dsysv-2345"></a>On System V.4 and embedded PowerPC systems, put small global and static
|
|
data in the <code>.sdata</code> section, which is pointed to by register
|
|
<code>r13</code>. Put small uninitialized global and static data in the
|
|
<code>.sbss</code> section, which is adjacent to the <code>.sdata</code> section.
|
|
The <samp><span class="option">-msdata=sysv</span></samp> option is incompatible with the
|
|
<samp><span class="option">-mrelocatable</span></samp> option.
|
|
|
|
<br><dt><code>-msdata=default</code><dt><code>-msdata</code><dd><a name="index-msdata_003ddefault-2346"></a><a name="index-msdata-2347"></a>On System V.4 and embedded PowerPC systems, if <samp><span class="option">-meabi</span></samp> is used,
|
|
compile code the same as <samp><span class="option">-msdata=eabi</span></samp>, otherwise compile code the
|
|
same as <samp><span class="option">-msdata=sysv</span></samp>.
|
|
|
|
<br><dt><code>-msdata=data</code><dd><a name="index-msdata_003ddata-2348"></a>On System V.4 and embedded PowerPC systems, put small global
|
|
data in the <code>.sdata</code> section. Put small uninitialized global
|
|
data in the <code>.sbss</code> section. Do not use register <code>r13</code>
|
|
to address small data however. This is the default behavior unless
|
|
other <samp><span class="option">-msdata</span></samp> options are used.
|
|
|
|
<br><dt><code>-msdata=none</code><dt><code>-mno-sdata</code><dd><a name="index-msdata_003dnone-2349"></a><a name="index-mno_002dsdata-2350"></a>On embedded PowerPC systems, put all initialized global and static data
|
|
in the <code>.data</code> section, and all uninitialized data in the
|
|
<code>.bss</code> section.
|
|
|
|
<br><dt><code>-mblock-move-inline-limit=</code><var>num</var><dd><a name="index-mblock_002dmove_002dinline_002dlimit-2351"></a>Inline all block moves (such as calls to <code>memcpy</code> or structure
|
|
copies) less than or equal to <var>num</var> bytes. The minimum value for
|
|
<var>num</var> is 32 bytes on 32-bit targets and 64 bytes on 64-bit
|
|
targets. The default value is target-specific.
|
|
|
|
<br><dt><code>-G </code><var>num</var><dd><a name="index-G-2352"></a><a name="index-smaller-data-references-_0028PowerPC_0029-2353"></a><a name="index-g_t_002esdata_002f_002esdata2-references-_0028PowerPC_0029-2354"></a>On embedded PowerPC systems, put global and static items less than or
|
|
equal to <var>num</var> bytes into the small data or BSS sections instead of
|
|
the normal data or BSS section. By default, <var>num</var> is 8. The
|
|
<samp><span class="option">-G </span><var>num</var></samp> switch is also passed to the linker.
|
|
All modules should be compiled with the same <samp><span class="option">-G </span><var>num</var></samp> value.
|
|
|
|
<br><dt><code>-mregnames</code><dt><code>-mno-regnames</code><dd><a name="index-mregnames-2355"></a><a name="index-mno_002dregnames-2356"></a>On System V.4 and embedded PowerPC systems do (do not) emit register
|
|
names in the assembly language output using symbolic forms.
|
|
|
|
<br><dt><code>-mlongcall</code><dt><code>-mno-longcall</code><dd><a name="index-mlongcall-2357"></a><a name="index-mno_002dlongcall-2358"></a>By default assume that all calls are far away so that a longer and more
|
|
expensive calling sequence is required. This is required for calls
|
|
farther than 32 megabytes (33,554,432 bytes) from the current location.
|
|
A short call is generated if the compiler knows
|
|
the call cannot be that far away. This setting can be overridden by
|
|
the <code>shortcall</code> function attribute, or by <code>#pragma
|
|
longcall(0)</code>.
|
|
|
|
<p>Some linkers are capable of detecting out-of-range calls and generating
|
|
glue code on the fly. On these systems, long calls are unnecessary and
|
|
generate slower code. As of this writing, the AIX linker can do this,
|
|
as can the GNU linker for PowerPC/64. It is planned to add this feature
|
|
to the GNU linker for 32-bit PowerPC systems as well.
|
|
|
|
<p>On Darwin/PPC systems, <code>#pragma longcall</code> generates <code>jbsr
|
|
callee, L42</code>, plus a <dfn>branch island</dfn> (glue code). The two target
|
|
addresses represent the callee and the branch island. The
|
|
Darwin/PPC linker prefers the first address and generates a <code>bl
|
|
callee</code> if the PPC <code>bl</code> instruction reaches the callee directly;
|
|
otherwise, the linker generates <code>bl L42</code> to call the branch
|
|
island. The branch island is appended to the body of the
|
|
calling function; it computes the full 32-bit address of the callee
|
|
and jumps to it.
|
|
|
|
<p>On Mach-O (Darwin) systems, this option directs the compiler emit to
|
|
the glue for every direct call, and the Darwin linker decides whether
|
|
to use or discard it.
|
|
|
|
<p>In the future, GCC may ignore all longcall specifications
|
|
when the linker is known to generate glue.
|
|
|
|
<br><dt><code>-mtls-markers</code><dt><code>-mno-tls-markers</code><dd><a name="index-mtls_002dmarkers-2359"></a><a name="index-mno_002dtls_002dmarkers-2360"></a>Mark (do not mark) calls to <code>__tls_get_addr</code> with a relocation
|
|
specifying the function argument. The relocation allows the linker to
|
|
reliably associate function call with argument setup instructions for
|
|
TLS optimization, which in turn allows GCC to better schedule the
|
|
sequence.
|
|
|
|
<br><dt><code>-pthread</code><dd><a name="index-pthread-2361"></a>Adds support for multithreading with the <dfn>pthreads</dfn> library.
|
|
This option sets flags for both the preprocessor and linker.
|
|
|
|
<br><dt><code>-mrecip</code><dt><code>-mno-recip</code><dd><a name="index-mrecip-2362"></a>This option enables use of the reciprocal estimate and
|
|
reciprocal square root estimate instructions with additional
|
|
Newton-Raphson steps to increase precision instead of doing a divide or
|
|
square root and divide for floating-point arguments. You should use
|
|
the <samp><span class="option">-ffast-math</span></samp> option when using <samp><span class="option">-mrecip</span></samp> (or at
|
|
least <samp><span class="option">-funsafe-math-optimizations</span></samp>,
|
|
<samp><span class="option">-finite-math-only</span></samp>, <samp><span class="option">-freciprocal-math</span></samp> and
|
|
<samp><span class="option">-fno-trapping-math</span></samp>). Note that while the throughput of the
|
|
sequence is generally higher than the throughput of the non-reciprocal
|
|
instruction, the precision of the sequence can be decreased by up to 2
|
|
ulp (i.e. the inverse of 1.0 equals 0.99999994) for reciprocal square
|
|
roots.
|
|
|
|
<br><dt><code>-mrecip=</code><var>opt</var><dd><a name="index-mrecip_003dopt-2363"></a>This option controls which reciprocal estimate instructions
|
|
may be used. <var>opt</var> is a comma-separated list of options, which may
|
|
be preceded by a <code>!</code> to invert the option:
|
|
|
|
<dl>
|
|
<dt>‘<samp><span class="samp">all</span></samp>’<dd>Enable all estimate instructions.
|
|
|
|
<br><dt>‘<samp><span class="samp">default</span></samp>’<dd>Enable the default instructions, equivalent to <samp><span class="option">-mrecip</span></samp>.
|
|
|
|
<br><dt>‘<samp><span class="samp">none</span></samp>’<dd>Disable all estimate instructions, equivalent to <samp><span class="option">-mno-recip</span></samp>.
|
|
|
|
<br><dt>‘<samp><span class="samp">div</span></samp>’<dd>Enable the reciprocal approximation instructions for both
|
|
single and double precision.
|
|
|
|
<br><dt>‘<samp><span class="samp">divf</span></samp>’<dd>Enable the single-precision reciprocal approximation instructions.
|
|
|
|
<br><dt>‘<samp><span class="samp">divd</span></samp>’<dd>Enable the double-precision reciprocal approximation instructions.
|
|
|
|
<br><dt>‘<samp><span class="samp">rsqrt</span></samp>’<dd>Enable the reciprocal square root approximation instructions for both
|
|
single and double precision.
|
|
|
|
<br><dt>‘<samp><span class="samp">rsqrtf</span></samp>’<dd>Enable the single-precision reciprocal square root approximation instructions.
|
|
|
|
<br><dt>‘<samp><span class="samp">rsqrtd</span></samp>’<dd>Enable the double-precision reciprocal square root approximation instructions.
|
|
|
|
</dl>
|
|
|
|
<p>So, for example, <samp><span class="option">-mrecip=all,!rsqrtd</span></samp> enables
|
|
all of the reciprocal estimate instructions, except for the
|
|
<code>FRSQRTE</code>, <code>XSRSQRTEDP</code>, and <code>XVRSQRTEDP</code> instructions
|
|
which handle the double-precision reciprocal square root calculations.
|
|
|
|
<br><dt><code>-mrecip-precision</code><dt><code>-mno-recip-precision</code><dd><a name="index-mrecip_002dprecision-2364"></a>Assume (do not assume) that the reciprocal estimate instructions
|
|
provide higher-precision estimates than is mandated by the PowerPC
|
|
ABI. Selecting <samp><span class="option">-mcpu=power6</span></samp>, <samp><span class="option">-mcpu=power7</span></samp> or
|
|
<samp><span class="option">-mcpu=power8</span></samp> automatically selects <samp><span class="option">-mrecip-precision</span></samp>.
|
|
The double-precision square root estimate instructions are not generated by
|
|
default on low-precision machines, since they do not provide an
|
|
estimate that converges after three steps.
|
|
|
|
<br><dt><code>-mveclibabi=</code><var>type</var><dd><a name="index-mveclibabi-2365"></a>Specifies the ABI type to use for vectorizing intrinsics using an
|
|
external library. The only type supported at present is ‘<samp><span class="samp">mass</span></samp>’,
|
|
which specifies to use IBM's Mathematical Acceleration Subsystem
|
|
(MASS) libraries for vectorizing intrinsics using external libraries.
|
|
GCC currently emits calls to <code>acosd2</code>, <code>acosf4</code>,
|
|
<code>acoshd2</code>, <code>acoshf4</code>, <code>asind2</code>, <code>asinf4</code>,
|
|
<code>asinhd2</code>, <code>asinhf4</code>, <code>atan2d2</code>, <code>atan2f4</code>,
|
|
<code>atand2</code>, <code>atanf4</code>, <code>atanhd2</code>, <code>atanhf4</code>,
|
|
<code>cbrtd2</code>, <code>cbrtf4</code>, <code>cosd2</code>, <code>cosf4</code>,
|
|
<code>coshd2</code>, <code>coshf4</code>, <code>erfcd2</code>, <code>erfcf4</code>,
|
|
<code>erfd2</code>, <code>erff4</code>, <code>exp2d2</code>, <code>exp2f4</code>,
|
|
<code>expd2</code>, <code>expf4</code>, <code>expm1d2</code>, <code>expm1f4</code>,
|
|
<code>hypotd2</code>, <code>hypotf4</code>, <code>lgammad2</code>, <code>lgammaf4</code>,
|
|
<code>log10d2</code>, <code>log10f4</code>, <code>log1pd2</code>, <code>log1pf4</code>,
|
|
<code>log2d2</code>, <code>log2f4</code>, <code>logd2</code>, <code>logf4</code>,
|
|
<code>powd2</code>, <code>powf4</code>, <code>sind2</code>, <code>sinf4</code>, <code>sinhd2</code>,
|
|
<code>sinhf4</code>, <code>sqrtd2</code>, <code>sqrtf4</code>, <code>tand2</code>,
|
|
<code>tanf4</code>, <code>tanhd2</code>, and <code>tanhf4</code> when generating code
|
|
for power7. Both <samp><span class="option">-ftree-vectorize</span></samp> and
|
|
<samp><span class="option">-funsafe-math-optimizations</span></samp> must also be enabled. The MASS
|
|
libraries must be specified at link time.
|
|
|
|
<br><dt><code>-mfriz</code><dt><code>-mno-friz</code><dd><a name="index-mfriz-2366"></a>Generate (do not generate) the <code>friz</code> instruction when the
|
|
<samp><span class="option">-funsafe-math-optimizations</span></samp> option is used to optimize
|
|
rounding of floating-point values to 64-bit integer and back to floating
|
|
point. The <code>friz</code> instruction does not return the same value if
|
|
the floating-point number is too large to fit in an integer.
|
|
|
|
<br><dt><code>-mpointers-to-nested-functions</code><dt><code>-mno-pointers-to-nested-functions</code><dd><a name="index-mpointers_002dto_002dnested_002dfunctions-2367"></a>Generate (do not generate) code to load up the static chain register
|
|
(<code>r11</code>) when calling through a pointer on AIX and 64-bit Linux
|
|
systems where a function pointer points to a 3-word descriptor giving
|
|
the function address, TOC value to be loaded in register <code>r2</code>, and
|
|
static chain value to be loaded in register <code>r11</code>. The
|
|
<samp><span class="option">-mpointers-to-nested-functions</span></samp> is on by default. You cannot
|
|
call through pointers to nested functions or pointers
|
|
to functions compiled in other languages that use the static chain if
|
|
you use <samp><span class="option">-mno-pointers-to-nested-functions</span></samp>.
|
|
|
|
<br><dt><code>-msave-toc-indirect</code><dt><code>-mno-save-toc-indirect</code><dd><a name="index-msave_002dtoc_002dindirect-2368"></a>Generate (do not generate) code to save the TOC value in the reserved
|
|
stack location in the function prologue if the function calls through
|
|
a pointer on AIX and 64-bit Linux systems. If the TOC value is not
|
|
saved in the prologue, it is saved just before the call through the
|
|
pointer. The <samp><span class="option">-mno-save-toc-indirect</span></samp> option is the default.
|
|
|
|
<br><dt><code>-mcompat-align-parm</code><dt><code>-mno-compat-align-parm</code><dd><a name="index-mcompat_002dalign_002dparm-2369"></a>Generate (do not generate) code to pass structure parameters with a
|
|
maximum alignment of 64 bits, for compatibility with older versions
|
|
of GCC.
|
|
|
|
<p>Older versions of GCC (prior to 4.9.0) incorrectly did not align a
|
|
structure parameter on a 128-bit boundary when that structure contained
|
|
a member requiring 128-bit alignment. This is corrected in more
|
|
recent versions of GCC. This option may be used to generate code
|
|
that is compatible with functions compiled with older versions of
|
|
GCC.
|
|
|
|
<p>The <samp><span class="option">-mno-compat-align-parm</span></samp> option is the default.
|
|
</dl>
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</body></html>
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