SAME54P20A Test Project
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Instance description for TC5. More...
Go to the source code of this file.
Macros | |
#define | REG_TC5_CTRLA (*(RwReg *)0x42001800UL) |
(TC5) Control A | |
#define | REG_TC5_CTRLBCLR (*(RwReg8 *)0x42001804UL) |
(TC5) Control B Clear | |
#define | REG_TC5_CTRLBSET (*(RwReg8 *)0x42001805UL) |
(TC5) Control B Set | |
#define | REG_TC5_EVCTRL (*(RwReg16*)0x42001806UL) |
(TC5) Event Control | |
#define | REG_TC5_INTENCLR (*(RwReg8 *)0x42001808UL) |
(TC5) Interrupt Enable Clear | |
#define | REG_TC5_INTENSET (*(RwReg8 *)0x42001809UL) |
(TC5) Interrupt Enable Set | |
#define | REG_TC5_INTFLAG (*(RwReg8 *)0x4200180AUL) |
(TC5) Interrupt Flag Status and Clear | |
#define | REG_TC5_STATUS (*(RwReg8 *)0x4200180BUL) |
(TC5) Status | |
#define | REG_TC5_WAVE (*(RwReg8 *)0x4200180CUL) |
(TC5) Waveform Generation Control | |
#define | REG_TC5_DRVCTRL (*(RwReg8 *)0x4200180DUL) |
(TC5) Control C | |
#define | REG_TC5_DBGCTRL (*(RwReg8 *)0x4200180FUL) |
(TC5) Debug Control | |
#define | REG_TC5_SYNCBUSY (*(RoReg *)0x42001810UL) |
(TC5) Synchronization Status | |
#define | REG_TC5_COUNT16_COUNT (*(RwReg16*)0x42001814UL) |
(TC5) COUNT16 Count | |
#define | REG_TC5_COUNT16_CC0 (*(RwReg16*)0x4200181CUL) |
(TC5) COUNT16 Compare and Capture 0 | |
#define | REG_TC5_COUNT16_CC1 (*(RwReg16*)0x4200181EUL) |
(TC5) COUNT16 Compare and Capture 1 | |
#define | REG_TC5_COUNT16_CCBUF0 (*(RwReg16*)0x42001830UL) |
(TC5) COUNT16 Compare and Capture Buffer 0 | |
#define | REG_TC5_COUNT16_CCBUF1 (*(RwReg16*)0x42001832UL) |
(TC5) COUNT16 Compare and Capture Buffer 1 | |
#define | REG_TC5_COUNT32_COUNT (*(RwReg *)0x42001814UL) |
(TC5) COUNT32 Count | |
#define | REG_TC5_COUNT32_CC0 (*(RwReg *)0x4200181CUL) |
(TC5) COUNT32 Compare and Capture 0 | |
#define | REG_TC5_COUNT32_CC1 (*(RwReg *)0x42001820UL) |
(TC5) COUNT32 Compare and Capture 1 | |
#define | REG_TC5_COUNT32_CCBUF0 (*(RwReg *)0x42001830UL) |
(TC5) COUNT32 Compare and Capture Buffer 0 | |
#define | REG_TC5_COUNT32_CCBUF1 (*(RwReg *)0x42001834UL) |
(TC5) COUNT32 Compare and Capture Buffer 1 | |
#define | REG_TC5_COUNT8_COUNT (*(RwReg8 *)0x42001814UL) |
(TC5) COUNT8 Count | |
#define | REG_TC5_COUNT8_PER (*(RwReg8 *)0x4200181BUL) |
(TC5) COUNT8 Period | |
#define | REG_TC5_COUNT8_CC0 (*(RwReg8 *)0x4200181CUL) |
(TC5) COUNT8 Compare and Capture 0 | |
#define | REG_TC5_COUNT8_CC1 (*(RwReg8 *)0x4200181DUL) |
(TC5) COUNT8 Compare and Capture 1 | |
#define | REG_TC5_COUNT8_PERBUF (*(RwReg8 *)0x4200182FUL) |
(TC5) COUNT8 Period Buffer | |
#define | REG_TC5_COUNT8_CCBUF0 (*(RwReg8 *)0x42001830UL) |
(TC5) COUNT8 Compare and Capture Buffer 0 | |
#define | REG_TC5_COUNT8_CCBUF1 (*(RwReg8 *)0x42001831UL) |
(TC5) COUNT8 Compare and Capture Buffer 1 | |
#define | TC5_CC_NUM 2 |
#define | TC5_DMAC_ID_MC_0 60 |
#define | TC5_DMAC_ID_MC_1 61 |
#define | TC5_DMAC_ID_MC_LSB 60 |
#define | TC5_DMAC_ID_MC_MSB 61 |
#define | TC5_DMAC_ID_MC_SIZE 2 |
#define | TC5_DMAC_ID_OVF 59 |
#define | TC5_EXT 0 |
#define | TC5_GCLK_ID 30 |
#define | TC5_MASTER_SLAVE_MODE 2 |
#define | TC5_OW_NUM 2 |
Instance description for TC5.
Copyright (c) 2019 Microchip Technology Inc.
\asf_license_start
Definition in file tc5.h.