SAME54P20A Test Project
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Instance description for SERCOM3. More...
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Macros | |
#define | REG_SERCOM3_I2CM_CTRLA (*(RwReg *)0x41014000UL) |
(SERCOM3) I2CM Control A | |
#define | REG_SERCOM3_I2CM_CTRLB (*(RwReg *)0x41014004UL) |
(SERCOM3) I2CM Control B | |
#define | REG_SERCOM3_I2CM_CTRLC (*(RwReg *)0x41014008UL) |
(SERCOM3) I2CM Control C | |
#define | REG_SERCOM3_I2CM_BAUD (*(RwReg *)0x4101400CUL) |
(SERCOM3) I2CM Baud Rate | |
#define | REG_SERCOM3_I2CM_INTENCLR (*(RwReg8 *)0x41014014UL) |
(SERCOM3) I2CM Interrupt Enable Clear | |
#define | REG_SERCOM3_I2CM_INTENSET (*(RwReg8 *)0x41014016UL) |
(SERCOM3) I2CM Interrupt Enable Set | |
#define | REG_SERCOM3_I2CM_INTFLAG (*(RwReg8 *)0x41014018UL) |
(SERCOM3) I2CM Interrupt Flag Status and Clear | |
#define | REG_SERCOM3_I2CM_STATUS (*(RwReg16*)0x4101401AUL) |
(SERCOM3) I2CM Status | |
#define | REG_SERCOM3_I2CM_SYNCBUSY (*(RoReg *)0x4101401CUL) |
(SERCOM3) I2CM Synchronization Busy | |
#define | REG_SERCOM3_I2CM_ADDR (*(RwReg *)0x41014024UL) |
(SERCOM3) I2CM Address | |
#define | REG_SERCOM3_I2CM_DATA (*(RwReg *)0x41014028UL) |
(SERCOM3) I2CM Data | |
#define | REG_SERCOM3_I2CM_DBGCTRL (*(RwReg8 *)0x41014030UL) |
(SERCOM3) I2CM Debug Control | |
#define | REG_SERCOM3_I2CS_CTRLA (*(RwReg *)0x41014000UL) |
(SERCOM3) I2CS Control A | |
#define | REG_SERCOM3_I2CS_CTRLB (*(RwReg *)0x41014004UL) |
(SERCOM3) I2CS Control B | |
#define | REG_SERCOM3_I2CS_CTRLC (*(RwReg *)0x41014008UL) |
(SERCOM3) I2CS Control C | |
#define | REG_SERCOM3_I2CS_INTENCLR (*(RwReg8 *)0x41014014UL) |
(SERCOM3) I2CS Interrupt Enable Clear | |
#define | REG_SERCOM3_I2CS_INTENSET (*(RwReg8 *)0x41014016UL) |
(SERCOM3) I2CS Interrupt Enable Set | |
#define | REG_SERCOM3_I2CS_INTFLAG (*(RwReg8 *)0x41014018UL) |
(SERCOM3) I2CS Interrupt Flag Status and Clear | |
#define | REG_SERCOM3_I2CS_STATUS (*(RwReg16*)0x4101401AUL) |
(SERCOM3) I2CS Status | |
#define | REG_SERCOM3_I2CS_SYNCBUSY (*(RoReg *)0x4101401CUL) |
(SERCOM3) I2CS Synchronization Busy | |
#define | REG_SERCOM3_I2CS_LENGTH (*(RwReg16*)0x41014022UL) |
(SERCOM3) I2CS Length | |
#define | REG_SERCOM3_I2CS_ADDR (*(RwReg *)0x41014024UL) |
(SERCOM3) I2CS Address | |
#define | REG_SERCOM3_I2CS_DATA (*(RwReg *)0x41014028UL) |
(SERCOM3) I2CS Data | |
#define | REG_SERCOM3_SPI_CTRLA (*(RwReg *)0x41014000UL) |
(SERCOM3) SPI Control A | |
#define | REG_SERCOM3_SPI_CTRLB (*(RwReg *)0x41014004UL) |
(SERCOM3) SPI Control B | |
#define | REG_SERCOM3_SPI_CTRLC (*(RwReg *)0x41014008UL) |
(SERCOM3) SPI Control C | |
#define | REG_SERCOM3_SPI_BAUD (*(RwReg8 *)0x4101400CUL) |
(SERCOM3) SPI Baud Rate | |
#define | REG_SERCOM3_SPI_INTENCLR (*(RwReg8 *)0x41014014UL) |
(SERCOM3) SPI Interrupt Enable Clear | |
#define | REG_SERCOM3_SPI_INTENSET (*(RwReg8 *)0x41014016UL) |
(SERCOM3) SPI Interrupt Enable Set | |
#define | REG_SERCOM3_SPI_INTFLAG (*(RwReg8 *)0x41014018UL) |
(SERCOM3) SPI Interrupt Flag Status and Clear | |
#define | REG_SERCOM3_SPI_STATUS (*(RwReg16*)0x4101401AUL) |
(SERCOM3) SPI Status | |
#define | REG_SERCOM3_SPI_SYNCBUSY (*(RoReg *)0x4101401CUL) |
(SERCOM3) SPI Synchronization Busy | |
#define | REG_SERCOM3_SPI_LENGTH (*(RwReg16*)0x41014022UL) |
(SERCOM3) SPI Length | |
#define | REG_SERCOM3_SPI_ADDR (*(RwReg *)0x41014024UL) |
(SERCOM3) SPI Address | |
#define | REG_SERCOM3_SPI_DATA (*(RwReg *)0x41014028UL) |
(SERCOM3) SPI Data | |
#define | REG_SERCOM3_SPI_DBGCTRL (*(RwReg8 *)0x41014030UL) |
(SERCOM3) SPI Debug Control | |
#define | REG_SERCOM3_USART_CTRLA (*(RwReg *)0x41014000UL) |
(SERCOM3) USART Control A | |
#define | REG_SERCOM3_USART_CTRLB (*(RwReg *)0x41014004UL) |
(SERCOM3) USART Control B | |
#define | REG_SERCOM3_USART_CTRLC (*(RwReg *)0x41014008UL) |
(SERCOM3) USART Control C | |
#define | REG_SERCOM3_USART_BAUD (*(RwReg16*)0x4101400CUL) |
(SERCOM3) USART Baud Rate | |
#define | REG_SERCOM3_USART_RXPL (*(RwReg8 *)0x4101400EUL) |
(SERCOM3) USART Receive Pulse Length | |
#define | REG_SERCOM3_USART_INTENCLR (*(RwReg8 *)0x41014014UL) |
(SERCOM3) USART Interrupt Enable Clear | |
#define | REG_SERCOM3_USART_INTENSET (*(RwReg8 *)0x41014016UL) |
(SERCOM3) USART Interrupt Enable Set | |
#define | REG_SERCOM3_USART_INTFLAG (*(RwReg8 *)0x41014018UL) |
(SERCOM3) USART Interrupt Flag Status and Clear | |
#define | REG_SERCOM3_USART_STATUS (*(RwReg16*)0x4101401AUL) |
(SERCOM3) USART Status | |
#define | REG_SERCOM3_USART_SYNCBUSY (*(RoReg *)0x4101401CUL) |
(SERCOM3) USART Synchronization Busy | |
#define | REG_SERCOM3_USART_RXERRCNT (*(RoReg8 *)0x41014020UL) |
(SERCOM3) USART Receive Error Count | |
#define | REG_SERCOM3_USART_LENGTH (*(RwReg16*)0x41014022UL) |
(SERCOM3) USART Length | |
#define | REG_SERCOM3_USART_DATA (*(RwReg *)0x41014028UL) |
(SERCOM3) USART Data | |
#define | REG_SERCOM3_USART_DBGCTRL (*(RwReg8 *)0x41014030UL) |
(SERCOM3) USART Debug Control | |
#define | SERCOM3_CLK_REDUCTION 1 |
#define | SERCOM3_DLY_COMPENSATION 1 |
#define | SERCOM3_DMA 1 |
#define | SERCOM3_DMAC_ID_RX 10 |
#define | SERCOM3_DMAC_ID_TX 11 |
#define | SERCOM3_FIFO_DEPTH_POWER 1 |
#define | SERCOM3_GCLK_ID_CORE 24 |
#define | SERCOM3_GCLK_ID_SLOW 3 |
#define | SERCOM3_INT_MSB 6 |
#define | SERCOM3_I2CM 1 |
#define | SERCOM3_I2CS 1 |
#define | SERCOM3_I2CS_AUTO_ACK 1 |
#define | SERCOM3_I2CS_GROUP_CMD 1 |
#define | SERCOM3_I2CS_SDASETUP_CNT_SIZE 8 |
#define | SERCOM3_I2CS_SDASETUP_SIZE 4 |
#define | SERCOM3_I2CS_SUDAT 1 |
#define | SERCOM3_I2C_FASTMP 1 |
#define | SERCOM3_I2C_HSMODE 1 |
#define | SERCOM3_I2C_SCLSM_MODE 1 |
#define | SERCOM3_I2C_SMB_TIMEOUTS 1 |
#define | SERCOM3_I2C_TENBIT_ADR 1 |
#define | SERCOM3_PMSB 3 |
#define | SERCOM3_RETENTION_SUPPORT 0 |
#define | SERCOM3_SE_CNT 1 |
#define | SERCOM3_SPI 1 |
#define | SERCOM3_SPI_HW_SS_CTRL 1 |
#define | SERCOM3_SPI_ICSPACE_EXT 1 |
#define | SERCOM3_SPI_OZMO 0 |
#define | SERCOM3_SPI_WAKE_ON_SSL 1 |
#define | SERCOM3_TTBIT_EXTENSION 1 |
#define | SERCOM3_USART 1 |
#define | SERCOM3_USART_AUTOBAUD 1 |
#define | SERCOM3_USART_COLDET 1 |
#define | SERCOM3_USART_FLOW_CTRL 1 |
#define | SERCOM3_USART_FRAC_BAUD 1 |
#define | SERCOM3_USART_IRDA 1 |
#define | SERCOM3_USART_ISO7816 1 |
#define | SERCOM3_USART_LIN_MASTER 1 |
#define | SERCOM3_USART_RS485 1 |
#define | SERCOM3_USART_SAMPA_EXT 1 |
#define | SERCOM3_USART_SAMPR_EXT 1 |
Instance description for SERCOM3.
Copyright (c) 2019 Microchip Technology Inc.
\asf_license_start
Definition in file sercom3.h.