Instance description for USB. More...

Macros
#define	REG_USB_CTRLA ((RwReg8 )0x41000000UL)
	(USB) Control A

#define	REG_USB_SYNCBUSY ((RoReg8 )0x41000002UL)
	(USB) Synchronization Busy

#define	REG_USB_QOSCTRL ((RwReg8 )0x41000003UL)
	(USB) USB Quality Of Service

#define	REG_USB_FSMSTATUS ((RoReg8 )0x4100000DUL)
	(USB) Finite State Machine Status

#define	REG_USB_DESCADD ((RwReg )0x41000024UL)
	(USB) Descriptor Address

#define	REG_USB_PADCAL ((RwReg16)0x41000028UL)
	(USB) USB PAD Calibration

#define	REG_USB_DEVICE_CTRLB ((RwReg16)0x41000008UL)
	(USB) DEVICE Control B

#define	REG_USB_DEVICE_DADD ((RwReg8 )0x4100000AUL)
	(USB) DEVICE Device Address

#define	REG_USB_DEVICE_STATUS ((RoReg8 )0x4100000CUL)
	(USB) DEVICE Status

#define	REG_USB_DEVICE_FNUM ((RoReg16)0x41000010UL)
	(USB) DEVICE Device Frame Number

#define	REG_USB_DEVICE_INTENCLR ((RwReg16)0x41000014UL)
	(USB) DEVICE Device Interrupt Enable Clear

#define	REG_USB_DEVICE_INTENSET ((RwReg16)0x41000018UL)
	(USB) DEVICE Device Interrupt Enable Set

#define	REG_USB_DEVICE_INTFLAG ((RwReg16)0x4100001CUL)
	(USB) DEVICE Device Interrupt Flag

#define	REG_USB_DEVICE_EPINTSMRY ((RoReg16)0x41000020UL)
	(USB) DEVICE End Point Interrupt Summary

#define	REG_USB_DEVICE_ENDPOINT_EPCFG0 ((RwReg8 )0x41000100UL)
	(USB) DEVICE_ENDPOINT End Point Configuration 0

#define	REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR0 ((WoReg8 )0x41000104UL)
	(USB) DEVICE_ENDPOINT End Point Pipe Status Clear 0

#define	REG_USB_DEVICE_ENDPOINT_EPSTATUSSET0 ((WoReg8 )0x41000105UL)
	(USB) DEVICE_ENDPOINT End Point Pipe Status Set 0

#define	REG_USB_DEVICE_ENDPOINT_EPSTATUS0 ((RoReg8 )0x41000106UL)
	(USB) DEVICE_ENDPOINT End Point Pipe Status 0

#define	REG_USB_DEVICE_ENDPOINT_EPINTFLAG0 ((RwReg8 )0x41000107UL)
	(USB) DEVICE_ENDPOINT End Point Interrupt Flag 0

#define	REG_USB_DEVICE_ENDPOINT_EPINTENCLR0 ((RwReg8 )0x41000108UL)
	(USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 0

#define	REG_USB_DEVICE_ENDPOINT_EPINTENSET0 ((RwReg8 )0x41000109UL)
	(USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 0

#define	REG_USB_DEVICE_ENDPOINT_EPCFG1 ((RwReg8 )0x41000120UL)
	(USB) DEVICE_ENDPOINT End Point Configuration 1

#define	REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR1 ((WoReg8 )0x41000124UL)
	(USB) DEVICE_ENDPOINT End Point Pipe Status Clear 1

#define	REG_USB_DEVICE_ENDPOINT_EPSTATUSSET1 ((WoReg8 )0x41000125UL)
	(USB) DEVICE_ENDPOINT End Point Pipe Status Set 1

#define	REG_USB_DEVICE_ENDPOINT_EPSTATUS1 ((RoReg8 )0x41000126UL)
	(USB) DEVICE_ENDPOINT End Point Pipe Status 1

#define	REG_USB_DEVICE_ENDPOINT_EPINTFLAG1 ((RwReg8 )0x41000127UL)
	(USB) DEVICE_ENDPOINT End Point Interrupt Flag 1

#define	REG_USB_DEVICE_ENDPOINT_EPINTENCLR1 ((RwReg8 )0x41000128UL)
	(USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 1

#define	REG_USB_DEVICE_ENDPOINT_EPINTENSET1 ((RwReg8 )0x41000129UL)
	(USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 1

#define	REG_USB_DEVICE_ENDPOINT_EPCFG2 ((RwReg8 )0x41000140UL)
	(USB) DEVICE_ENDPOINT End Point Configuration 2

#define	REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR2 ((WoReg8 )0x41000144UL)
	(USB) DEVICE_ENDPOINT End Point Pipe Status Clear 2

#define	REG_USB_DEVICE_ENDPOINT_EPSTATUSSET2 ((WoReg8 )0x41000145UL)
	(USB) DEVICE_ENDPOINT End Point Pipe Status Set 2

#define	REG_USB_DEVICE_ENDPOINT_EPSTATUS2 ((RoReg8 )0x41000146UL)
	(USB) DEVICE_ENDPOINT End Point Pipe Status 2

#define	REG_USB_DEVICE_ENDPOINT_EPINTFLAG2 ((RwReg8 )0x41000147UL)
	(USB) DEVICE_ENDPOINT End Point Interrupt Flag 2

#define	REG_USB_DEVICE_ENDPOINT_EPINTENCLR2 ((RwReg8 )0x41000148UL)
	(USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 2

#define	REG_USB_DEVICE_ENDPOINT_EPINTENSET2 ((RwReg8 )0x41000149UL)
	(USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 2

#define	REG_USB_DEVICE_ENDPOINT_EPCFG3 ((RwReg8 )0x41000160UL)
	(USB) DEVICE_ENDPOINT End Point Configuration 3

#define	REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR3 ((WoReg8 )0x41000164UL)
	(USB) DEVICE_ENDPOINT End Point Pipe Status Clear 3

#define	REG_USB_DEVICE_ENDPOINT_EPSTATUSSET3 ((WoReg8 )0x41000165UL)
	(USB) DEVICE_ENDPOINT End Point Pipe Status Set 3

#define	REG_USB_DEVICE_ENDPOINT_EPSTATUS3 ((RoReg8 )0x41000166UL)
	(USB) DEVICE_ENDPOINT End Point Pipe Status 3

#define	REG_USB_DEVICE_ENDPOINT_EPINTFLAG3 ((RwReg8 )0x41000167UL)
	(USB) DEVICE_ENDPOINT End Point Interrupt Flag 3

#define	REG_USB_DEVICE_ENDPOINT_EPINTENCLR3 ((RwReg8 )0x41000168UL)
	(USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 3

#define	REG_USB_DEVICE_ENDPOINT_EPINTENSET3 ((RwReg8 )0x41000169UL)
	(USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 3

#define	REG_USB_DEVICE_ENDPOINT_EPCFG4 ((RwReg8 )0x41000180UL)
	(USB) DEVICE_ENDPOINT End Point Configuration 4

#define	REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR4 ((WoReg8 )0x41000184UL)
	(USB) DEVICE_ENDPOINT End Point Pipe Status Clear 4

#define	REG_USB_DEVICE_ENDPOINT_EPSTATUSSET4 ((WoReg8 )0x41000185UL)
	(USB) DEVICE_ENDPOINT End Point Pipe Status Set 4

#define	REG_USB_DEVICE_ENDPOINT_EPSTATUS4 ((RoReg8 )0x41000186UL)
	(USB) DEVICE_ENDPOINT End Point Pipe Status 4

#define	REG_USB_DEVICE_ENDPOINT_EPINTFLAG4 ((RwReg8 )0x41000187UL)
	(USB) DEVICE_ENDPOINT End Point Interrupt Flag 4

#define	REG_USB_DEVICE_ENDPOINT_EPINTENCLR4 ((RwReg8 )0x41000188UL)
	(USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 4

#define	REG_USB_DEVICE_ENDPOINT_EPINTENSET4 ((RwReg8 )0x41000189UL)
	(USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 4

#define	REG_USB_DEVICE_ENDPOINT_EPCFG5 ((RwReg8 )0x410001A0UL)
	(USB) DEVICE_ENDPOINT End Point Configuration 5

#define	REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR5 ((WoReg8 )0x410001A4UL)
	(USB) DEVICE_ENDPOINT End Point Pipe Status Clear 5

#define	REG_USB_DEVICE_ENDPOINT_EPSTATUSSET5 ((WoReg8 )0x410001A5UL)
	(USB) DEVICE_ENDPOINT End Point Pipe Status Set 5

#define	REG_USB_DEVICE_ENDPOINT_EPSTATUS5 ((RoReg8 )0x410001A6UL)
	(USB) DEVICE_ENDPOINT End Point Pipe Status 5

#define	REG_USB_DEVICE_ENDPOINT_EPINTFLAG5 ((RwReg8 )0x410001A7UL)
	(USB) DEVICE_ENDPOINT End Point Interrupt Flag 5

#define	REG_USB_DEVICE_ENDPOINT_EPINTENCLR5 ((RwReg8 )0x410001A8UL)
	(USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 5

#define	REG_USB_DEVICE_ENDPOINT_EPINTENSET5 ((RwReg8 )0x410001A9UL)
	(USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 5

#define	REG_USB_DEVICE_ENDPOINT_EPCFG6 ((RwReg8 )0x410001C0UL)
	(USB) DEVICE_ENDPOINT End Point Configuration 6

#define	REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR6 ((WoReg8 )0x410001C4UL)
	(USB) DEVICE_ENDPOINT End Point Pipe Status Clear 6

#define	REG_USB_DEVICE_ENDPOINT_EPSTATUSSET6 ((WoReg8 )0x410001C5UL)
	(USB) DEVICE_ENDPOINT End Point Pipe Status Set 6

#define	REG_USB_DEVICE_ENDPOINT_EPSTATUS6 ((RoReg8 )0x410001C6UL)
	(USB) DEVICE_ENDPOINT End Point Pipe Status 6

#define	REG_USB_DEVICE_ENDPOINT_EPINTFLAG6 ((RwReg8 )0x410001C7UL)
	(USB) DEVICE_ENDPOINT End Point Interrupt Flag 6

#define	REG_USB_DEVICE_ENDPOINT_EPINTENCLR6 ((RwReg8 )0x410001C8UL)
	(USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 6

#define	REG_USB_DEVICE_ENDPOINT_EPINTENSET6 ((RwReg8 )0x410001C9UL)
	(USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 6

#define	REG_USB_DEVICE_ENDPOINT_EPCFG7 ((RwReg8 )0x410001E0UL)
	(USB) DEVICE_ENDPOINT End Point Configuration 7

#define	REG_USB_DEVICE_ENDPOINT_EPSTATUSCLR7 ((WoReg8 )0x410001E4UL)
	(USB) DEVICE_ENDPOINT End Point Pipe Status Clear 7

#define	REG_USB_DEVICE_ENDPOINT_EPSTATUSSET7 ((WoReg8 )0x410001E5UL)
	(USB) DEVICE_ENDPOINT End Point Pipe Status Set 7

#define	REG_USB_DEVICE_ENDPOINT_EPSTATUS7 ((RoReg8 )0x410001E6UL)
	(USB) DEVICE_ENDPOINT End Point Pipe Status 7

#define	REG_USB_DEVICE_ENDPOINT_EPINTFLAG7 ((RwReg8 )0x410001E7UL)
	(USB) DEVICE_ENDPOINT End Point Interrupt Flag 7

#define	REG_USB_DEVICE_ENDPOINT_EPINTENCLR7 ((RwReg8 )0x410001E8UL)
	(USB) DEVICE_ENDPOINT End Point Interrupt Clear Flag 7

#define	REG_USB_DEVICE_ENDPOINT_EPINTENSET7 ((RwReg8 )0x410001E9UL)
	(USB) DEVICE_ENDPOINT End Point Interrupt Set Flag 7

#define	REG_USB_HOST_CTRLB ((RwReg16)0x41000008UL)
	(USB) HOST Control B

#define	REG_USB_HOST_HSOFC ((RwReg8 )0x4100000AUL)
	(USB) HOST Host Start Of Frame Control

#define	REG_USB_HOST_STATUS ((RwReg8 )0x4100000CUL)
	(USB) HOST Status

#define	REG_USB_HOST_FNUM ((RwReg16)0x41000010UL)
	(USB) HOST Host Frame Number

#define	REG_USB_HOST_FLENHIGH ((RoReg8 )0x41000012UL)
	(USB) HOST Host Frame Length

#define	REG_USB_HOST_INTENCLR ((RwReg16)0x41000014UL)
	(USB) HOST Host Interrupt Enable Clear

#define	REG_USB_HOST_INTENSET ((RwReg16)0x41000018UL)
	(USB) HOST Host Interrupt Enable Set

#define	REG_USB_HOST_INTFLAG ((RwReg16)0x4100001CUL)
	(USB) HOST Host Interrupt Flag

#define	REG_USB_HOST_PINTSMRY ((RoReg16)0x41000020UL)
	(USB) HOST Pipe Interrupt Summary

#define	REG_USB_HOST_PIPE_PCFG0 ((RwReg8 )0x41000100UL)
	(USB) HOST_PIPE End Point Configuration 0

#define	REG_USB_HOST_PIPE_BINTERVAL0 ((RwReg8 )0x41000103UL)
	(USB) HOST_PIPE Bus Access Period of Pipe 0

#define	REG_USB_HOST_PIPE_PSTATUSCLR0 ((WoReg8 )0x41000104UL)
	(USB) HOST_PIPE End Point Pipe Status Clear 0

#define	REG_USB_HOST_PIPE_PSTATUSSET0 ((WoReg8 )0x41000105UL)
	(USB) HOST_PIPE End Point Pipe Status Set 0

#define	REG_USB_HOST_PIPE_PSTATUS0 ((RoReg8 )0x41000106UL)
	(USB) HOST_PIPE End Point Pipe Status 0

#define	REG_USB_HOST_PIPE_PINTFLAG0 ((RwReg8 )0x41000107UL)
	(USB) HOST_PIPE Pipe Interrupt Flag 0

#define	REG_USB_HOST_PIPE_PINTENCLR0 ((RwReg8 )0x41000108UL)
	(USB) HOST_PIPE Pipe Interrupt Flag Clear 0

#define	REG_USB_HOST_PIPE_PINTENSET0 ((RwReg8 )0x41000109UL)
	(USB) HOST_PIPE Pipe Interrupt Flag Set 0

#define	REG_USB_HOST_PIPE_PCFG1 ((RwReg8 )0x41000120UL)
	(USB) HOST_PIPE End Point Configuration 1

#define	REG_USB_HOST_PIPE_BINTERVAL1 ((RwReg8 )0x41000123UL)
	(USB) HOST_PIPE Bus Access Period of Pipe 1

#define	REG_USB_HOST_PIPE_PSTATUSCLR1 ((WoReg8 )0x41000124UL)
	(USB) HOST_PIPE End Point Pipe Status Clear 1

#define	REG_USB_HOST_PIPE_PSTATUSSET1 ((WoReg8 )0x41000125UL)
	(USB) HOST_PIPE End Point Pipe Status Set 1

#define	REG_USB_HOST_PIPE_PSTATUS1 ((RoReg8 )0x41000126UL)
	(USB) HOST_PIPE End Point Pipe Status 1

#define	REG_USB_HOST_PIPE_PINTFLAG1 ((RwReg8 )0x41000127UL)
	(USB) HOST_PIPE Pipe Interrupt Flag 1

#define	REG_USB_HOST_PIPE_PINTENCLR1 ((RwReg8 )0x41000128UL)
	(USB) HOST_PIPE Pipe Interrupt Flag Clear 1

#define	REG_USB_HOST_PIPE_PINTENSET1 ((RwReg8 )0x41000129UL)
	(USB) HOST_PIPE Pipe Interrupt Flag Set 1

#define	REG_USB_HOST_PIPE_PCFG2 ((RwReg8 )0x41000140UL)
	(USB) HOST_PIPE End Point Configuration 2

#define	REG_USB_HOST_PIPE_BINTERVAL2 ((RwReg8 )0x41000143UL)
	(USB) HOST_PIPE Bus Access Period of Pipe 2

#define	REG_USB_HOST_PIPE_PSTATUSCLR2 ((WoReg8 )0x41000144UL)
	(USB) HOST_PIPE End Point Pipe Status Clear 2

#define	REG_USB_HOST_PIPE_PSTATUSSET2 ((WoReg8 )0x41000145UL)
	(USB) HOST_PIPE End Point Pipe Status Set 2

#define	REG_USB_HOST_PIPE_PSTATUS2 ((RoReg8 )0x41000146UL)
	(USB) HOST_PIPE End Point Pipe Status 2

#define	REG_USB_HOST_PIPE_PINTFLAG2 ((RwReg8 )0x41000147UL)
	(USB) HOST_PIPE Pipe Interrupt Flag 2

#define	REG_USB_HOST_PIPE_PINTENCLR2 ((RwReg8 )0x41000148UL)
	(USB) HOST_PIPE Pipe Interrupt Flag Clear 2

#define	REG_USB_HOST_PIPE_PINTENSET2 ((RwReg8 )0x41000149UL)
	(USB) HOST_PIPE Pipe Interrupt Flag Set 2

#define	REG_USB_HOST_PIPE_PCFG3 ((RwReg8 )0x41000160UL)
	(USB) HOST_PIPE End Point Configuration 3

#define	REG_USB_HOST_PIPE_BINTERVAL3 ((RwReg8 )0x41000163UL)
	(USB) HOST_PIPE Bus Access Period of Pipe 3

#define	REG_USB_HOST_PIPE_PSTATUSCLR3 ((WoReg8 )0x41000164UL)
	(USB) HOST_PIPE End Point Pipe Status Clear 3

#define	REG_USB_HOST_PIPE_PSTATUSSET3 ((WoReg8 )0x41000165UL)
	(USB) HOST_PIPE End Point Pipe Status Set 3

#define	REG_USB_HOST_PIPE_PSTATUS3 ((RoReg8 )0x41000166UL)
	(USB) HOST_PIPE End Point Pipe Status 3

#define	REG_USB_HOST_PIPE_PINTFLAG3 ((RwReg8 )0x41000167UL)
	(USB) HOST_PIPE Pipe Interrupt Flag 3

#define	REG_USB_HOST_PIPE_PINTENCLR3 ((RwReg8 )0x41000168UL)
	(USB) HOST_PIPE Pipe Interrupt Flag Clear 3

#define	REG_USB_HOST_PIPE_PINTENSET3 ((RwReg8 )0x41000169UL)
	(USB) HOST_PIPE Pipe Interrupt Flag Set 3

#define	REG_USB_HOST_PIPE_PCFG4 ((RwReg8 )0x41000180UL)
	(USB) HOST_PIPE End Point Configuration 4

#define	REG_USB_HOST_PIPE_BINTERVAL4 ((RwReg8 )0x41000183UL)
	(USB) HOST_PIPE Bus Access Period of Pipe 4

#define	REG_USB_HOST_PIPE_PSTATUSCLR4 ((WoReg8 )0x41000184UL)
	(USB) HOST_PIPE End Point Pipe Status Clear 4

#define	REG_USB_HOST_PIPE_PSTATUSSET4 ((WoReg8 )0x41000185UL)
	(USB) HOST_PIPE End Point Pipe Status Set 4

#define	REG_USB_HOST_PIPE_PSTATUS4 ((RoReg8 )0x41000186UL)
	(USB) HOST_PIPE End Point Pipe Status 4

#define	REG_USB_HOST_PIPE_PINTFLAG4 ((RwReg8 )0x41000187UL)
	(USB) HOST_PIPE Pipe Interrupt Flag 4

#define	REG_USB_HOST_PIPE_PINTENCLR4 ((RwReg8 )0x41000188UL)
	(USB) HOST_PIPE Pipe Interrupt Flag Clear 4

#define	REG_USB_HOST_PIPE_PINTENSET4 ((RwReg8 )0x41000189UL)
	(USB) HOST_PIPE Pipe Interrupt Flag Set 4

#define	REG_USB_HOST_PIPE_PCFG5 ((RwReg8 )0x410001A0UL)
	(USB) HOST_PIPE End Point Configuration 5

#define	REG_USB_HOST_PIPE_BINTERVAL5 ((RwReg8 )0x410001A3UL)
	(USB) HOST_PIPE Bus Access Period of Pipe 5

#define	REG_USB_HOST_PIPE_PSTATUSCLR5 ((WoReg8 )0x410001A4UL)
	(USB) HOST_PIPE End Point Pipe Status Clear 5

#define	REG_USB_HOST_PIPE_PSTATUSSET5 ((WoReg8 )0x410001A5UL)
	(USB) HOST_PIPE End Point Pipe Status Set 5

#define	REG_USB_HOST_PIPE_PSTATUS5 ((RoReg8 )0x410001A6UL)
	(USB) HOST_PIPE End Point Pipe Status 5

#define	REG_USB_HOST_PIPE_PINTFLAG5 ((RwReg8 )0x410001A7UL)
	(USB) HOST_PIPE Pipe Interrupt Flag 5

#define	REG_USB_HOST_PIPE_PINTENCLR5 ((RwReg8 )0x410001A8UL)
	(USB) HOST_PIPE Pipe Interrupt Flag Clear 5

#define	REG_USB_HOST_PIPE_PINTENSET5 ((RwReg8 )0x410001A9UL)
	(USB) HOST_PIPE Pipe Interrupt Flag Set 5

#define	REG_USB_HOST_PIPE_PCFG6 ((RwReg8 )0x410001C0UL)
	(USB) HOST_PIPE End Point Configuration 6

#define	REG_USB_HOST_PIPE_BINTERVAL6 ((RwReg8 )0x410001C3UL)
	(USB) HOST_PIPE Bus Access Period of Pipe 6

#define	REG_USB_HOST_PIPE_PSTATUSCLR6 ((WoReg8 )0x410001C4UL)
	(USB) HOST_PIPE End Point Pipe Status Clear 6

#define	REG_USB_HOST_PIPE_PSTATUSSET6 ((WoReg8 )0x410001C5UL)
	(USB) HOST_PIPE End Point Pipe Status Set 6

#define	REG_USB_HOST_PIPE_PSTATUS6 ((RoReg8 )0x410001C6UL)
	(USB) HOST_PIPE End Point Pipe Status 6

#define	REG_USB_HOST_PIPE_PINTFLAG6 ((RwReg8 )0x410001C7UL)
	(USB) HOST_PIPE Pipe Interrupt Flag 6

#define	REG_USB_HOST_PIPE_PINTENCLR6 ((RwReg8 )0x410001C8UL)
	(USB) HOST_PIPE Pipe Interrupt Flag Clear 6

#define	REG_USB_HOST_PIPE_PINTENSET6 ((RwReg8 )0x410001C9UL)
	(USB) HOST_PIPE Pipe Interrupt Flag Set 6

#define	REG_USB_HOST_PIPE_PCFG7 ((RwReg8 )0x410001E0UL)
	(USB) HOST_PIPE End Point Configuration 7

#define	REG_USB_HOST_PIPE_BINTERVAL7 ((RwReg8 )0x410001E3UL)
	(USB) HOST_PIPE Bus Access Period of Pipe 7

#define	REG_USB_HOST_PIPE_PSTATUSCLR7 ((WoReg8 )0x410001E4UL)
	(USB) HOST_PIPE End Point Pipe Status Clear 7

#define	REG_USB_HOST_PIPE_PSTATUSSET7 ((WoReg8 )0x410001E5UL)
	(USB) HOST_PIPE End Point Pipe Status Set 7

#define	REG_USB_HOST_PIPE_PSTATUS7 ((RoReg8 )0x410001E6UL)
	(USB) HOST_PIPE End Point Pipe Status 7

#define	REG_USB_HOST_PIPE_PINTFLAG7 ((RwReg8 )0x410001E7UL)
	(USB) HOST_PIPE Pipe Interrupt Flag 7

#define	REG_USB_HOST_PIPE_PINTENCLR7 ((RwReg8 )0x410001E8UL)
	(USB) HOST_PIPE Pipe Interrupt Flag Clear 7

#define	REG_USB_HOST_PIPE_PINTENSET7 ((RwReg8 )0x410001E9UL)
	(USB) HOST_PIPE Pipe Interrupt Flag Set 7

#define	USB_AHB_2_USB_FIFO_DEPTH 4

#define	USB_AHB_2_USB_RD_DATA_BITS 8

#define	USB_AHB_2_USB_WR_DATA_BITS 32

#define	USB_AHB_2_USB_WR_THRESHOLD 2

#define	USB_DATA_BUS_16_8 0

#define	USB_EPNUM 8

#define	USB_EPT_NUM 8

#define	USB_GCLK_ID 10

#define	USB_INITIAL_CONTROL_QOS 3

#define	USB_INITIAL_DATA_QOS 3

#define	USB_MISSING_SOF_DET_IMPLEMENTED 1

#define	USB_PIPE_NUM 8

#define	USB_SYSTEM_CLOCK_IS_CKUSB 0

#define	USB_USB_2_AHB_FIFO_DEPTH 4

#define	USB_USB_2_AHB_RD_DATA_BITS 16

#define	USB_USB_2_AHB_RD_THRESHOLD 2

#define	USB_USB_2_AHB_WR_DATA_BITS 8

Detailed Description

Instance description for USB.

\asf_license_start

Definition in file usb.h.

Macros

Detailed Description