SAME54P20A Test Project
|
Instance description for I2S. More...
Go to the source code of this file.
Macros | |
#define | REG_I2S_CTRLA (*(RwReg8 *)0x43002800UL) |
(I2S) Control A | |
#define | REG_I2S_CLKCTRL0 (*(RwReg *)0x43002804UL) |
(I2S) Clock Unit 0 Control | |
#define | REG_I2S_CLKCTRL1 (*(RwReg *)0x43002808UL) |
(I2S) Clock Unit 1 Control | |
#define | REG_I2S_INTENCLR (*(RwReg16*)0x4300280CUL) |
(I2S) Interrupt Enable Clear | |
#define | REG_I2S_INTENSET (*(RwReg16*)0x43002810UL) |
(I2S) Interrupt Enable Set | |
#define | REG_I2S_INTFLAG (*(RwReg16*)0x43002814UL) |
(I2S) Interrupt Flag Status and Clear | |
#define | REG_I2S_SYNCBUSY (*(RoReg16*)0x43002818UL) |
(I2S) Synchronization Status | |
#define | REG_I2S_TXCTRL (*(RwReg *)0x43002820UL) |
(I2S) Tx Serializer Control | |
#define | REG_I2S_RXCTRL (*(RwReg *)0x43002824UL) |
(I2S) Rx Serializer Control | |
#define | REG_I2S_TXDATA (*(WoReg *)0x43002830UL) |
(I2S) Tx Data | |
#define | REG_I2S_RXDATA (*(RoReg *)0x43002834UL) |
(I2S) Rx Data | |
#define | I2S_CLK_NUM 2 |
#define | I2S_DMAC_ID_RX_0 76 |
#define | I2S_DMAC_ID_RX_1 77 |
#define | I2S_DMAC_ID_RX_LSB 76 |
#define | I2S_DMAC_ID_RX_MSB 77 |
#define | I2S_DMAC_ID_RX_SIZE 2 |
#define | I2S_DMAC_ID_TX_0 78 |
#define | I2S_DMAC_ID_TX_1 79 |
#define | I2S_DMAC_ID_TX_LSB 78 |
#define | I2S_DMAC_ID_TX_MSB 79 |
#define | I2S_DMAC_ID_TX_SIZE 2 |
#define | I2S_GCLK_ID_0 43 |
#define | I2S_GCLK_ID_1 44 |
#define | I2S_GCLK_ID_LSB 43 |
#define | I2S_GCLK_ID_MSB 44 |
#define | I2S_GCLK_ID_SIZE 2 |
#define | I2S_MAX_SLOTS 8 |
#define | I2S_MAX_WL_BITS 32 |
#define | I2S_SER_NUM 2 |
Instance description for I2S.
Copyright (c) 2019 Microchip Technology Inc.
\asf_license_start
Definition in file i2s.h.