SAME54P20A Test Project
Data Structures | Macros
evsys.h File Reference

Component description for EVSYS. More...

Go to the source code of this file.

Data Structures

union  EVSYS_CTRLA_Type
 
union  EVSYS_SWEVT_Type
 
union  EVSYS_PRICTRL_Type
 
union  EVSYS_INTPEND_Type
 
union  EVSYS_INTSTATUS_Type
 
union  EVSYS_BUSYCH_Type
 
union  EVSYS_READYUSR_Type
 
union  EVSYS_CHANNEL_Type
 
union  EVSYS_CHINTENCLR_Type
 
union  EVSYS_CHINTENSET_Type
 
union  EVSYS_CHINTFLAG_Type
 
union  EVSYS_CHSTATUS_Type
 
union  EVSYS_USER_Type
 
struct  EvsysChannel
 EvsysChannel hardware registers. More...
 
struct  Evsys
 EVSYS hardware registers. More...
 

Macros

#define EVSYS_U2504
 
#define REV_EVSYS   0x100
 
#define EVSYS_CTRLA_OFFSET   0x000
 (EVSYS_CTRLA offset) Control
 
#define EVSYS_CTRLA_RESETVALUE   _U_(0x00)
 (EVSYS_CTRLA reset_value) Control
 
#define EVSYS_CTRLA_SWRST_Pos   0
 (EVSYS_CTRLA) Software Reset
 
#define EVSYS_CTRLA_SWRST   (_U_(0x1) << EVSYS_CTRLA_SWRST_Pos)
 
#define EVSYS_CTRLA_MASK   _U_(0x01)
 (EVSYS_CTRLA) MASK Register
 
#define EVSYS_SWEVT_OFFSET   0x004
 (EVSYS_SWEVT offset) Software Event
 
#define EVSYS_SWEVT_RESETVALUE   _U_(0x00000000)
 (EVSYS_SWEVT reset_value) Software Event
 
#define EVSYS_SWEVT_CHANNEL0_Pos   0
 (EVSYS_SWEVT) Channel 0 Software Selection
 
#define EVSYS_SWEVT_CHANNEL0   (_U_(1) << EVSYS_SWEVT_CHANNEL0_Pos)
 
#define EVSYS_SWEVT_CHANNEL1_Pos   1
 (EVSYS_SWEVT) Channel 1 Software Selection
 
#define EVSYS_SWEVT_CHANNEL1   (_U_(1) << EVSYS_SWEVT_CHANNEL1_Pos)
 
#define EVSYS_SWEVT_CHANNEL2_Pos   2
 (EVSYS_SWEVT) Channel 2 Software Selection
 
#define EVSYS_SWEVT_CHANNEL2   (_U_(1) << EVSYS_SWEVT_CHANNEL2_Pos)
 
#define EVSYS_SWEVT_CHANNEL3_Pos   3
 (EVSYS_SWEVT) Channel 3 Software Selection
 
#define EVSYS_SWEVT_CHANNEL3   (_U_(1) << EVSYS_SWEVT_CHANNEL3_Pos)
 
#define EVSYS_SWEVT_CHANNEL4_Pos   4
 (EVSYS_SWEVT) Channel 4 Software Selection
 
#define EVSYS_SWEVT_CHANNEL4   (_U_(1) << EVSYS_SWEVT_CHANNEL4_Pos)
 
#define EVSYS_SWEVT_CHANNEL5_Pos   5
 (EVSYS_SWEVT) Channel 5 Software Selection
 
#define EVSYS_SWEVT_CHANNEL5   (_U_(1) << EVSYS_SWEVT_CHANNEL5_Pos)
 
#define EVSYS_SWEVT_CHANNEL6_Pos   6
 (EVSYS_SWEVT) Channel 6 Software Selection
 
#define EVSYS_SWEVT_CHANNEL6   (_U_(1) << EVSYS_SWEVT_CHANNEL6_Pos)
 
#define EVSYS_SWEVT_CHANNEL7_Pos   7
 (EVSYS_SWEVT) Channel 7 Software Selection
 
#define EVSYS_SWEVT_CHANNEL7   (_U_(1) << EVSYS_SWEVT_CHANNEL7_Pos)
 
#define EVSYS_SWEVT_CHANNEL8_Pos   8
 (EVSYS_SWEVT) Channel 8 Software Selection
 
#define EVSYS_SWEVT_CHANNEL8   (_U_(1) << EVSYS_SWEVT_CHANNEL8_Pos)
 
#define EVSYS_SWEVT_CHANNEL9_Pos   9
 (EVSYS_SWEVT) Channel 9 Software Selection
 
#define EVSYS_SWEVT_CHANNEL9   (_U_(1) << EVSYS_SWEVT_CHANNEL9_Pos)
 
#define EVSYS_SWEVT_CHANNEL10_Pos   10
 (EVSYS_SWEVT) Channel 10 Software Selection
 
#define EVSYS_SWEVT_CHANNEL10   (_U_(1) << EVSYS_SWEVT_CHANNEL10_Pos)
 
#define EVSYS_SWEVT_CHANNEL11_Pos   11
 (EVSYS_SWEVT) Channel 11 Software Selection
 
#define EVSYS_SWEVT_CHANNEL11   (_U_(1) << EVSYS_SWEVT_CHANNEL11_Pos)
 
#define EVSYS_SWEVT_CHANNEL12_Pos   12
 (EVSYS_SWEVT) Channel 12 Software Selection
 
#define EVSYS_SWEVT_CHANNEL12   (_U_(1) << EVSYS_SWEVT_CHANNEL12_Pos)
 
#define EVSYS_SWEVT_CHANNEL13_Pos   13
 (EVSYS_SWEVT) Channel 13 Software Selection
 
#define EVSYS_SWEVT_CHANNEL13   (_U_(1) << EVSYS_SWEVT_CHANNEL13_Pos)
 
#define EVSYS_SWEVT_CHANNEL14_Pos   14
 (EVSYS_SWEVT) Channel 14 Software Selection
 
#define EVSYS_SWEVT_CHANNEL14   (_U_(1) << EVSYS_SWEVT_CHANNEL14_Pos)
 
#define EVSYS_SWEVT_CHANNEL15_Pos   15
 (EVSYS_SWEVT) Channel 15 Software Selection
 
#define EVSYS_SWEVT_CHANNEL15   (_U_(1) << EVSYS_SWEVT_CHANNEL15_Pos)
 
#define EVSYS_SWEVT_CHANNEL16_Pos   16
 (EVSYS_SWEVT) Channel 16 Software Selection
 
#define EVSYS_SWEVT_CHANNEL16   (_U_(1) << EVSYS_SWEVT_CHANNEL16_Pos)
 
#define EVSYS_SWEVT_CHANNEL17_Pos   17
 (EVSYS_SWEVT) Channel 17 Software Selection
 
#define EVSYS_SWEVT_CHANNEL17   (_U_(1) << EVSYS_SWEVT_CHANNEL17_Pos)
 
#define EVSYS_SWEVT_CHANNEL18_Pos   18
 (EVSYS_SWEVT) Channel 18 Software Selection
 
#define EVSYS_SWEVT_CHANNEL18   (_U_(1) << EVSYS_SWEVT_CHANNEL18_Pos)
 
#define EVSYS_SWEVT_CHANNEL19_Pos   19
 (EVSYS_SWEVT) Channel 19 Software Selection
 
#define EVSYS_SWEVT_CHANNEL19   (_U_(1) << EVSYS_SWEVT_CHANNEL19_Pos)
 
#define EVSYS_SWEVT_CHANNEL20_Pos   20
 (EVSYS_SWEVT) Channel 20 Software Selection
 
#define EVSYS_SWEVT_CHANNEL20   (_U_(1) << EVSYS_SWEVT_CHANNEL20_Pos)
 
#define EVSYS_SWEVT_CHANNEL21_Pos   21
 (EVSYS_SWEVT) Channel 21 Software Selection
 
#define EVSYS_SWEVT_CHANNEL21   (_U_(1) << EVSYS_SWEVT_CHANNEL21_Pos)
 
#define EVSYS_SWEVT_CHANNEL22_Pos   22
 (EVSYS_SWEVT) Channel 22 Software Selection
 
#define EVSYS_SWEVT_CHANNEL22   (_U_(1) << EVSYS_SWEVT_CHANNEL22_Pos)
 
#define EVSYS_SWEVT_CHANNEL23_Pos   23
 (EVSYS_SWEVT) Channel 23 Software Selection
 
#define EVSYS_SWEVT_CHANNEL23   (_U_(1) << EVSYS_SWEVT_CHANNEL23_Pos)
 
#define EVSYS_SWEVT_CHANNEL24_Pos   24
 (EVSYS_SWEVT) Channel 24 Software Selection
 
#define EVSYS_SWEVT_CHANNEL24   (_U_(1) << EVSYS_SWEVT_CHANNEL24_Pos)
 
#define EVSYS_SWEVT_CHANNEL25_Pos   25
 (EVSYS_SWEVT) Channel 25 Software Selection
 
#define EVSYS_SWEVT_CHANNEL25   (_U_(1) << EVSYS_SWEVT_CHANNEL25_Pos)
 
#define EVSYS_SWEVT_CHANNEL26_Pos   26
 (EVSYS_SWEVT) Channel 26 Software Selection
 
#define EVSYS_SWEVT_CHANNEL26   (_U_(1) << EVSYS_SWEVT_CHANNEL26_Pos)
 
#define EVSYS_SWEVT_CHANNEL27_Pos   27
 (EVSYS_SWEVT) Channel 27 Software Selection
 
#define EVSYS_SWEVT_CHANNEL27   (_U_(1) << EVSYS_SWEVT_CHANNEL27_Pos)
 
#define EVSYS_SWEVT_CHANNEL28_Pos   28
 (EVSYS_SWEVT) Channel 28 Software Selection
 
#define EVSYS_SWEVT_CHANNEL28   (_U_(1) << EVSYS_SWEVT_CHANNEL28_Pos)
 
#define EVSYS_SWEVT_CHANNEL29_Pos   29
 (EVSYS_SWEVT) Channel 29 Software Selection
 
#define EVSYS_SWEVT_CHANNEL29   (_U_(1) << EVSYS_SWEVT_CHANNEL29_Pos)
 
#define EVSYS_SWEVT_CHANNEL30_Pos   30
 (EVSYS_SWEVT) Channel 30 Software Selection
 
#define EVSYS_SWEVT_CHANNEL30   (_U_(1) << EVSYS_SWEVT_CHANNEL30_Pos)
 
#define EVSYS_SWEVT_CHANNEL31_Pos   31
 (EVSYS_SWEVT) Channel 31 Software Selection
 
#define EVSYS_SWEVT_CHANNEL31   (_U_(1) << EVSYS_SWEVT_CHANNEL31_Pos)
 
#define EVSYS_SWEVT_CHANNEL_Pos   0
 (EVSYS_SWEVT) Channel x Software Selection
 
#define EVSYS_SWEVT_CHANNEL_Msk   (_U_(0xFFFFFFFF) << EVSYS_SWEVT_CHANNEL_Pos)
 
#define EVSYS_SWEVT_CHANNEL(value)   (EVSYS_SWEVT_CHANNEL_Msk & ((value) << EVSYS_SWEVT_CHANNEL_Pos))
 
#define EVSYS_SWEVT_MASK   _U_(0xFFFFFFFF)
 (EVSYS_SWEVT) MASK Register
 
#define EVSYS_PRICTRL_OFFSET   0x008
 (EVSYS_PRICTRL offset) Priority Control
 
#define EVSYS_PRICTRL_RESETVALUE   _U_(0x00)
 (EVSYS_PRICTRL reset_value) Priority Control
 
#define EVSYS_PRICTRL_PRI_Pos   0
 (EVSYS_PRICTRL) Channel Priority Number
 
#define EVSYS_PRICTRL_PRI_Msk   (_U_(0xF) << EVSYS_PRICTRL_PRI_Pos)
 
#define EVSYS_PRICTRL_PRI(value)   (EVSYS_PRICTRL_PRI_Msk & ((value) << EVSYS_PRICTRL_PRI_Pos))
 
#define EVSYS_PRICTRL_RREN_Pos   7
 (EVSYS_PRICTRL) Round-Robin Scheduling Enable
 
#define EVSYS_PRICTRL_RREN   (_U_(0x1) << EVSYS_PRICTRL_RREN_Pos)
 
#define EVSYS_PRICTRL_MASK   _U_(0x8F)
 (EVSYS_PRICTRL) MASK Register
 
#define EVSYS_INTPEND_OFFSET   0x010
 (EVSYS_INTPEND offset) Channel Pending Interrupt
 
#define EVSYS_INTPEND_RESETVALUE   _U_(0x4000)
 (EVSYS_INTPEND reset_value) Channel Pending Interrupt
 
#define EVSYS_INTPEND_ID_Pos   0
 (EVSYS_INTPEND) Channel ID
 
#define EVSYS_INTPEND_ID_Msk   (_U_(0xF) << EVSYS_INTPEND_ID_Pos)
 
#define EVSYS_INTPEND_ID(value)   (EVSYS_INTPEND_ID_Msk & ((value) << EVSYS_INTPEND_ID_Pos))
 
#define EVSYS_INTPEND_OVR_Pos   8
 (EVSYS_INTPEND) Channel Overrun
 
#define EVSYS_INTPEND_OVR   (_U_(0x1) << EVSYS_INTPEND_OVR_Pos)
 
#define EVSYS_INTPEND_EVD_Pos   9
 (EVSYS_INTPEND) Channel Event Detected
 
#define EVSYS_INTPEND_EVD   (_U_(0x1) << EVSYS_INTPEND_EVD_Pos)
 
#define EVSYS_INTPEND_READY_Pos   14
 (EVSYS_INTPEND) Ready
 
#define EVSYS_INTPEND_READY   (_U_(0x1) << EVSYS_INTPEND_READY_Pos)
 
#define EVSYS_INTPEND_BUSY_Pos   15
 (EVSYS_INTPEND) Busy
 
#define EVSYS_INTPEND_BUSY   (_U_(0x1) << EVSYS_INTPEND_BUSY_Pos)
 
#define EVSYS_INTPEND_MASK   _U_(0xC30F)
 (EVSYS_INTPEND) MASK Register
 
#define EVSYS_INTSTATUS_OFFSET   0x014
 (EVSYS_INTSTATUS offset) Interrupt Status
 
#define EVSYS_INTSTATUS_RESETVALUE   _U_(0x00000000)
 (EVSYS_INTSTATUS reset_value) Interrupt Status
 
#define EVSYS_INTSTATUS_CHINT0_Pos   0
 (EVSYS_INTSTATUS) Channel 0 Pending Interrupt
 
#define EVSYS_INTSTATUS_CHINT0   (_U_(1) << EVSYS_INTSTATUS_CHINT0_Pos)
 
#define EVSYS_INTSTATUS_CHINT1_Pos   1
 (EVSYS_INTSTATUS) Channel 1 Pending Interrupt
 
#define EVSYS_INTSTATUS_CHINT1   (_U_(1) << EVSYS_INTSTATUS_CHINT1_Pos)
 
#define EVSYS_INTSTATUS_CHINT2_Pos   2
 (EVSYS_INTSTATUS) Channel 2 Pending Interrupt
 
#define EVSYS_INTSTATUS_CHINT2   (_U_(1) << EVSYS_INTSTATUS_CHINT2_Pos)
 
#define EVSYS_INTSTATUS_CHINT3_Pos   3
 (EVSYS_INTSTATUS) Channel 3 Pending Interrupt
 
#define EVSYS_INTSTATUS_CHINT3   (_U_(1) << EVSYS_INTSTATUS_CHINT3_Pos)
 
#define EVSYS_INTSTATUS_CHINT4_Pos   4
 (EVSYS_INTSTATUS) Channel 4 Pending Interrupt
 
#define EVSYS_INTSTATUS_CHINT4   (_U_(1) << EVSYS_INTSTATUS_CHINT4_Pos)
 
#define EVSYS_INTSTATUS_CHINT5_Pos   5
 (EVSYS_INTSTATUS) Channel 5 Pending Interrupt
 
#define EVSYS_INTSTATUS_CHINT5   (_U_(1) << EVSYS_INTSTATUS_CHINT5_Pos)
 
#define EVSYS_INTSTATUS_CHINT6_Pos   6
 (EVSYS_INTSTATUS) Channel 6 Pending Interrupt
 
#define EVSYS_INTSTATUS_CHINT6   (_U_(1) << EVSYS_INTSTATUS_CHINT6_Pos)
 
#define EVSYS_INTSTATUS_CHINT7_Pos   7
 (EVSYS_INTSTATUS) Channel 7 Pending Interrupt
 
#define EVSYS_INTSTATUS_CHINT7   (_U_(1) << EVSYS_INTSTATUS_CHINT7_Pos)
 
#define EVSYS_INTSTATUS_CHINT8_Pos   8
 (EVSYS_INTSTATUS) Channel 8 Pending Interrupt
 
#define EVSYS_INTSTATUS_CHINT8   (_U_(1) << EVSYS_INTSTATUS_CHINT8_Pos)
 
#define EVSYS_INTSTATUS_CHINT9_Pos   9
 (EVSYS_INTSTATUS) Channel 9 Pending Interrupt
 
#define EVSYS_INTSTATUS_CHINT9   (_U_(1) << EVSYS_INTSTATUS_CHINT9_Pos)
 
#define EVSYS_INTSTATUS_CHINT10_Pos   10
 (EVSYS_INTSTATUS) Channel 10 Pending Interrupt
 
#define EVSYS_INTSTATUS_CHINT10   (_U_(1) << EVSYS_INTSTATUS_CHINT10_Pos)
 
#define EVSYS_INTSTATUS_CHINT11_Pos   11
 (EVSYS_INTSTATUS) Channel 11 Pending Interrupt
 
#define EVSYS_INTSTATUS_CHINT11   (_U_(1) << EVSYS_INTSTATUS_CHINT11_Pos)
 
#define EVSYS_INTSTATUS_CHINT_Pos   0
 (EVSYS_INTSTATUS) Channel x Pending Interrupt
 
#define EVSYS_INTSTATUS_CHINT_Msk   (_U_(0xFFF) << EVSYS_INTSTATUS_CHINT_Pos)
 
#define EVSYS_INTSTATUS_CHINT(value)   (EVSYS_INTSTATUS_CHINT_Msk & ((value) << EVSYS_INTSTATUS_CHINT_Pos))
 
#define EVSYS_INTSTATUS_MASK   _U_(0x00000FFF)
 (EVSYS_INTSTATUS) MASK Register
 
#define EVSYS_BUSYCH_OFFSET   0x018
 (EVSYS_BUSYCH offset) Busy Channels
 
#define EVSYS_BUSYCH_RESETVALUE   _U_(0x00000000)
 (EVSYS_BUSYCH reset_value) Busy Channels
 
#define EVSYS_BUSYCH_BUSYCH0_Pos   0
 (EVSYS_BUSYCH) Busy Channel 0
 
#define EVSYS_BUSYCH_BUSYCH0   (_U_(1) << EVSYS_BUSYCH_BUSYCH0_Pos)
 
#define EVSYS_BUSYCH_BUSYCH1_Pos   1
 (EVSYS_BUSYCH) Busy Channel 1
 
#define EVSYS_BUSYCH_BUSYCH1   (_U_(1) << EVSYS_BUSYCH_BUSYCH1_Pos)
 
#define EVSYS_BUSYCH_BUSYCH2_Pos   2
 (EVSYS_BUSYCH) Busy Channel 2
 
#define EVSYS_BUSYCH_BUSYCH2   (_U_(1) << EVSYS_BUSYCH_BUSYCH2_Pos)
 
#define EVSYS_BUSYCH_BUSYCH3_Pos   3
 (EVSYS_BUSYCH) Busy Channel 3
 
#define EVSYS_BUSYCH_BUSYCH3   (_U_(1) << EVSYS_BUSYCH_BUSYCH3_Pos)
 
#define EVSYS_BUSYCH_BUSYCH4_Pos   4
 (EVSYS_BUSYCH) Busy Channel 4
 
#define EVSYS_BUSYCH_BUSYCH4   (_U_(1) << EVSYS_BUSYCH_BUSYCH4_Pos)
 
#define EVSYS_BUSYCH_BUSYCH5_Pos   5
 (EVSYS_BUSYCH) Busy Channel 5
 
#define EVSYS_BUSYCH_BUSYCH5   (_U_(1) << EVSYS_BUSYCH_BUSYCH5_Pos)
 
#define EVSYS_BUSYCH_BUSYCH6_Pos   6
 (EVSYS_BUSYCH) Busy Channel 6
 
#define EVSYS_BUSYCH_BUSYCH6   (_U_(1) << EVSYS_BUSYCH_BUSYCH6_Pos)
 
#define EVSYS_BUSYCH_BUSYCH7_Pos   7
 (EVSYS_BUSYCH) Busy Channel 7
 
#define EVSYS_BUSYCH_BUSYCH7   (_U_(1) << EVSYS_BUSYCH_BUSYCH7_Pos)
 
#define EVSYS_BUSYCH_BUSYCH8_Pos   8
 (EVSYS_BUSYCH) Busy Channel 8
 
#define EVSYS_BUSYCH_BUSYCH8   (_U_(1) << EVSYS_BUSYCH_BUSYCH8_Pos)
 
#define EVSYS_BUSYCH_BUSYCH9_Pos   9
 (EVSYS_BUSYCH) Busy Channel 9
 
#define EVSYS_BUSYCH_BUSYCH9   (_U_(1) << EVSYS_BUSYCH_BUSYCH9_Pos)
 
#define EVSYS_BUSYCH_BUSYCH10_Pos   10
 (EVSYS_BUSYCH) Busy Channel 10
 
#define EVSYS_BUSYCH_BUSYCH10   (_U_(1) << EVSYS_BUSYCH_BUSYCH10_Pos)
 
#define EVSYS_BUSYCH_BUSYCH11_Pos   11
 (EVSYS_BUSYCH) Busy Channel 11
 
#define EVSYS_BUSYCH_BUSYCH11   (_U_(1) << EVSYS_BUSYCH_BUSYCH11_Pos)
 
#define EVSYS_BUSYCH_BUSYCH_Pos   0
 (EVSYS_BUSYCH) Busy Channel x
 
#define EVSYS_BUSYCH_BUSYCH_Msk   (_U_(0xFFF) << EVSYS_BUSYCH_BUSYCH_Pos)
 
#define EVSYS_BUSYCH_BUSYCH(value)   (EVSYS_BUSYCH_BUSYCH_Msk & ((value) << EVSYS_BUSYCH_BUSYCH_Pos))
 
#define EVSYS_BUSYCH_MASK   _U_(0x00000FFF)
 (EVSYS_BUSYCH) MASK Register
 
#define EVSYS_READYUSR_OFFSET   0x01C
 (EVSYS_READYUSR offset) Ready Users
 
#define EVSYS_READYUSR_RESETVALUE   _U_(0xFFFFFFFF)
 (EVSYS_READYUSR reset_value) Ready Users
 
#define EVSYS_READYUSR_READYUSR0_Pos   0
 (EVSYS_READYUSR) Ready User for Channel 0
 
#define EVSYS_READYUSR_READYUSR0   (_U_(1) << EVSYS_READYUSR_READYUSR0_Pos)
 
#define EVSYS_READYUSR_READYUSR1_Pos   1
 (EVSYS_READYUSR) Ready User for Channel 1
 
#define EVSYS_READYUSR_READYUSR1   (_U_(1) << EVSYS_READYUSR_READYUSR1_Pos)
 
#define EVSYS_READYUSR_READYUSR2_Pos   2
 (EVSYS_READYUSR) Ready User for Channel 2
 
#define EVSYS_READYUSR_READYUSR2   (_U_(1) << EVSYS_READYUSR_READYUSR2_Pos)
 
#define EVSYS_READYUSR_READYUSR3_Pos   3
 (EVSYS_READYUSR) Ready User for Channel 3
 
#define EVSYS_READYUSR_READYUSR3   (_U_(1) << EVSYS_READYUSR_READYUSR3_Pos)
 
#define EVSYS_READYUSR_READYUSR4_Pos   4
 (EVSYS_READYUSR) Ready User for Channel 4
 
#define EVSYS_READYUSR_READYUSR4   (_U_(1) << EVSYS_READYUSR_READYUSR4_Pos)
 
#define EVSYS_READYUSR_READYUSR5_Pos   5
 (EVSYS_READYUSR) Ready User for Channel 5
 
#define EVSYS_READYUSR_READYUSR5   (_U_(1) << EVSYS_READYUSR_READYUSR5_Pos)
 
#define EVSYS_READYUSR_READYUSR6_Pos   6
 (EVSYS_READYUSR) Ready User for Channel 6
 
#define EVSYS_READYUSR_READYUSR6   (_U_(1) << EVSYS_READYUSR_READYUSR6_Pos)
 
#define EVSYS_READYUSR_READYUSR7_Pos   7
 (EVSYS_READYUSR) Ready User for Channel 7
 
#define EVSYS_READYUSR_READYUSR7   (_U_(1) << EVSYS_READYUSR_READYUSR7_Pos)
 
#define EVSYS_READYUSR_READYUSR8_Pos   8
 (EVSYS_READYUSR) Ready User for Channel 8
 
#define EVSYS_READYUSR_READYUSR8   (_U_(1) << EVSYS_READYUSR_READYUSR8_Pos)
 
#define EVSYS_READYUSR_READYUSR9_Pos   9
 (EVSYS_READYUSR) Ready User for Channel 9
 
#define EVSYS_READYUSR_READYUSR9   (_U_(1) << EVSYS_READYUSR_READYUSR9_Pos)
 
#define EVSYS_READYUSR_READYUSR10_Pos   10
 (EVSYS_READYUSR) Ready User for Channel 10
 
#define EVSYS_READYUSR_READYUSR10   (_U_(1) << EVSYS_READYUSR_READYUSR10_Pos)
 
#define EVSYS_READYUSR_READYUSR11_Pos   11
 (EVSYS_READYUSR) Ready User for Channel 11
 
#define EVSYS_READYUSR_READYUSR11   (_U_(1) << EVSYS_READYUSR_READYUSR11_Pos)
 
#define EVSYS_READYUSR_READYUSR_Pos   0
 (EVSYS_READYUSR) Ready User for Channel x
 
#define EVSYS_READYUSR_READYUSR_Msk   (_U_(0xFFF) << EVSYS_READYUSR_READYUSR_Pos)
 
#define EVSYS_READYUSR_READYUSR(value)   (EVSYS_READYUSR_READYUSR_Msk & ((value) << EVSYS_READYUSR_READYUSR_Pos))
 
#define EVSYS_READYUSR_MASK   _U_(0x00000FFF)
 (EVSYS_READYUSR) MASK Register
 
#define EVSYS_CHANNEL_OFFSET   0x020
 (EVSYS_CHANNEL offset) Channel n Control
 
#define EVSYS_CHANNEL_RESETVALUE   _U_(0x00008000)
 (EVSYS_CHANNEL reset_value) Channel n Control
 
#define EVSYS_CHANNEL_EVGEN_Pos   0
 (EVSYS_CHANNEL) Event Generator Selection
 
#define EVSYS_CHANNEL_EVGEN_Msk   (_U_(0x7F) << EVSYS_CHANNEL_EVGEN_Pos)
 
#define EVSYS_CHANNEL_EVGEN(value)   (EVSYS_CHANNEL_EVGEN_Msk & ((value) << EVSYS_CHANNEL_EVGEN_Pos))
 
#define EVSYS_CHANNEL_PATH_Pos   8
 (EVSYS_CHANNEL) Path Selection
 
#define EVSYS_CHANNEL_PATH_Msk   (_U_(0x3) << EVSYS_CHANNEL_PATH_Pos)
 
#define EVSYS_CHANNEL_PATH(value)   (EVSYS_CHANNEL_PATH_Msk & ((value) << EVSYS_CHANNEL_PATH_Pos))
 
#define EVSYS_CHANNEL_PATH_SYNCHRONOUS_Val   _U_(0x0)
 (EVSYS_CHANNEL) Synchronous path
 
#define EVSYS_CHANNEL_PATH_RESYNCHRONIZED_Val   _U_(0x1)
 (EVSYS_CHANNEL) Resynchronized path
 
#define EVSYS_CHANNEL_PATH_ASYNCHRONOUS_Val   _U_(0x2)
 (EVSYS_CHANNEL) Asynchronous path
 
#define EVSYS_CHANNEL_PATH_SYNCHRONOUS   (EVSYS_CHANNEL_PATH_SYNCHRONOUS_Val << EVSYS_CHANNEL_PATH_Pos)
 
#define EVSYS_CHANNEL_PATH_RESYNCHRONIZED   (EVSYS_CHANNEL_PATH_RESYNCHRONIZED_Val << EVSYS_CHANNEL_PATH_Pos)
 
#define EVSYS_CHANNEL_PATH_ASYNCHRONOUS   (EVSYS_CHANNEL_PATH_ASYNCHRONOUS_Val << EVSYS_CHANNEL_PATH_Pos)
 
#define EVSYS_CHANNEL_EDGSEL_Pos   10
 (EVSYS_CHANNEL) Edge Detection Selection
 
#define EVSYS_CHANNEL_EDGSEL_Msk   (_U_(0x3) << EVSYS_CHANNEL_EDGSEL_Pos)
 
#define EVSYS_CHANNEL_EDGSEL(value)   (EVSYS_CHANNEL_EDGSEL_Msk & ((value) << EVSYS_CHANNEL_EDGSEL_Pos))
 
#define EVSYS_CHANNEL_EDGSEL_NO_EVT_OUTPUT_Val   _U_(0x0)
 (EVSYS_CHANNEL) No event output when using the resynchronized or synchronous path
 
#define EVSYS_CHANNEL_EDGSEL_RISING_EDGE_Val   _U_(0x1)
 (EVSYS_CHANNEL) Event detection only on the rising edge of the signal from the event generator when using the resynchronized or synchronous path
 
#define EVSYS_CHANNEL_EDGSEL_FALLING_EDGE_Val   _U_(0x2)
 (EVSYS_CHANNEL) Event detection only on the falling edge of the signal from the event generator when using the resynchronized or synchronous path
 
#define EVSYS_CHANNEL_EDGSEL_BOTH_EDGES_Val   _U_(0x3)
 (EVSYS_CHANNEL) Event detection on rising and falling edges of the signal from the event generator when using the resynchronized or synchronous path
 
#define EVSYS_CHANNEL_EDGSEL_NO_EVT_OUTPUT   (EVSYS_CHANNEL_EDGSEL_NO_EVT_OUTPUT_Val << EVSYS_CHANNEL_EDGSEL_Pos)
 
#define EVSYS_CHANNEL_EDGSEL_RISING_EDGE   (EVSYS_CHANNEL_EDGSEL_RISING_EDGE_Val << EVSYS_CHANNEL_EDGSEL_Pos)
 
#define EVSYS_CHANNEL_EDGSEL_FALLING_EDGE   (EVSYS_CHANNEL_EDGSEL_FALLING_EDGE_Val << EVSYS_CHANNEL_EDGSEL_Pos)
 
#define EVSYS_CHANNEL_EDGSEL_BOTH_EDGES   (EVSYS_CHANNEL_EDGSEL_BOTH_EDGES_Val << EVSYS_CHANNEL_EDGSEL_Pos)
 
#define EVSYS_CHANNEL_RUNSTDBY_Pos   14
 (EVSYS_CHANNEL) Run in standby
 
#define EVSYS_CHANNEL_RUNSTDBY   (_U_(0x1) << EVSYS_CHANNEL_RUNSTDBY_Pos)
 
#define EVSYS_CHANNEL_ONDEMAND_Pos   15
 (EVSYS_CHANNEL) Generic Clock On Demand
 
#define EVSYS_CHANNEL_ONDEMAND   (_U_(0x1) << EVSYS_CHANNEL_ONDEMAND_Pos)
 
#define EVSYS_CHANNEL_MASK   _U_(0x0000CF7F)
 (EVSYS_CHANNEL) MASK Register
 
#define EVSYS_CHINTENCLR_OFFSET   0x024
 (EVSYS_CHINTENCLR offset) Channel n Interrupt Enable Clear
 
#define EVSYS_CHINTENCLR_RESETVALUE   _U_(0x00)
 (EVSYS_CHINTENCLR reset_value) Channel n Interrupt Enable Clear
 
#define EVSYS_CHINTENCLR_OVR_Pos   0
 (EVSYS_CHINTENCLR) Channel Overrun Interrupt Disable
 
#define EVSYS_CHINTENCLR_OVR   (_U_(0x1) << EVSYS_CHINTENCLR_OVR_Pos)
 
#define EVSYS_CHINTENCLR_EVD_Pos   1
 (EVSYS_CHINTENCLR) Channel Event Detected Interrupt Disable
 
#define EVSYS_CHINTENCLR_EVD   (_U_(0x1) << EVSYS_CHINTENCLR_EVD_Pos)
 
#define EVSYS_CHINTENCLR_MASK   _U_(0x03)
 (EVSYS_CHINTENCLR) MASK Register
 
#define EVSYS_CHINTENSET_OFFSET   0x025
 (EVSYS_CHINTENSET offset) Channel n Interrupt Enable Set
 
#define EVSYS_CHINTENSET_RESETVALUE   _U_(0x00)
 (EVSYS_CHINTENSET reset_value) Channel n Interrupt Enable Set
 
#define EVSYS_CHINTENSET_OVR_Pos   0
 (EVSYS_CHINTENSET) Channel Overrun Interrupt Enable
 
#define EVSYS_CHINTENSET_OVR   (_U_(0x1) << EVSYS_CHINTENSET_OVR_Pos)
 
#define EVSYS_CHINTENSET_EVD_Pos   1
 (EVSYS_CHINTENSET) Channel Event Detected Interrupt Enable
 
#define EVSYS_CHINTENSET_EVD   (_U_(0x1) << EVSYS_CHINTENSET_EVD_Pos)
 
#define EVSYS_CHINTENSET_MASK   _U_(0x03)
 (EVSYS_CHINTENSET) MASK Register
 
#define EVSYS_CHINTFLAG_OFFSET   0x026
 (EVSYS_CHINTFLAG offset) Channel n Interrupt Flag Status and Clear
 
#define EVSYS_CHINTFLAG_RESETVALUE   _U_(0x00)
 (EVSYS_CHINTFLAG reset_value) Channel n Interrupt Flag Status and Clear
 
#define EVSYS_CHINTFLAG_OVR_Pos   0
 (EVSYS_CHINTFLAG) Channel Overrun
 
#define EVSYS_CHINTFLAG_OVR   (_U_(0x1) << EVSYS_CHINTFLAG_OVR_Pos)
 
#define EVSYS_CHINTFLAG_EVD_Pos   1
 (EVSYS_CHINTFLAG) Channel Event Detected
 
#define EVSYS_CHINTFLAG_EVD   (_U_(0x1) << EVSYS_CHINTFLAG_EVD_Pos)
 
#define EVSYS_CHINTFLAG_MASK   _U_(0x03)
 (EVSYS_CHINTFLAG) MASK Register
 
#define EVSYS_CHSTATUS_OFFSET   0x027
 (EVSYS_CHSTATUS offset) Channel n Status
 
#define EVSYS_CHSTATUS_RESETVALUE   _U_(0x01)
 (EVSYS_CHSTATUS reset_value) Channel n Status
 
#define EVSYS_CHSTATUS_RDYUSR_Pos   0
 (EVSYS_CHSTATUS) Ready User
 
#define EVSYS_CHSTATUS_RDYUSR   (_U_(0x1) << EVSYS_CHSTATUS_RDYUSR_Pos)
 
#define EVSYS_CHSTATUS_BUSYCH_Pos   1
 (EVSYS_CHSTATUS) Busy Channel
 
#define EVSYS_CHSTATUS_BUSYCH   (_U_(0x1) << EVSYS_CHSTATUS_BUSYCH_Pos)
 
#define EVSYS_CHSTATUS_MASK   _U_(0x03)
 (EVSYS_CHSTATUS) MASK Register
 
#define EVSYS_USER_OFFSET   0x120
 (EVSYS_USER offset) User Multiplexer n
 
#define EVSYS_USER_RESETVALUE   _U_(0x00000000)
 (EVSYS_USER reset_value) User Multiplexer n
 
#define EVSYS_USER_CHANNEL_Pos   0
 (EVSYS_USER) Channel Event Selection
 
#define EVSYS_USER_CHANNEL_Msk   (_U_(0x3F) << EVSYS_USER_CHANNEL_Pos)
 
#define EVSYS_USER_CHANNEL(value)   (EVSYS_USER_CHANNEL_Msk & ((value) << EVSYS_USER_CHANNEL_Pos))
 
#define EVSYS_USER_MASK   _U_(0x0000003F)
 (EVSYS_USER) MASK Register
 

Detailed Description

Component description for EVSYS.

Copyright (c) 2019 Microchip Technology Inc.

\asf_license_start

Definition in file evsys.h.