SAME54P20A Test Project
Data Fields
Gclk Struct Reference

GCLK hardware registers. More...

#include <gclk.h>

Data Fields

__IO GCLK_CTRLA_Type CTRLA
 Offset: 0x00 (R/W 8) Control.
 
RoReg8 Reserved1 [0x3]
 
__I GCLK_SYNCBUSY_Type SYNCBUSY
 Offset: 0x04 (R/ 32) Synchronization Busy.
 
RoReg8 Reserved2 [0x18]
 
__IO GCLK_GENCTRL_Type GENCTRL [12]
 Offset: 0x20 (R/W 32) Generic Clock Generator Control.
 
RoReg8 Reserved3 [0x30]
 
__IO GCLK_PCHCTRL_Type PCHCTRL [48]
 Offset: 0x80 (R/W 32) Peripheral Clock Control.
 

Detailed Description

GCLK hardware registers.

Definition at line 259 of file gclk.h.


The documentation for this struct was generated from the following file: