SAME54P20A Test Project
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Instance description for PCC. More...
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Macros | |
#define | REG_PCC_MR (*(RwReg *)0x43002C00UL) |
(PCC) Mode Register | |
#define | REG_PCC_IER (*(WoReg *)0x43002C04UL) |
(PCC) Interrupt Enable Register | |
#define | REG_PCC_IDR (*(WoReg *)0x43002C08UL) |
(PCC) Interrupt Disable Register | |
#define | REG_PCC_IMR (*(RoReg *)0x43002C0CUL) |
(PCC) Interrupt Mask Register | |
#define | REG_PCC_ISR (*(RoReg *)0x43002C10UL) |
(PCC) Interrupt Status Register | |
#define | REG_PCC_RHR (*(RoReg *)0x43002C14UL) |
(PCC) Reception Holding Register | |
#define | REG_PCC_WPMR (*(RwReg *)0x43002CE0UL) |
(PCC) Write Protection Mode Register | |
#define | REG_PCC_WPSR (*(RoReg *)0x43002CE4UL) |
(PCC) Write Protection Status Register | |
#define | PCC_DATA_SIZE 14 |
#define | PCC_DMAC_ID_RX 80 |
Instance description for PCC.
Copyright (c) 2019 Microchip Technology Inc.
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Definition in file pcc.h.