Instance description for OSCCTRL. More...

Macros
#define	REG_OSCCTRL_EVCTRL ((RwReg8 )0x40001000UL)
	(OSCCTRL) Event Control

#define	REG_OSCCTRL_INTENCLR ((RwReg )0x40001004UL)
	(OSCCTRL) Interrupt Enable Clear

#define	REG_OSCCTRL_INTENSET ((RwReg )0x40001008UL)
	(OSCCTRL) Interrupt Enable Set

#define	REG_OSCCTRL_INTFLAG ((RwReg )0x4000100CUL)
	(OSCCTRL) Interrupt Flag Status and Clear

#define	REG_OSCCTRL_STATUS ((RoReg )0x40001010UL)
	(OSCCTRL) Status

#define	REG_OSCCTRL_XOSCCTRL0 ((RwReg )0x40001014UL)
	(OSCCTRL) External Multipurpose Crystal Oscillator Control 0

#define	REG_OSCCTRL_XOSCCTRL1 ((RwReg )0x40001018UL)
	(OSCCTRL) External Multipurpose Crystal Oscillator Control 1

#define	REG_OSCCTRL_DFLLCTRLA ((RwReg8 )0x4000101CUL)
	(OSCCTRL) DFLL48M Control A

#define	REG_OSCCTRL_DFLLCTRLB ((RwReg8 )0x40001020UL)
	(OSCCTRL) DFLL48M Control B

#define	REG_OSCCTRL_DFLLVAL ((RwReg )0x40001024UL)
	(OSCCTRL) DFLL48M Value

#define	REG_OSCCTRL_DFLLMUL ((RwReg )0x40001028UL)
	(OSCCTRL) DFLL48M Multiplier

#define	REG_OSCCTRL_DFLLSYNC ((RwReg8 )0x4000102CUL)
	(OSCCTRL) DFLL48M Synchronization

#define	REG_OSCCTRL_DPLLCTRLA0 ((RwReg8 )0x40001030UL)
	(OSCCTRL) DPLL Control A 0

#define	REG_OSCCTRL_DPLLRATIO0 ((RwReg )0x40001034UL)
	(OSCCTRL) DPLL Ratio Control 0

#define	REG_OSCCTRL_DPLLCTRLB0 ((RwReg )0x40001038UL)
	(OSCCTRL) DPLL Control B 0

#define	REG_OSCCTRL_DPLLSYNCBUSY0 ((RoReg )0x4000103CUL)
	(OSCCTRL) DPLL Synchronization Busy 0

#define	REG_OSCCTRL_DPLLSTATUS0 ((RoReg )0x40001040UL)
	(OSCCTRL) DPLL Status 0

#define	REG_OSCCTRL_DPLLCTRLA1 ((RwReg8 )0x40001044UL)
	(OSCCTRL) DPLL Control A 1

#define	REG_OSCCTRL_DPLLRATIO1 ((RwReg )0x40001048UL)
	(OSCCTRL) DPLL Ratio Control 1

#define	REG_OSCCTRL_DPLLCTRLB1 ((RwReg )0x4000104CUL)
	(OSCCTRL) DPLL Control B 1

#define	REG_OSCCTRL_DPLLSYNCBUSY1 ((RoReg )0x40001050UL)
	(OSCCTRL) DPLL Synchronization Busy 1

#define	REG_OSCCTRL_DPLLSTATUS1 ((RoReg )0x40001054UL)
	(OSCCTRL) DPLL Status 1

#define	OSCCTRL_DFLLS_NUM 1

#define	OSCCTRL_DFLL_IMPLEMENTED 1

#define	OSCCTRL_DFLL48M_BIASTESTPT_IMPLEMENTED 0

#define	OSCCTRL_DFLL48M_CDACSTEPSIZE_SIZE 2

#define	OSCCTRL_DFLL48M_COARSE_RESET_VALUE 32

#define	OSCCTRL_DFLL48M_COARSE_SIZE 6

#define	OSCCTRL_DFLL48M_ENABLE_RESET_VALUE 1

#define	OSCCTRL_DFLL48M_FDACSTEPSIZE_SIZE 2

#define	OSCCTRL_DFLL48M_FINE_RESET_VALUE 128

#define	OSCCTRL_DFLL48M_FINE_SIZE 8

#define	OSCCTRL_DFLL48M_ONDEMAND_RESET_VALUE 1

#define	OSCCTRL_DFLL48M_RUNSTDBY_RESET_VALUE 0

#define	OSCCTRL_DFLL48M_TCAL_SIZE 4

#define	OSCCTRL_DFLL48M_TCBIAS_SIZE 2

#define	OSCCTRL_DFLL48M_TESTPTSEL_SIZE 3

#define	OSCCTRL_DFLL48M_WAITLOCK_ACTIVE 1

#define	OSCCTRL_DPLLS_NUM 2

#define	OSCCTRL_DPLL0_IMPLEMENTED 1

#define	OSCCTRL_DPLL0_I12ND_I12NDFRAC_PAD_CONTROL 0

#define	OSCCTRL_DPLL0_OCC_IMPLEMENTED 1

#define	OSCCTRL_DPLL1_IMPLEMENTED 1

#define	OSCCTRL_DPLL1_I12ND_I12NDFRAC_PAD_CONTROL 0

#define	OSCCTRL_DPLL1_OCC_IMPLEMENTED 0

#define	OSCCTRL_GCLK_ID_DFLL48 0

#define	OSCCTRL_GCLK_ID_FDPLL0 1

#define	OSCCTRL_GCLK_ID_FDPLL1 2

#define	OSCCTRL_GCLK_ID_FDPLL032K 3

#define	OSCCTRL_GCLK_ID_FDPLL132K 3

#define	OSCCTRL_OSC16M_IMPLEMENTED 0

#define	OSCCTRL_OSC48M_IMPLEMENTED 0

#define	OSCCTRL_OSC48M_NUM 1

#define	OSCCTRL_RCOSCS_NUM 1

#define	OSCCTRL_XOSCS_NUM 2

#define	OSCCTRL_XOSC0_CFD_CLK_SELECT_SIZE 4

#define	OSCCTRL_XOSC0_CFD_IMPLEMENTED 1

#define	OSCCTRL_XOSC0_IMPLEMENTED 1

#define	OSCCTRL_XOSC0_ONDEMAND_RESET_VALUE 1

#define	OSCCTRL_XOSC0_RUNSTDBY_RESET_VALUE 0

#define	OSCCTRL_XOSC1_CFD_CLK_SELECT_SIZE 4

#define	OSCCTRL_XOSC1_CFD_IMPLEMENTED 1

#define	OSCCTRL_XOSC1_IMPLEMENTED 1

#define	OSCCTRL_XOSC1_ONDEMAND_RESET_VALUE 1

#define	OSCCTRL_XOSC1_RUNSTDBY_RESET_VALUE 0

#define	OSCCTRL_DFLL48M_VERSION 0x100

#define	OSCCTRL_FDPLL_VERSION 0x100

#define	OSCCTRL_XOSC_VERSION 0x100

Detailed Description

Instance description for OSCCTRL.

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Definition in file oscctrl.h.

Macros

Detailed Description