SAME54P20A Test Project
Macros
nvmctrl.h File Reference

Instance description for NVMCTRL. More...

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Macros

#define REG_NVMCTRL_CTRLA   (*(RwReg16*)0x41004000UL)
 (NVMCTRL) Control A
 
#define REG_NVMCTRL_CTRLB   (*(WoReg16*)0x41004004UL)
 (NVMCTRL) Control B
 
#define REG_NVMCTRL_PARAM   (*(RoReg *)0x41004008UL)
 (NVMCTRL) NVM Parameter
 
#define REG_NVMCTRL_INTENCLR   (*(RwReg16*)0x4100400CUL)
 (NVMCTRL) Interrupt Enable Clear
 
#define REG_NVMCTRL_INTENSET   (*(RwReg16*)0x4100400EUL)
 (NVMCTRL) Interrupt Enable Set
 
#define REG_NVMCTRL_INTFLAG   (*(RwReg16*)0x41004010UL)
 (NVMCTRL) Interrupt Flag Status and Clear
 
#define REG_NVMCTRL_STATUS   (*(RoReg16*)0x41004012UL)
 (NVMCTRL) Status
 
#define REG_NVMCTRL_ADDR   (*(RwReg *)0x41004014UL)
 (NVMCTRL) Address
 
#define REG_NVMCTRL_RUNLOCK   (*(RoReg *)0x41004018UL)
 (NVMCTRL) Lock Section
 
#define REG_NVMCTRL_PBLDATA0   (*(RoReg *)0x4100401CUL)
 (NVMCTRL) Page Buffer Load Data x 0
 
#define REG_NVMCTRL_PBLDATA1   (*(RoReg *)0x41004020UL)
 (NVMCTRL) Page Buffer Load Data x 1
 
#define REG_NVMCTRL_ECCERR   (*(RoReg *)0x41004024UL)
 (NVMCTRL) ECC Error Status Register
 
#define REG_NVMCTRL_DBGCTRL   (*(RwReg8 *)0x41004028UL)
 (NVMCTRL) Debug Control
 
#define REG_NVMCTRL_SEECFG   (*(RwReg8 *)0x4100402AUL)
 (NVMCTRL) SmartEEPROM Configuration Register
 
#define REG_NVMCTRL_SEESTAT   (*(RoReg *)0x4100402CUL)
 (NVMCTRL) SmartEEPROM Status Register
 
#define NVMCTRL_BLOCK_SIZE   8192
 
#define NVMCTRL_CLK_AHB_ID   6
 
#define NVMCTRL_CLK_AHB_ID_CACHE   23
 
#define NVMCTRL_CLK_AHB_ID_SMEEPROM   22
 
#define NVMCTRL_PAGE_SIZE   512
 

Detailed Description

Instance description for NVMCTRL.

Copyright (c) 2019 Microchip Technology Inc.

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Definition in file nvmctrl.h.