SAME54P20A Test Project
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Instance description for TCC3. More...
Go to the source code of this file.
Macros | |
#define | REG_TCC3_CTRLA (*(RwReg *)0x42001000UL) |
(TCC3) Control A | |
#define | REG_TCC3_CTRLBCLR (*(RwReg8 *)0x42001004UL) |
(TCC3) Control B Clear | |
#define | REG_TCC3_CTRLBSET (*(RwReg8 *)0x42001005UL) |
(TCC3) Control B Set | |
#define | REG_TCC3_SYNCBUSY (*(RoReg *)0x42001008UL) |
(TCC3) Synchronization Busy | |
#define | REG_TCC3_FCTRLA (*(RwReg *)0x4200100CUL) |
(TCC3) Recoverable Fault A Configuration | |
#define | REG_TCC3_FCTRLB (*(RwReg *)0x42001010UL) |
(TCC3) Recoverable Fault B Configuration | |
#define | REG_TCC3_DRVCTRL (*(RwReg *)0x42001018UL) |
(TCC3) Driver Control | |
#define | REG_TCC3_DBGCTRL (*(RwReg8 *)0x4200101EUL) |
(TCC3) Debug Control | |
#define | REG_TCC3_EVCTRL (*(RwReg *)0x42001020UL) |
(TCC3) Event Control | |
#define | REG_TCC3_INTENCLR (*(RwReg *)0x42001024UL) |
(TCC3) Interrupt Enable Clear | |
#define | REG_TCC3_INTENSET (*(RwReg *)0x42001028UL) |
(TCC3) Interrupt Enable Set | |
#define | REG_TCC3_INTFLAG (*(RwReg *)0x4200102CUL) |
(TCC3) Interrupt Flag Status and Clear | |
#define | REG_TCC3_STATUS (*(RwReg *)0x42001030UL) |
(TCC3) Status | |
#define | REG_TCC3_COUNT (*(RwReg *)0x42001034UL) |
(TCC3) Count | |
#define | REG_TCC3_WAVE (*(RwReg *)0x4200103CUL) |
(TCC3) Waveform Control | |
#define | REG_TCC3_PER (*(RwReg *)0x42001040UL) |
(TCC3) Period | |
#define | REG_TCC3_CC0 (*(RwReg *)0x42001044UL) |
(TCC3) Compare and Capture 0 | |
#define | REG_TCC3_CC1 (*(RwReg *)0x42001048UL) |
(TCC3) Compare and Capture 1 | |
#define | REG_TCC3_PERBUF (*(RwReg *)0x4200106CUL) |
(TCC3) Period Buffer | |
#define | REG_TCC3_CCBUF0 (*(RwReg *)0x42001070UL) |
(TCC3) Compare and Capture Buffer 0 | |
#define | REG_TCC3_CCBUF1 (*(RwReg *)0x42001074UL) |
(TCC3) Compare and Capture Buffer 1 | |
#define | TCC3_CC_NUM 2 |
#define | TCC3_DITHERING 0 |
#define | TCC3_DMAC_ID_MC_0 39 |
#define | TCC3_DMAC_ID_MC_1 40 |
#define | TCC3_DMAC_ID_MC_LSB 39 |
#define | TCC3_DMAC_ID_MC_MSB 40 |
#define | TCC3_DMAC_ID_MC_SIZE 2 |
#define | TCC3_DMAC_ID_OVF 38 |
#define | TCC3_DTI 0 |
#define | TCC3_EXT 0 |
#define | TCC3_GCLK_ID 29 |
#define | TCC3_MASTER_SLAVE_MODE 0 |
#define | TCC3_OTMX 0 |
#define | TCC3_OW_NUM 2 |
#define | TCC3_PG 0 |
#define | TCC3_SIZE 16 |
#define | TCC3_SWAP 0 |
Instance description for TCC3.
Copyright (c) 2019 Microchip Technology Inc.
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Definition in file tcc3.h.