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<a href="#pub-attribs">Data Fields</a> </div>
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<div class="title">Pcc Struct Reference</div> </div>
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<p>PCC hardware registers.
<a href="structPcc.html#details">More...</a></p>
<p><code>#include <<a class="el" href="component_2pcc_8h_source.html">pcc.h</a>></code></p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a>
Data Fields</h2></td></tr>
<tr class="memitem:ae240887b2bf7144186f620fe54b7b4ce"><td class="memItemLeft" align="right" valign="top"><a id="ae240887b2bf7144186f620fe54b7b4ce"></a>
__IO <a class="el" href="unionPCC__MR__Type.html">PCC_MR_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structPcc.html#ae240887b2bf7144186f620fe54b7b4ce">MR</a></td></tr>
<tr class="memdesc:ae240887b2bf7144186f620fe54b7b4ce"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x00 (R/W 32) Mode Register. <br /></td></tr>
<tr class="separator:ae240887b2bf7144186f620fe54b7b4ce"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a6c2954b3c6aa92058a24957870027bd6"><td class="memItemLeft" align="right" valign="top"><a id="a6c2954b3c6aa92058a24957870027bd6"></a>
__O <a class="el" href="unionPCC__IER__Type.html">PCC_IER_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structPcc.html#a6c2954b3c6aa92058a24957870027bd6">IER</a></td></tr>
<tr class="memdesc:a6c2954b3c6aa92058a24957870027bd6"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x04 ( /W 32) Interrupt Enable Register. <br /></td></tr>
<tr class="separator:a6c2954b3c6aa92058a24957870027bd6"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a68a7f18eb1d2a51b0db3d6ef49708e43"><td class="memItemLeft" align="right" valign="top"><a id="a68a7f18eb1d2a51b0db3d6ef49708e43"></a>
__O <a class="el" href="unionPCC__IDR__Type.html">PCC_IDR_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structPcc.html#a68a7f18eb1d2a51b0db3d6ef49708e43">IDR</a></td></tr>
<tr class="memdesc:a68a7f18eb1d2a51b0db3d6ef49708e43"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x08 ( /W 32) Interrupt Disable Register. <br /></td></tr>
<tr class="separator:a68a7f18eb1d2a51b0db3d6ef49708e43"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:acb3566521ba318766a1a3ecbdbd8baae"><td class="memItemLeft" align="right" valign="top"><a id="acb3566521ba318766a1a3ecbdbd8baae"></a>
__I <a class="el" href="unionPCC__IMR__Type.html">PCC_IMR_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structPcc.html#acb3566521ba318766a1a3ecbdbd8baae">IMR</a></td></tr>
<tr class="memdesc:acb3566521ba318766a1a3ecbdbd8baae"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x0C (R/ 32) Interrupt Mask Register. <br /></td></tr>
<tr class="separator:acb3566521ba318766a1a3ecbdbd8baae"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:aacd3b5efe72afb0bea29042ebc85e35c"><td class="memItemLeft" align="right" valign="top"><a id="aacd3b5efe72afb0bea29042ebc85e35c"></a>
__I <a class="el" href="unionPCC__ISR__Type.html">PCC_ISR_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structPcc.html#aacd3b5efe72afb0bea29042ebc85e35c">ISR</a></td></tr>
<tr class="memdesc:aacd3b5efe72afb0bea29042ebc85e35c"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x10 (R/ 32) Interrupt Status Register. <br /></td></tr>
<tr class="separator:aacd3b5efe72afb0bea29042ebc85e35c"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ad7af51ea47759671b95a4f2c961e5438"><td class="memItemLeft" align="right" valign="top"><a id="ad7af51ea47759671b95a4f2c961e5438"></a>
__I <a class="el" href="unionPCC__RHR__Type.html">PCC_RHR_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structPcc.html#ad7af51ea47759671b95a4f2c961e5438">RHR</a></td></tr>
<tr class="memdesc:ad7af51ea47759671b95a4f2c961e5438"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x14 (R/ 32) Reception Holding Register. <br /></td></tr>
<tr class="separator:ad7af51ea47759671b95a4f2c961e5438"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a4bda15eb898e1d7ec3063b51346241f8"><td class="memItemLeft" align="right" valign="top"><a id="a4bda15eb898e1d7ec3063b51346241f8"></a>
<a class="el" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> </td><td class="memItemRight" valign="bottom"><b>Reserved1</b> [0xC8]</td></tr>
<tr class="separator:a4bda15eb898e1d7ec3063b51346241f8"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a4773bc88915b9d5405d3de9de0b13f28"><td class="memItemLeft" align="right" valign="top"><a id="a4773bc88915b9d5405d3de9de0b13f28"></a>
__IO <a class="el" href="unionPCC__WPMR__Type.html">PCC_WPMR_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structPcc.html#a4773bc88915b9d5405d3de9de0b13f28">WPMR</a></td></tr>
<tr class="memdesc:a4773bc88915b9d5405d3de9de0b13f28"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0xE0 (R/W 32) Write Protection Mode Register. <br /></td></tr>
<tr class="separator:a4773bc88915b9d5405d3de9de0b13f28"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:aa2759a62fec64920b9d9886645cebf65"><td class="memItemLeft" align="right" valign="top"><a id="aa2759a62fec64920b9d9886645cebf65"></a>
__I <a class="el" href="unionPCC__WPSR__Type.html">PCC_WPSR_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structPcc.html#aa2759a62fec64920b9d9886645cebf65">WPSR</a></td></tr>
<tr class="memdesc:aa2759a62fec64920b9d9886645cebf65"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0xE4 (R/ 32) Write Protection Status Register. <br /></td></tr>
<tr class="separator:aa2759a62fec64920b9d9886645cebf65"><td class="memSeparator" colspan="2"> </td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>PCC hardware registers. </p>
<p class="definition">Definition at line <a class="el" href="component_2pcc_8h_source.html#l00236">236</a> of file <a class="el" href="component_2pcc_8h_source.html">pcc.h</a>.</p>
</div><hr/>The documentation for this struct was generated from the following file:<ul>
<li>/storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/component/<a class="el" href="component_2pcc_8h_source.html">pcc.h</a></li>
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