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<title>SAME54P20A Test Project: Mclk Struct Reference</title>
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<a href="#pub-attribs">Data Fields</a> </div>
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<div class="title">Mclk Struct Reference</div> </div>
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<p>MCLK hardware registers.
<a href="structMclk.html#details">More...</a></p>
<p><code>#include <<a class="el" href="component_2mclk_8h_source.html">mclk.h</a>></code></p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a>
Data Fields</h2></td></tr>
<tr class="memitem:a99d864df4fc06f58ca29c09520ad6b3d"><td class="memItemLeft" align="right" valign="top"><a id="a99d864df4fc06f58ca29c09520ad6b3d"></a>
<a class="el" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> </td><td class="memItemRight" valign="bottom"><b>Reserved1</b> [0x1]</td></tr>
<tr class="separator:a99d864df4fc06f58ca29c09520ad6b3d"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a1e40a8efebeb4c0f3369640d85f1c3b0"><td class="memItemLeft" align="right" valign="top"><a id="a1e40a8efebeb4c0f3369640d85f1c3b0"></a>
__IO <a class="el" href="unionMCLK__INTENCLR__Type.html">MCLK_INTENCLR_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structMclk.html#a1e40a8efebeb4c0f3369640d85f1c3b0">INTENCLR</a></td></tr>
<tr class="memdesc:a1e40a8efebeb4c0f3369640d85f1c3b0"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x01 (R/W 8) Interrupt Enable Clear. <br /></td></tr>
<tr class="separator:a1e40a8efebeb4c0f3369640d85f1c3b0"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ad82c6c646b216ebc79ed5e6963d3dd47"><td class="memItemLeft" align="right" valign="top"><a id="ad82c6c646b216ebc79ed5e6963d3dd47"></a>
__IO <a class="el" href="unionMCLK__INTENSET__Type.html">MCLK_INTENSET_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structMclk.html#ad82c6c646b216ebc79ed5e6963d3dd47">INTENSET</a></td></tr>
<tr class="memdesc:ad82c6c646b216ebc79ed5e6963d3dd47"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x02 (R/W 8) Interrupt Enable Set. <br /></td></tr>
<tr class="separator:ad82c6c646b216ebc79ed5e6963d3dd47"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a0f0cf763c2481c68676860e3a3d25eef"><td class="memItemLeft" align="right" valign="top"><a id="a0f0cf763c2481c68676860e3a3d25eef"></a>
__IO <a class="el" href="unionMCLK__INTFLAG__Type.html">MCLK_INTFLAG_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structMclk.html#a0f0cf763c2481c68676860e3a3d25eef">INTFLAG</a></td></tr>
<tr class="memdesc:a0f0cf763c2481c68676860e3a3d25eef"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x03 (R/W 8) Interrupt Flag Status and Clear. <br /></td></tr>
<tr class="separator:a0f0cf763c2481c68676860e3a3d25eef"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ad4666527690ddf4e762c74371d897192"><td class="memItemLeft" align="right" valign="top"><a id="ad4666527690ddf4e762c74371d897192"></a>
__I <a class="el" href="unionMCLK__HSDIV__Type.html">MCLK_HSDIV_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structMclk.html#ad4666527690ddf4e762c74371d897192">HSDIV</a></td></tr>
<tr class="memdesc:ad4666527690ddf4e762c74371d897192"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x04 (R/ 8) HS Clock Division. <br /></td></tr>
<tr class="separator:ad4666527690ddf4e762c74371d897192"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a4a4de422fd7e853df9d7b167f0b1779e"><td class="memItemLeft" align="right" valign="top"><a id="a4a4de422fd7e853df9d7b167f0b1779e"></a>
__IO <a class="el" href="unionMCLK__CPUDIV__Type.html">MCLK_CPUDIV_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structMclk.html#a4a4de422fd7e853df9d7b167f0b1779e">CPUDIV</a></td></tr>
<tr class="memdesc:a4a4de422fd7e853df9d7b167f0b1779e"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x05 (R/W 8) CPU Clock Division. <br /></td></tr>
<tr class="separator:a4a4de422fd7e853df9d7b167f0b1779e"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ad284ebfc78e4da71ba7820814b649729"><td class="memItemLeft" align="right" valign="top"><a id="ad284ebfc78e4da71ba7820814b649729"></a>
<a class="el" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> </td><td class="memItemRight" valign="bottom"><b>Reserved2</b> [0xA]</td></tr>
<tr class="separator:ad284ebfc78e4da71ba7820814b649729"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a19047323742152d4d61d3c2c80ff7e4d"><td class="memItemLeft" align="right" valign="top"><a id="a19047323742152d4d61d3c2c80ff7e4d"></a>
__IO <a class="el" href="unionMCLK__AHBMASK__Type.html">MCLK_AHBMASK_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structMclk.html#a19047323742152d4d61d3c2c80ff7e4d">AHBMASK</a></td></tr>
<tr class="memdesc:a19047323742152d4d61d3c2c80ff7e4d"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x10 (R/W 32) AHB Mask. <br /></td></tr>
<tr class="separator:a19047323742152d4d61d3c2c80ff7e4d"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ad8232a5e70531ff311723357b78d717a"><td class="memItemLeft" align="right" valign="top"><a id="ad8232a5e70531ff311723357b78d717a"></a>
__IO <a class="el" href="unionMCLK__APBAMASK__Type.html">MCLK_APBAMASK_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structMclk.html#ad8232a5e70531ff311723357b78d717a">APBAMASK</a></td></tr>
<tr class="memdesc:ad8232a5e70531ff311723357b78d717a"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x14 (R/W 32) APBA Mask. <br /></td></tr>
<tr class="separator:ad8232a5e70531ff311723357b78d717a"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:aefa9f88794d425d01ad77fb0b6d77d7a"><td class="memItemLeft" align="right" valign="top"><a id="aefa9f88794d425d01ad77fb0b6d77d7a"></a>
__IO <a class="el" href="unionMCLK__APBBMASK__Type.html">MCLK_APBBMASK_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structMclk.html#aefa9f88794d425d01ad77fb0b6d77d7a">APBBMASK</a></td></tr>
<tr class="memdesc:aefa9f88794d425d01ad77fb0b6d77d7a"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x18 (R/W 32) APBB Mask. <br /></td></tr>
<tr class="separator:aefa9f88794d425d01ad77fb0b6d77d7a"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a80a2bc0146a01cde098f8748564c0296"><td class="memItemLeft" align="right" valign="top"><a id="a80a2bc0146a01cde098f8748564c0296"></a>
__IO <a class="el" href="unionMCLK__APBCMASK__Type.html">MCLK_APBCMASK_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structMclk.html#a80a2bc0146a01cde098f8748564c0296">APBCMASK</a></td></tr>
<tr class="memdesc:a80a2bc0146a01cde098f8748564c0296"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x1C (R/W 32) APBC Mask. <br /></td></tr>
<tr class="separator:a80a2bc0146a01cde098f8748564c0296"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a0098200cac621e1c03b4bb6e0cf91895"><td class="memItemLeft" align="right" valign="top"><a id="a0098200cac621e1c03b4bb6e0cf91895"></a>
__IO <a class="el" href="unionMCLK__APBDMASK__Type.html">MCLK_APBDMASK_Type</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="structMclk.html#a0098200cac621e1c03b4bb6e0cf91895">APBDMASK</a></td></tr>
<tr class="memdesc:a0098200cac621e1c03b4bb6e0cf91895"><td class="mdescLeft"> </td><td class="mdescRight">Offset: 0x20 (R/W 32) APBD Mask. <br /></td></tr>
<tr class="separator:a0098200cac621e1c03b4bb6e0cf91895"><td class="memSeparator" colspan="2"> </td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>MCLK hardware registers. </p>
<p class="definition">Definition at line <a class="el" href="component_2mclk_8h_source.html#l00464">464</a> of file <a class="el" href="component_2mclk_8h_source.html">mclk.h</a>.</p>
</div><hr/>The documentation for this struct was generated from the following file:<ul>
<li>/storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/component/<a class="el" href="component_2mclk_8h_source.html">mclk.h</a></li>
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