picop.h File Reference

Instance description for PICOP. More...

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Macros
#define	REG_PICOP_ID0   (*(RwReg *)0x4100E000U)
	(PICOP) ID 0
#define	REG_PICOP_ID1   (*(RwReg *)0x4100E004U)
	(PICOP) ID 1
#define	REG_PICOP_ID2   (*(RwReg *)0x4100E008U)
	(PICOP) ID 2
#define	REG_PICOP_ID3   (*(RwReg *)0x4100E00CU)
	(PICOP) ID 3
#define	REG_PICOP_ID4   (*(RwReg *)0x4100E010U)
	(PICOP) ID 4
#define	REG_PICOP_ID5   (*(RwReg *)0x4100E014U)
	(PICOP) ID 5
#define	REG_PICOP_ID6   (*(RwReg *)0x4100E018U)
	(PICOP) ID 6
#define	REG_PICOP_ID7   (*(RwReg *)0x4100E01CU)
	(PICOP) ID 7
#define	REG_PICOP_CONFIG   (*(RwReg *)0x4100E020U)
	(PICOP) Configuration
#define	REG_PICOP_CTRL   (*(RwReg *)0x4100E024U)
	(PICOP) Control
#define	REG_PICOP_CMD   (*(RwReg *)0x4100E028U)
	(PICOP) Command
#define	REG_PICOP_PC   (*(RwReg *)0x4100E02CU)
	(PICOP) Program Counter
#define	REG_PICOP_HF   (*(RwReg *)0x4100E030U)
	(PICOP) Host Flags
#define	REG_PICOP_HFCTRL   (*(RwReg *)0x4100E034U)
	(PICOP) Host Flag Control
#define	REG_PICOP_HFSETCLR0   (*(RwReg *)0x4100E038U)
	(PICOP) Host Flags Set/Clr
#define	REG_PICOP_HFSETCLR1   (*(RwReg *)0x4100E03CU)
	(PICOP) Host Flags Set/Clr
#define	REG_PICOP_OCDCONFIG   (*(RwReg *)0x4100E050U)
	(PICOP) OCD Configuration
#define	REG_PICOP_OCDCONTROL   (*(RwReg *)0x4100E054U)
	(PICOP) OCD Control
#define	REG_PICOP_OCDSTATUS   (*(RwReg *)0x4100E058U)
	(PICOP) OCD Status and Command
#define	REG_PICOP_OCDPC   (*(RwReg *)0x4100E05CU)
	(PICOP) ODC Program Counter
#define	REG_PICOP_OCDFEAT   (*(RwReg *)0x4100E060U)
	(PICOP) OCD Features
#define	REG_PICOP_OCDCCNT   (*(RwReg *)0x4100E068U)
	(PICOP) OCD Cycle Counter
#define	REG_PICOP_OCDBPGEN0   (*(RwReg *)0x4100E070U)
	(PICOP) OCD Breakpoint Generator 0
#define	REG_PICOP_OCDBPGEN1   (*(RwReg *)0x4100E074U)
	(PICOP) OCD Breakpoint Generator 1
#define	REG_PICOP_OCDBPGEN2   (*(RwReg *)0x4100E078U)
	(PICOP) OCD Breakpoint Generator 2
#define	REG_PICOP_OCDBPGEN3   (*(RwReg *)0x4100E07CU)
	(PICOP) OCD Breakpoint Generator 3
#define	REG_PICOP_R3R0   (*(RwReg *)0x4100E080U)
	(PICOP) R3 to 0
#define	REG_PICOP_R7R4   (*(RwReg *)0x4100E084U)
	(PICOP) R7 to 4
#define	REG_PICOP_R11R8   (*(RwReg *)0x4100E088U)
	(PICOP) R11 to 8
#define	REG_PICOP_R15R12   (*(RwReg *)0x4100E08CU)
	(PICOP) R15 to 12
#define	REG_PICOP_R19R16   (*(RwReg *)0x4100E090U)
	(PICOP) R19 to 16
#define	REG_PICOP_R23R20   (*(RwReg *)0x4100E094U)
	(PICOP) R23 to 20
#define	REG_PICOP_R27R24   (*(RwReg *)0x4100E098U)
	(PICOP) R27 to 24: XH, XL, R25, R24
#define	REG_PICOP_R31R28   (*(RwReg *)0x4100E09CU)
	(PICOP) R31 to 28: ZH, ZL, YH, YL
#define	REG_PICOP_S1S0   (*(RwReg *)0x4100E0A0U)
	(PICOP) System Regs 1 to 0: SR
#define	REG_PICOP_S3S2   (*(RwReg *)0x4100E0A4U)
	(PICOP) System Regs 3 to 2: CTRL
#define	REG_PICOP_S5S4   (*(RwReg *)0x4100E0A8U)
	(PICOP) System Regs 5 to 4: SREG, CCR
#define	REG_PICOP_S11S10   (*(RwReg *)0x4100E0B4U)
	(PICOP) System Regs 11 to 10: Immediate
#define	REG_PICOP_LINK   (*(RwReg *)0x4100E0B8U)
	(PICOP) Link
#define	REG_PICOP_SP   (*(RwReg *)0x4100E0BCU)
	(PICOP) Stack Pointer
#define	REG_PICOP_MMUFLASH   (*(RwReg *)0x4100E100U)
	(PICOP) MMU mapping for flash
#define	REG_PICOP_MMU0   (*(RwReg *)0x4100E118U)
	(PICOP) MMU mapping user 0
#define	REG_PICOP_MMU1   (*(RwReg *)0x4100E11CU)
	(PICOP) MMU mapping user 1
#define	REG_PICOP_MMUCTRL   (*(RwReg *)0x4100E120U)
	(PICOP) MMU Control
#define	REG_PICOP_ICACHE   (*(RwReg *)0x4100E180U)
	(PICOP) Instruction Cache Control
#define	REG_PICOP_ICACHELRU   (*(RwReg *)0x4100E184U)
	(PICOP) Instruction Cache LRU
#define	REG_PICOP_QOSCTRL   (*(RwReg *)0x4100E200U)
	(PICOP) QOS Control

Detailed Description

Instance description for PICOP.

Copyright (c) 2015 Atmel Corporation. All rights reserved.

\asf_license_start

Definition in file picop.h.