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<title>SAME54P20A Test Project: /storage/Shared/Documents/Projects/ePenguin/ePenguin-Software-Framework/arch/arm/SAME54/SAME54A/mcu/inc/instance/adc1.h File Reference</title>
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<li class="navelem"><a class="el" href="dir_ea9599923402ca8ab47fc3e495999dea.html">arch</a></li><li class="navelem"><a class="el" href="dir_9e929c73feaf15d3695ce4c76b483065.html">arm</a></li><li class="navelem"><a class="el" href="dir_58955c0f35a9c3d48181d2be53994c7b.html">SAME54</a></li><li class="navelem"><a class="el" href="dir_09e97e512ca7d4e6cd359f1c5497eeba.html">SAME54A</a></li><li class="navelem"><a class="el" href="dir_4b38d63e5c584a4d6c9001c789e1829f.html">mcu</a></li><li class="navelem"><a class="el" href="dir_d4fc57b996dc082ef023092a5b7d90fc.html">inc</a></li><li class="navelem"><a class="el" href="dir_92b117bae75cf16a05ca7611db29e9c7.html">instance</a></li> </ul>
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<p>Instance description for ADC1.
<a href="#details">More...</a></p>
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<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:a889bb4afda6f19016be53f942d9dcaa7"><td class="memItemLeft" align="right" valign="top"><a id="a889bb4afda6f19016be53f942d9dcaa7"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a889bb4afda6f19016be53f942d9dcaa7">REG_ADC1_CTRLA</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x43002000UL)</td></tr>
<tr class="memdesc:a889bb4afda6f19016be53f942d9dcaa7"><td class="mdescLeft"> </td><td class="mdescRight">(ADC1) Control A <br /></td></tr>
<tr class="separator:a889bb4afda6f19016be53f942d9dcaa7"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a8d8a85da254fa6254195ec9590c7b90c"><td class="memItemLeft" align="right" valign="top"><a id="a8d8a85da254fa6254195ec9590c7b90c"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a8d8a85da254fa6254195ec9590c7b90c">REG_ADC1_EVCTRL</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x43002002UL)</td></tr>
<tr class="memdesc:a8d8a85da254fa6254195ec9590c7b90c"><td class="mdescLeft"> </td><td class="mdescRight">(ADC1) Event Control <br /></td></tr>
<tr class="separator:a8d8a85da254fa6254195ec9590c7b90c"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a27832ea3120141700dff4462b11a45bf"><td class="memItemLeft" align="right" valign="top"><a id="a27832ea3120141700dff4462b11a45bf"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a27832ea3120141700dff4462b11a45bf">REG_ADC1_DBGCTRL</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x43002003UL)</td></tr>
<tr class="memdesc:a27832ea3120141700dff4462b11a45bf"><td class="mdescLeft"> </td><td class="mdescRight">(ADC1) Debug Control <br /></td></tr>
<tr class="separator:a27832ea3120141700dff4462b11a45bf"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ab87e5bf0001e98a97dc2b818b13f60d2"><td class="memItemLeft" align="right" valign="top"><a id="ab87e5bf0001e98a97dc2b818b13f60d2"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#ab87e5bf0001e98a97dc2b818b13f60d2">REG_ADC1_INPUTCTRL</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x43002004UL)</td></tr>
<tr class="memdesc:ab87e5bf0001e98a97dc2b818b13f60d2"><td class="mdescLeft"> </td><td class="mdescRight">(ADC1) Input Control <br /></td></tr>
<tr class="separator:ab87e5bf0001e98a97dc2b818b13f60d2"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a83295a9be8f972c0fb1d88c4e4981bb7"><td class="memItemLeft" align="right" valign="top"><a id="a83295a9be8f972c0fb1d88c4e4981bb7"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a83295a9be8f972c0fb1d88c4e4981bb7">REG_ADC1_CTRLB</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x43002006UL)</td></tr>
<tr class="memdesc:a83295a9be8f972c0fb1d88c4e4981bb7"><td class="mdescLeft"> </td><td class="mdescRight">(ADC1) Control B <br /></td></tr>
<tr class="separator:a83295a9be8f972c0fb1d88c4e4981bb7"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a0955264b6ddf8ba672544fbe4ae006ae"><td class="memItemLeft" align="right" valign="top"><a id="a0955264b6ddf8ba672544fbe4ae006ae"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a0955264b6ddf8ba672544fbe4ae006ae">REG_ADC1_REFCTRL</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x43002008UL)</td></tr>
<tr class="memdesc:a0955264b6ddf8ba672544fbe4ae006ae"><td class="mdescLeft"> </td><td class="mdescRight">(ADC1) Reference Control <br /></td></tr>
<tr class="separator:a0955264b6ddf8ba672544fbe4ae006ae"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a513d8fd03493a42685bb94d7efc4805f"><td class="memItemLeft" align="right" valign="top"><a id="a513d8fd03493a42685bb94d7efc4805f"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a513d8fd03493a42685bb94d7efc4805f">REG_ADC1_AVGCTRL</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x4300200AUL)</td></tr>
<tr class="memdesc:a513d8fd03493a42685bb94d7efc4805f"><td class="mdescLeft"> </td><td class="mdescRight">(ADC1) Average Control <br /></td></tr>
<tr class="separator:a513d8fd03493a42685bb94d7efc4805f"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a60c711563b4e055a18e89ddbc234222a"><td class="memItemLeft" align="right" valign="top"><a id="a60c711563b4e055a18e89ddbc234222a"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a60c711563b4e055a18e89ddbc234222a">REG_ADC1_SAMPCTRL</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x4300200BUL)</td></tr>
<tr class="memdesc:a60c711563b4e055a18e89ddbc234222a"><td class="mdescLeft"> </td><td class="mdescRight">(ADC1) Sample Time Control <br /></td></tr>
<tr class="separator:a60c711563b4e055a18e89ddbc234222a"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ad8ca474fabf2ec762ada61c55acbe14f"><td class="memItemLeft" align="right" valign="top"><a id="ad8ca474fabf2ec762ada61c55acbe14f"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#ad8ca474fabf2ec762ada61c55acbe14f">REG_ADC1_WINLT</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x4300200CUL)</td></tr>
<tr class="memdesc:ad8ca474fabf2ec762ada61c55acbe14f"><td class="mdescLeft"> </td><td class="mdescRight">(ADC1) Window Monitor Lower Threshold <br /></td></tr>
<tr class="separator:ad8ca474fabf2ec762ada61c55acbe14f"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a8c1f48f8ab952dd8b725c4d225c54ccf"><td class="memItemLeft" align="right" valign="top"><a id="a8c1f48f8ab952dd8b725c4d225c54ccf"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a8c1f48f8ab952dd8b725c4d225c54ccf">REG_ADC1_WINUT</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x4300200EUL)</td></tr>
<tr class="memdesc:a8c1f48f8ab952dd8b725c4d225c54ccf"><td class="mdescLeft"> </td><td class="mdescRight">(ADC1) Window Monitor Upper Threshold <br /></td></tr>
<tr class="separator:a8c1f48f8ab952dd8b725c4d225c54ccf"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a8f200e75abed6b2df5bb8a525179cbd8"><td class="memItemLeft" align="right" valign="top"><a id="a8f200e75abed6b2df5bb8a525179cbd8"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a8f200e75abed6b2df5bb8a525179cbd8">REG_ADC1_GAINCORR</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x43002010UL)</td></tr>
<tr class="memdesc:a8f200e75abed6b2df5bb8a525179cbd8"><td class="mdescLeft"> </td><td class="mdescRight">(ADC1) Gain Correction <br /></td></tr>
<tr class="separator:a8f200e75abed6b2df5bb8a525179cbd8"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a681c424b05b5d2602f21ca924e6d2c05"><td class="memItemLeft" align="right" valign="top"><a id="a681c424b05b5d2602f21ca924e6d2c05"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a681c424b05b5d2602f21ca924e6d2c05">REG_ADC1_OFFSETCORR</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x43002012UL)</td></tr>
<tr class="memdesc:a681c424b05b5d2602f21ca924e6d2c05"><td class="mdescLeft"> </td><td class="mdescRight">(ADC1) Offset Correction <br /></td></tr>
<tr class="separator:a681c424b05b5d2602f21ca924e6d2c05"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a5925f329a44958467668fc3b65d94454"><td class="memItemLeft" align="right" valign="top"><a id="a5925f329a44958467668fc3b65d94454"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a5925f329a44958467668fc3b65d94454">REG_ADC1_SWTRIG</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x43002014UL)</td></tr>
<tr class="memdesc:a5925f329a44958467668fc3b65d94454"><td class="mdescLeft"> </td><td class="mdescRight">(ADC1) Software Trigger <br /></td></tr>
<tr class="separator:a5925f329a44958467668fc3b65d94454"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ab0808e68ce2115779f62d8a27f4d5482"><td class="memItemLeft" align="right" valign="top"><a id="ab0808e68ce2115779f62d8a27f4d5482"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#ab0808e68ce2115779f62d8a27f4d5482">REG_ADC1_INTENCLR</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x4300202CUL)</td></tr>
<tr class="memdesc:ab0808e68ce2115779f62d8a27f4d5482"><td class="mdescLeft"> </td><td class="mdescRight">(ADC1) Interrupt Enable Clear <br /></td></tr>
<tr class="separator:ab0808e68ce2115779f62d8a27f4d5482"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a2462454fb3d48f8af9277c0d535223ec"><td class="memItemLeft" align="right" valign="top"><a id="a2462454fb3d48f8af9277c0d535223ec"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a2462454fb3d48f8af9277c0d535223ec">REG_ADC1_INTENSET</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x4300202DUL)</td></tr>
<tr class="memdesc:a2462454fb3d48f8af9277c0d535223ec"><td class="mdescLeft"> </td><td class="mdescRight">(ADC1) Interrupt Enable Set <br /></td></tr>
<tr class="separator:a2462454fb3d48f8af9277c0d535223ec"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a72cbb9a06ebed167d2d093451364c983"><td class="memItemLeft" align="right" valign="top"><a id="a72cbb9a06ebed167d2d093451364c983"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a72cbb9a06ebed167d2d093451364c983">REG_ADC1_INTFLAG</a>   (*(<a class="el" href="same54n19a_8h.html#ae361754be775bb192f85821d3ab33c17">RwReg8</a> *)0x4300202EUL)</td></tr>
<tr class="memdesc:a72cbb9a06ebed167d2d093451364c983"><td class="mdescLeft"> </td><td class="mdescRight">(ADC1) Interrupt Flag Status and Clear <br /></td></tr>
<tr class="separator:a72cbb9a06ebed167d2d093451364c983"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a9ab116d19eca9b554fd39520cf34de34"><td class="memItemLeft" align="right" valign="top"><a id="a9ab116d19eca9b554fd39520cf34de34"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a9ab116d19eca9b554fd39520cf34de34">REG_ADC1_STATUS</a>   (*(<a class="el" href="same54n19a_8h.html#a0d957f1433aaf5d70e4dc2b68288442d">RoReg8</a> *)0x4300202FUL)</td></tr>
<tr class="memdesc:a9ab116d19eca9b554fd39520cf34de34"><td class="mdescLeft"> </td><td class="mdescRight">(ADC1) Status <br /></td></tr>
<tr class="separator:a9ab116d19eca9b554fd39520cf34de34"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a956ac5ca7327440f1214b92502179c87"><td class="memItemLeft" align="right" valign="top"><a id="a956ac5ca7327440f1214b92502179c87"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a956ac5ca7327440f1214b92502179c87">REG_ADC1_SYNCBUSY</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x43002030UL)</td></tr>
<tr class="memdesc:a956ac5ca7327440f1214b92502179c87"><td class="mdescLeft"> </td><td class="mdescRight">(ADC1) Synchronization Busy <br /></td></tr>
<tr class="separator:a956ac5ca7327440f1214b92502179c87"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a7023a0f2e1d714e4d3481355dec02ab0"><td class="memItemLeft" align="right" valign="top"><a id="a7023a0f2e1d714e4d3481355dec02ab0"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a7023a0f2e1d714e4d3481355dec02ab0">REG_ADC1_DSEQDATA</a>   (*(<a class="el" href="same54n19a_8h.html#ac0f96d4e8018367b38f527007cf0eafd">WoReg</a> *)0x43002034UL)</td></tr>
<tr class="memdesc:a7023a0f2e1d714e4d3481355dec02ab0"><td class="mdescLeft"> </td><td class="mdescRight">(ADC1) DMA Sequencial Data <br /></td></tr>
<tr class="separator:a7023a0f2e1d714e4d3481355dec02ab0"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:aa1061d5398537fbe439e81ad56bad5f1"><td class="memItemLeft" align="right" valign="top"><a id="aa1061d5398537fbe439e81ad56bad5f1"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#aa1061d5398537fbe439e81ad56bad5f1">REG_ADC1_DSEQCTRL</a>   (*(<a class="el" href="same54n19a_8h.html#acf1496e3bbe303e55f627fc7558a68c7">RwReg</a> *)0x43002038UL)</td></tr>
<tr class="memdesc:aa1061d5398537fbe439e81ad56bad5f1"><td class="mdescLeft"> </td><td class="mdescRight">(ADC1) DMA Sequential Control <br /></td></tr>
<tr class="separator:aa1061d5398537fbe439e81ad56bad5f1"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a91cc5991ee8fa9df4d8feff7b187b903"><td class="memItemLeft" align="right" valign="top"><a id="a91cc5991ee8fa9df4d8feff7b187b903"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a91cc5991ee8fa9df4d8feff7b187b903">REG_ADC1_DSEQSTAT</a>   (*(<a class="el" href="same54n19a_8h.html#a5d556f8391af4141be23f7334ac9dd68">RoReg</a> *)0x4300203CUL)</td></tr>
<tr class="memdesc:a91cc5991ee8fa9df4d8feff7b187b903"><td class="mdescLeft"> </td><td class="mdescRight">(ADC1) DMA Sequencial Status <br /></td></tr>
<tr class="separator:a91cc5991ee8fa9df4d8feff7b187b903"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ab26c130fe7a9aaa2b2468f22b6eebb38"><td class="memItemLeft" align="right" valign="top"><a id="ab26c130fe7a9aaa2b2468f22b6eebb38"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#ab26c130fe7a9aaa2b2468f22b6eebb38">REG_ADC1_RESULT</a>   (*(<a class="el" href="same54n19a_8h.html#aebf6e33c2d49a802e06e22a95ea9d0d0">RoReg16</a>*)0x43002040UL)</td></tr>
<tr class="memdesc:ab26c130fe7a9aaa2b2468f22b6eebb38"><td class="mdescLeft"> </td><td class="mdescRight">(ADC1) Result Conversion Value <br /></td></tr>
<tr class="separator:ab26c130fe7a9aaa2b2468f22b6eebb38"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a3f84a3d776fd892f17cd25f486cf9f85"><td class="memItemLeft" align="right" valign="top"><a id="a3f84a3d776fd892f17cd25f486cf9f85"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a3f84a3d776fd892f17cd25f486cf9f85">REG_ADC1_RESS</a>   (*(<a class="el" href="same54n19a_8h.html#aebf6e33c2d49a802e06e22a95ea9d0d0">RoReg16</a>*)0x43002044UL)</td></tr>
<tr class="memdesc:a3f84a3d776fd892f17cd25f486cf9f85"><td class="mdescLeft"> </td><td class="mdescRight">(ADC1) Last Sample Result <br /></td></tr>
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<tr class="memitem:a500784578d055a8a70b2f8743c94472c"><td class="memItemLeft" align="right" valign="top"><a id="a500784578d055a8a70b2f8743c94472c"></a>
#define </td><td class="memItemRight" valign="bottom"><a class="el" href="adc1_8h.html#a500784578d055a8a70b2f8743c94472c">REG_ADC1_CALIB</a>   (*(<a class="el" href="same54n19a_8h.html#acce07556c80fc352ae607f225f19fed5">RwReg16</a>*)0x43002048UL)</td></tr>
<tr class="memdesc:a500784578d055a8a70b2f8743c94472c"><td class="mdescLeft"> </td><td class="mdescRight">(ADC1) Calibration <br /></td></tr>
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<tr class="memitem:ae631c69ae57f187850b2a872b7789f7e"><td class="memItemLeft" align="right" valign="top"><a id="ae631c69ae57f187850b2a872b7789f7e"></a>
#define </td><td class="memItemRight" valign="bottom"><b>ADC1_BANDGAP</b>   27</td></tr>
<tr class="separator:ae631c69ae57f187850b2a872b7789f7e"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a81cb8cb6ddfa2cf2844bbed243796c89"><td class="memItemLeft" align="right" valign="top"><a id="a81cb8cb6ddfa2cf2844bbed243796c89"></a>
#define </td><td class="memItemRight" valign="bottom"><b>ADC1_CTAT</b>   29</td></tr>
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<tr class="memitem:a77cf75ef6082b34fbb736c36c12f47d0"><td class="memItemLeft" align="right" valign="top"><a id="a77cf75ef6082b34fbb736c36c12f47d0"></a>
#define </td><td class="memItemRight" valign="bottom"><b>ADC1_DMAC_ID_RESRDY</b>   70</td></tr>
<tr class="separator:a77cf75ef6082b34fbb736c36c12f47d0"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ade08fd88d8ad28abaa4a9b91c0e8ff42"><td class="memItemLeft" align="right" valign="top"><a id="ade08fd88d8ad28abaa4a9b91c0e8ff42"></a>
#define </td><td class="memItemRight" valign="bottom"><b>ADC1_DMAC_ID_SEQ</b>   71</td></tr>
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<tr class="memitem:a5f823706a666e724b8122e9816532b69"><td class="memItemLeft" align="right" valign="top"><a id="a5f823706a666e724b8122e9816532b69"></a>
#define </td><td class="memItemRight" valign="bottom"><b>ADC1_EXTCHANNEL_MSB</b>   15</td></tr>
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<tr class="memitem:a3572b97f2a21375c0830d6e347154e62"><td class="memItemLeft" align="right" valign="top"><a id="a3572b97f2a21375c0830d6e347154e62"></a>
#define </td><td class="memItemRight" valign="bottom"><b>ADC1_GCLK_ID</b>   41</td></tr>
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<tr class="memitem:a9f0a0f58e141152742d96064f543fc61"><td class="memItemLeft" align="right" valign="top"><a id="a9f0a0f58e141152742d96064f543fc61"></a>
#define </td><td class="memItemRight" valign="bottom"><b>ADC1_MASTER_SLAVE_MODE</b>   2</td></tr>
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<tr class="memitem:a0e440111600b3d4e732efcb694392ea7"><td class="memItemLeft" align="right" valign="top"><a id="a0e440111600b3d4e732efcb694392ea7"></a>
#define </td><td class="memItemRight" valign="bottom"><b>ADC1_OPAMP2</b>   0</td></tr>
<tr class="separator:a0e440111600b3d4e732efcb694392ea7"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a509177aefb505ddf9e96e2648194a7c8"><td class="memItemLeft" align="right" valign="top"><a id="a509177aefb505ddf9e96e2648194a7c8"></a>
#define </td><td class="memItemRight" valign="bottom"><b>ADC1_OPAMP01</b>   0</td></tr>
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<tr class="memitem:a704cbcc29095e5f154b2483aff652af4"><td class="memItemLeft" align="right" valign="top"><a id="a704cbcc29095e5f154b2483aff652af4"></a>
#define </td><td class="memItemRight" valign="bottom"><b>ADC1_PTAT</b>   28</td></tr>
<tr class="separator:a704cbcc29095e5f154b2483aff652af4"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:abb6b0eb4dfa6ad5ec2ceef0872c9d6e6"><td class="memItemLeft" align="right" valign="top"><a id="abb6b0eb4dfa6ad5ec2ceef0872c9d6e6"></a>
#define </td><td class="memItemRight" valign="bottom"><b>ADC1_TOUCH_IMPLEMENTED</b>   0</td></tr>
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<tr class="memitem:a68158a7d5b0df3fdf831ed5a28096a44"><td class="memItemLeft" align="right" valign="top"><a id="a68158a7d5b0df3fdf831ed5a28096a44"></a>
#define </td><td class="memItemRight" valign="bottom"><b>ADC1_TOUCH_LINES_NUM</b>   1</td></tr>
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</table>
<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>Instance description for ADC1. </p>
<p>Copyright (c) 2019 Microchip Technology Inc.</p>
<p>\asf_license_start </p>
<p class="definition">Definition in file <a class="el" href="adc1_8h_source.html">adc1.h</a>.</p>
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