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SAME54P20A Test Project
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RTC_MODE2 hardware registers. More...
#include <rtc.h>
Data Fields | |
| __IO RTC_MODE2_CTRLA_Type | CTRLA |
| Offset: 0x00 (R/W 16) MODE2 Control A. | |
| __IO RTC_MODE2_CTRLB_Type | CTRLB |
| Offset: 0x02 (R/W 16) MODE2 Control B. | |
| __IO RTC_MODE2_EVCTRL_Type | EVCTRL |
| Offset: 0x04 (R/W 32) MODE2 Event Control. | |
| __IO RTC_MODE2_INTENCLR_Type | INTENCLR |
| Offset: 0x08 (R/W 16) MODE2 Interrupt Enable Clear. | |
| __IO RTC_MODE2_INTENSET_Type | INTENSET |
| Offset: 0x0A (R/W 16) MODE2 Interrupt Enable Set. | |
| __IO RTC_MODE2_INTFLAG_Type | INTFLAG |
| Offset: 0x0C (R/W 16) MODE2 Interrupt Flag Status and Clear. | |
| __IO RTC_DBGCTRL_Type | DBGCTRL |
| Offset: 0x0E (R/W 8) Debug Control. | |
| RoReg8 | Reserved1 [0x1] |
| __I RTC_MODE2_SYNCBUSY_Type | SYNCBUSY |
| Offset: 0x10 (R/ 32) MODE2 Synchronization Busy Status. | |
| __IO RTC_FREQCORR_Type | FREQCORR |
| Offset: 0x14 (R/W 8) Frequency Correction. | |
| RoReg8 | Reserved2 [0x3] |
| __IO RTC_MODE2_CLOCK_Type | CLOCK |
| Offset: 0x18 (R/W 32) MODE2 Clock Value. | |
| RoReg8 | Reserved3 [0x4] |
| RtcMode2Alarm | Mode2Alarm [2] |
| Offset: 0x20 RtcMode2Alarm groups [NUM_OF_ALARMS]. | |
| RoReg8 | Reserved4 [0x10] |
| __IO RTC_GP_Type | GP [4] |
| Offset: 0x40 (R/W 32) General Purpose. | |
| RoReg8 | Reserved5 [0x10] |
| __IO RTC_TAMPCTRL_Type | TAMPCTRL |
| Offset: 0x60 (R/W 32) Tamper Control. | |
| __I RTC_MODE2_TIMESTAMP_Type | TIMESTAMP |
| Offset: 0x64 (R/ 32) MODE2 Timestamp. | |
| __IO RTC_TAMPID_Type | TAMPID |
| Offset: 0x68 (R/W 32) Tamper ID. | |
| RoReg8 | Reserved6 [0x14] |
| __IO RTC_BKUP_Type | BKUP [8] |
| Offset: 0x80 (R/W 32) Backup. | |
1.8.20